HD74ACT165FP [HITACHI]
Parallel In Serial Out, ACT Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DA;
| 型号： | HD74ACT165FP |
| 厂家： | 
HITACHI SEMICONDUCTOR |
| 描述： | Parallel In Serial Out, ACT Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DA 光电二极管 |
| 文件： | 总11页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74AC165/HD74ACT165
Parallel-Load 8-bit Shift Register
ADE-205-374 (Z)
1st. Edition
Sep. 2000
Description
This 8-bit serial shift register shifts data from QA to QH when clocked, Parallel inputs to each stage are
enabled by a low level at the Shift/Load Input. Also included is a gated clock input and a complementary
output from the eighth bit.
Clocking is accomplished through a 2-input NOR gate permitting one input to be used as a clock inhibit
function. Holding either of the clock inputs high inhibits clocking, and holding either clock input low with
the Shift/Load input high enables the other clock input. Data transfer occurs on the positive going edge of
the clock. Parallel loading is inhibited as long as the Shift/Load input is high. When taken low, data at the
parallel inputs is loaded directly into the register independent of the state of the clock.
Features
•
•
Outputs Source/Sink 24 mA
HD74ACT165 has TTL-Compatible Inputs
HD74AC165/HD74ACT165
Pin Arrangement
SL
1
16
VCC
Clock
CP 2
E 3
15
Inhibit
14
D
C
4
F
13
Parallel
Inputs
Parallel
Inputs
G 5
12 B
H
11
10
9
6
7
A
QH
SI
QH
GND 8
(Top view)
Logic Symbol
15
11 12 13 14
3
4
5
6
Clock
Inhibit
SL
A
B
C
D
E
F
G
H
1
2
CP
SI
10
QH
9
QH
7
Pin Names
A to H
Parallel Inputs
Serial Input
Clock Input
Shift Load
Clock Inhibit
Outputs
SI
CP
SL
Clock Inhibit
QH, QH
2
HD74AC165/HD74ACT165
Truth Table
Inputs
Clock
Parallel
Internal Outputs
Outputs
QH
SL
L
Inhibit
CP
X
SI
X
X
H
L
A ······ H
QA
a
QB
X
L
L
L
H
a ······ h
b
h
H
H
H
L
X
X
X
X
QAD
H
QBO
QAn
QAn
QBO
QHO
QGn
L
QCn
H
X
X
QAD
QHO
H :
High Voltage Level
Low Voltage Level
Immaterial
L
:
:
X
:
Low-to-High Clock Transition
3
HD74AC165/HD74ACT165
Logic Diagram
Parallel
Inputs
A
B
C
D
E
F
G
H
Preset
Preset
Preset
Preset
Preset
QE
Clock
Preset
Preset
Preset
Output
QH
QA
QB
QC
QD
QF
QG
QH
S
S
S
S
S
S
S
S
Clock
Clock
Clock
Clock
Clock
Clock
Clock
Output
QH
QA
QB
QC
QD
QE
QF
QG
QH
R
R
R
R
R
R
R
R
Clear
Clear
Clear
Clear
Clear
Clear
Clear
Clear
SI
SL
CP
Clock
Inhibit
DC Characteristics (unless otherwise specified)
Item
Symbol Max
Unit
Condition
Maximum quiescent supply current
ICC
ICC
ICCT
80
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current
8.0
1.5
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = 25°C
Maximum additional ICC/input
(HD74ACT165)
mA
VIN = VCC – 2.1 V, VCC = 5.5 V,
Ta = Worst case
4
HD74AC165/HD74ACT165
AC Characteristics: HD74AC165
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
85
Typ
Max
—
Min
70
Max
—
Unit
Maximum count
frequency
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
—
MHz
100
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
—
—
90
—
Propagation delay
CP to QH or QH
Propagation delay
CP to QH or QH
Propagation delay
H to QH or QH
11.0
8.0
17.5
11.5
18.0
12.5
19.5
13.5
14.0
9.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
20.5
13.5
21.5
14.5
22.5
15.5
16.5
11.0
23.5
16.0
19.5
12.5
ns
ns
ns
ns
ns
ns
12.0
8.5
13.5
9.5
Propagation delay
H to QH or QH
9.0
6.5
Propagation delay
SL to QH or QH
Propagation delay
SL to QH or QH
11.5
8.5
20.5
14.0
16.5
11.0
10.0
7.5
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
5
HD74AC165/HD74ACT165
AC Operating Requirements: HD74AC165
Ta = –40°C
to +85°C
CL = 50 pF
Ta = +25°C
CL = 50 pF
Item
Symbol VCC (V)*1 Typ
Guaranteed Minimum
Unit
Setup time, HIGH or LOW
H to SL
tsu
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.5
2.5
–1.0
–0.5
1.0
0.5
1.5
1.0
3.0
2.0
–2.0
–1.0
2.5
2.0
3.0
3.0
5.0
4.0
0.5
0.5
3.5
3.0
2.0
2.0
5.0
4.0
0.0
0.0
3.5
3.0
5.5
4.5
6.0
4.5
0.5
0.5
4.0
3.5
2.0
2.0
6.0
4.5
0.0
0.0
3.5
3.0
7.0
5.0
ns
Hold time, HIGH or LOW
H to SL
th
ns
ns
ns
ns
ns
ns
ns
Setup time, HIGH or LOW
Sin to CP
tsu
Hold time, HIGH or LOW
Sin to CP
th
Setup time, HIGH or LOW
SL to CP
tsu
Hold time, HIGH or LOW
SL to CP
th
Recovery time clock inhibit
to CP
trec
Clock pulse width
tw
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
6
HD74AC165/HD74ACT165
AC Characteristics: HD74ACT165
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
Typ
Max
Min
Max
Unit
Maximum count
frequency
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
5.0
5.0
5.0
5.0
5.0
5.0
5.0
70
—
—
60
—
MHz
Propagation delay
CP to QH or QH
1.0
1.0
1.0
1.0
1.0
1.0
8.5
9.5
10.5
7.5
9.5
8.5
13.5
14.0
13.5
11.0
15.0
13.0
1.0
1.0
1.0
1.0
1.0
1.0
15.5
16.5
15.5
12.5
18.0
15.5
ns
ns
ns
ns
ns
ns
Propagation delay
CP to QH or QH
Propagation delay
H to QH or QH
Propagation delay
H to QH or QH
Propagation delay
SL to QH or QH
Propagation delay
SL to QH or QH
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
7
HD74AC165/HD74ACT165
AC Operating Requirements: HD74ACT165
Ta = –40°C
to +85°C
CL = 50 pF
Ta = +25°C
CL = 50 pF
Item
Symbol VCC (V)*1 Typ
Guaranteed Minimum
Unit
Setup time, HIGH or LOW
H to SL
tsu
th
tsu
th
tsu
th
trec
tw
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
3.0
–1.0
0.5
0.5
2.0
–1.5
2.0
3.5
4.0
0.0
3.0
2.0
4.0
0.0
3.0
7.0
4.5
0.0
3.5
2.0
4.5
0.0
3.0
8.0
ns
Hold time, HIGH or LOW
H to SL
ns
ns
ns
ns
ns
ns
ns
Setup time, HIGH or LOW
Sin to CP
Hold time, HIGH or LOW
Sin to CP
Setup time, HIGH or LOW
SL to CP
Hold time, HIGH or LOW
SL to CP
Recovery time clock inhibit
to CP
Clock pulse width
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Symbol
CIN
Typ
4.5
50
Unit
pF
Condition
VCC = 5.5 V
VCC = 5.0 V
Input capacitance
Power dissipation capacitance
CPD
pF
8
HD74AC165/HD74ACT165
Package Dimensions
Unit: mm
19.20
20.00 Max
16
1
9
8
1.3
1.11 Max
7.62
+ 0.13
– 0.05
0.25
2.54 ± 0.25
0.48 ± 0.10
0° – 15°
Hitachi Code
DP-16
JEDEC
EIAJ
Mass (reference value)
Conforms
Conforms
1.07 g
Unit: mm
10.06
10.5 Max
9
8
16
1
+ 0.20
7.80
– 0.30
0.80 Max
1.15
0° – 8°
1.27
0.70 ± 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
M
0.12
Hitachi Code
JEDEC
FP-16DA
—
EIAJ
Conforms
0.24 g
*Dimension including the plating thickness
Base material dimension
Mass (reference value)
9
HD74AC165/HD74ACT165
Unit: mm
9.9
10.3 Max
9
16
1
8
1.27
+ 0.10
6.10
– 0.30
1.08
0.635 Max
0° – 8°
+ 0.67
0.60
– 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
0.25
M
Hitachi Code
JEDEC
EIAJ
FP-16DN
Conforms
Conforms
0.15 g
*Dimension including the plating thickness
Base material dimension
Mass (reference value)
Unit: mm
5.00
5.30 Max
16
9
1
8
0.65
0.13 M
0.65 Max
1.0
+ 0.08
– 0.07
*0.22
0.20 ± 0.06
6.40 ± 0.20
0° – 8°
0.50 ± 0.10
0.10
Hitachi Code
JEDEC
TTP-16DA
—
EIAJ
—
0.05 g
*Dimension including the plating thickness
Base material dimension
Mass (reference value)
10
HD74AC165/HD74ACT165
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Semiconductor & Integrated Circuits.
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Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
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For further information write to:
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(America) Inc.
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Hitachi Europe GmbH
Electronic Components Group
Hitachi Asia Ltd.
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Tel : <852>-(2)-735-9218
Fax : <852>-(2)-730-0281
URL : http://www.hitachi.com.hk
Hitachi Europe Ltd.
Electronic Components Group.
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Lower Cookham Road
Maidenhead
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(Taipei Branch Office)
4/F, No. 167, Tun Hwa North Road,
Hung-Kuo Building,
Taipei (105), Taiwan
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Tel : <886>-(2)-2718-3666
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Telex : 23222 HAS-TP
URL : http://www.hitachi.com.tw
Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
Colophon 2.0
11
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