HD74ALVCH16269 [HITACHI]

12-bit to 24-bit Registered Bus Transceivers with 3-state Outputs; 12位至24位寄存总线收发器与3态输出


型号：	HD74ALVCH16269
厂家：	HITACHI SEMICONDUCTOR
描述：	12-bit to 24-bit Registered Bus Transceivers with 3-state Outputs 12位至24位寄存总线收发器与3态输出总线收发器
文件：	总13页 (文件大小：68K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HD74ALVCH16269

12-bit to 24-bit Registered Bus Transceivers

with 3-state Outputs

ADE-205-136 (Z)

Preliminary 1st. Edition

May 1996

Description

The HD74ALVCH16269 is used in applications where two separate ports must be multiplexed onto, or

demultiplexed from, a single port. The device is particularly suitable as an interface between

synchronous DRAMs and high speed microprocessors. Data is stored in the internal B port registers on

the low to high transition of the clock (CLK) input when the appropriate clock enable (CLKENA)

inputs are low. Proper control of these inputs allows two sequential 12-bit words to be presented as a

24-bit word on the B port. For data transfer in the B to A direction, a single storage register is

provided. The select (SEL) line selects 1B or 2B data for the A outputs. The register on the A output

permits the fastest possible data transfer, thus extending the period that the data is valid on the bus.

The control terminals are registered so that all transactions are synchronous with CLK. Data flow is

controlled by the active low output enables (OEA, OEB1, OEB2). Active bus hold circuitry is

provided to hold unused or floating data inputs at a valid logic level.

Features

•

V_CC= 2.3 V to 3.6 V

Typical V_OLground bounce < 0.8 V (@V_CC= 3.3 V, Ta = 25°C)

Typical V_OHundershoot > 2.0 V (@V_CC= 3.3 V, Ta = 25°C)

High output current ±24 mA (@V_CC= 3.0 V)

Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

HD74ALVCH16269

Function Table

Inputs

Outputs

CLK

OEA

OEB

1B, 2B

↑

Active

Output enable

Inputs

Outputs

CLKENA1

CLKENA2

CLK

1B₀

2B₀

↑

A-to-B storage (OEB = L)

Inputs

Output A

CLK

SEL

↑

A₀

↑

B-to-A storage (OEA = L)

H : High level

L : Low level

X : Immaterial

Z : High impedance

↑ : Low to high transition

Note: 1. Output level before the indicated steady state input conditions were established.

HD74ALVCH16269

Pin Arrangement

OEB2

OEA

OEB1 2

55 CLKENA2

2B4

GND

2B5

2B6

2B3

GND

2B2

2B1

V_CC

50 V_CC

49 2B7

2B8

2B9

GND

45 2B10

2B11

2B12

1B12

A5 13

A6 14

41 1B11

1B10

39 GND

38 1B9

37 1B8

GND

A10

A11

A12 21

1B7

V_CC

1B1

1B2

GND

1B3

V_CC

1B6

1B5

GND

1B4

CLKENA1

CLK

SEL

(Top view)

HD74ALVCH16269

Absolute Maximum Ratings

Item

Symbol

Ratings

–0.5 to 4.6

–0.5 to V_CC+0.5

–50

Unit

Conditions

Supply voltage

Input voltage ^{*1, 2}

V_CC

V_I

Except I/O ports

I/O ports

Output voltage ^{*1, 2}

V_O

I_IK

Input clamp current

Output clamp current

Continuous output current

V_I< 0

I_OK

I_O

±50

V_O< 0 or V_O> V_CC

V_O= 0 to V_CC

±50

±100

Maximum power dissipation

P_T

TSSOP

at Ta = 55°C (in still air) ^*3

Storage temperature

Tstg

–65 to 150

°C

Notes:

Stresses beyond those listed under “absolute maximum ratings” may cause permanent

damage to the device. These are stress ratings only, and functional operation of the device

at these or any other conditions beyond those indicated under “recommended operating

conditions” is not implied. Exposure to absolute maximum rated conditions for extended

periods may affect device reliability.

1. The input and output negative voltage ratings may be exceeded if the input and output

clamp current ratings are observed.

2. This value is limited to 4.6 V maximum.

3. The maximum package power dissipation is calculated using a junction temperature of

150°C and a board trace length of 750 mils.

Recommended Operating Conditions

Item

Symbol

V_CC

Min

2.3

Max

3.6

V_CC

–12

–24

Unit

Conditions

Supply voltage

Input voltage

V_I

Output voltage

High level output current

V_O

I_OH

—

V_CC= 2.3 V

V_CC= 2.7 V

V_CC= 3.0 V

V_CC= 2.3 V

V_CC= 2.7 V

V_CC= 3.0 V

Low level output current

I_OL

Input transition rise or fall rate

Operating temperature

∆t / ∆v

ns / V

–40

°C

Note: Unused control inputs must be held high or low to prevent them from floating.

HD74ALVCH16269

Logic Diagram

CLK

OEB1

OEB2

CLKENA1

CLKENA2

SEL

OEA

1B1

2B1

1 of 12 Channels

HD74ALVCH16269

Electrical Characteristics (Ta = –40 to 85°C)

Item

Symbol V_CC(V) ^*1

Min

Max

—

Unit Test Conditions

Input voltage

V_IH

2.3 to 2.7 1.7

2.7 to 3.6 2.0

—

V_IL

2.3 to 2.7

2.7 to 3.6

—

0.7

0.8

—

Output voltage

V_OH

Min to Max V_CC–0.2

I_OH= –100 µA

2.3

2.7

3.0

2.0

1.7

2.2

2.4

2.0

—

I_OH= –6 mA, V_IH= 1.7 V

I_OH= –12 mA, V_IH= 1.7 V

I_OH= –12 mA, V_IH= 2.0 V

I_OH= –24 mA, V_IH= 2.0 V

I_OL= 100 µA

—

V_OL

Min to Max —

0.2

0.4

0.7

0.4

0.55

±5

2.3

—

I_OL= 6 mA, V_IL= 0.7 V

I_OL= 12 mA, V_IL= 0.7 V

I_OL= 12 mA, V_IL= 0.8 V

I_OL= 24 mA, V_IL= 0.8 V

V_IN= V_CCor GND

V_IN= 0.7 V

2.3

—

2.7

—

3.0

—

Input current

I_IN

3.6

—

µA

I_{IN (hold)}

2.3

–45

–75

—

2.3

—

V_IN= 1.7 V

3.0

—

V_IN= 0.8 V

3.0

—

V_IN= 2.0 V

3.6

±500

±10

V_IN= 0 to 3.6 V

Off state output current ^*2I_OZ

Quiescent supply current I_CC

3.6

—

µA

V_OUT= V_CCor GND

V_IN= V_CCor GND

3.6

—

∆I_CC

3.0 to 3.6

—

750

V_IN= one input at (V_CC–0.6)

other inputs at V_CCor GND

Notes: 1. For conditions shown as Min or Max, use the appropriate values under recommended

operating conditions.

2. For I/O ports, the parameter I_OZincludes the input leakage current.

HD74ALVCH16269

Switching Characteristics (Ta = –40 to 85°C)

Item

Symbol V_CC(V) Min

Typ

Max

Unit FROM

(Input)

(Output)

Maximum clock frequency f_max

2.5±0.2 135

2.7 135

—

3.5

9.0

—

MHz

—

3.3±0.3 135

2.5±0.2 1.0

—

Propagation delay time

Output enable time

Output disable time

t_PLH

t_PHL

8.8

7.3

6.2

7.0

5.8

5.0

8.4

6.7

6.1

8.1

6.2

5.9

8.3

6.9

6.1

7.7

6.8

5.6

—

CLK

2.7

—

3.3±0.3 1.0

2.5±0.2 1.0

2.7

—

3.3±0.3 1.0

2.5±0.2 1.0

t_ZH

t_ZL

2.7

—

3.3±0.3 1.0

2.5±0.2 1.0

2.7

—

3.3±0.3 1.0

2.5±0.2 1.4

t_HZ

t_LZ

2.7

—

3.3±0.3 1.0

2.5±0.2 1.5

2.7

—

3.3±0.3 1.0

Input capacitance

Output capacitance

C_IN

3.3

—

Control inputs

A or B ports

C_{IN / O}

—

HD74ALVCH16269

Item

Symbol V_CC(V)

Min

Typ

—

Max

—

Unit

FROM (Input)

Setup time

t_su

2.5±0.2 2.0

A data before CLK↑

2.7

2.0

3.3±0.3 1.7

2.5±0.2 2.2

B data before CLK↑

SEL before CLK↑

CLKENA1 or

2.7

2.1

3.3±0.3 1.8

2.5±0.2 1.6

2.7

1.6

3.3±0.3 1.3

2.5±0.2 1.0

2.7

1.2

CLKENA2 before

CLK↑

3.3±0.3 0.9

2.5±0.2 1.5

—

OE before CLK↑

A data after CLK↑

B data after CLK↑

SEL aftrer CLK↑

2.7

1.6

3.3±0.3 1.3

2.5±0.2 0.7

Hold time

t_h

2.7

0.6

3.3±0.3 0.6

2.5±0.2 0.7

2.7

0.6

3.3±0.3 0.6

2.5±0.2 1.1

2.7

0.7

3.3±0.3 0.7

2.5±0.2 1.0

CLKENA1 or

2.7

0.8

CLKENA2 after CLK↑

3.3±0.3 1.1

2.5±0.2 0.8

OE after CLK↑

2.7

0.8

3.3±0.3 0.8

2.5±0.2 3.3

Pulse width

t_w

CLK “H” or “L”

2.7

3.3

3.3±0.3 3.3

HD74ALVCH16269

• Test Circuit

See under table

500 Ω

OPEN

GND

C_L= 50 pF

500 Ω

Load Circuit for Outputs

Vcc=2.7V,

Vcc=2.5±0.2V

Symbol

3.3±0.3V

t_PLH/ t_PHL

t_su/ t_h/ t_w

OPEN

t_ZH/ t_HZ

t_ZL/ t_LZ

GND

4.6 V

GND

6.0 V

Note: 1. C_Lincludes probe and jig capacitance.

HD74ALVCH16269

• Waveforms – 1

90 %

V_ref

90 %

V_ref

Input

10 %

GND

t_PHL

t_PLH

V_OH

Output

V_ref

V_OL

• Waveforms – 2

90 %

V_ref

Timing Input

10 %

t_su

GND

t_h

V_ref

Data Input

GND

t_w

V_ref

Input

GND

HD74ALVCH16269

• Waveforms – 3

90 %

V_ref

90 %

V_ref

Output

Control

10 %

t_ZL

10 %

GND

t_LZ

≈V_OH1

V_ref

Waveform - A

Waveform - B

V_OL+ 0.3 V

V_OH– 0.3 V

V_OL

V_OH

t_ZH

t_HZ

V_ref

≈V_OL1

Vcc=2.7V,

Vcc=2.5±0.2V

2.3 V

TEST

3.3±0.3V

V_IH

2.7 V

V_ref

1.2 V

1.5 V

3.0 V

GND

V_OH1

V_OL1

2.3 V

GND

Notes: 1. All input pulses are supplied by generators having the following characteristics:

PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

2. Waveform – A is for an output with internal conditions such that the output is low

except when disabled by the output control.

3. Waveform – B is for an output with internal conditions such that the output is high

except when disabled by the output control.

4. The output are measured one at a time with one transition per measurement.

HD74ALVCH16269

Package Dimensions

Unit : mm

+0.3

–0.1

14.00

0.50

0.08

+0.1

0.20

–0.05

8.10 ± 0.3

0.40 Max

10° Max

0.10

0.50 ± 0.1

Hitachi code

EIAJ code

JEDEC code

TTP-56D

—

Cautions

1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,

Hitachi bears no responsibility for problems that may arise with third party’s rights, including

intellectual property rights, in connection with use of the information contained in this document.

2. Products and product specifications may be subject to change without notice. Confirm that you have

received the latest product standards or specifications before final design, purchase or use.

3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,

contact Hitachi’s sales office before using the product in an application that demands especially high

quality and reliability or where its failure or malfunction may directly threaten human life or cause risk

of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,

traffic, safety equipment or medical equipment for life support.

4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly

for maximum rating, operating supply voltage range, heat radiation characteristics, installation

conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used

beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable

failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-

safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other

consequential damage due to operation of the Hitachi product.

5. This product is not designed to be radiation resistant.

6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without

written approval from Hitachi.

7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor

products.

Hitachi, Ltd.

Semiconductor & Integrated Circuits.

Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan

Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109

URL

NorthAmerica

Europe

: http:semiconductor.hitachi.com/

: http://www.hitachi-eu.com/hel/ecg

Asia (Singapore)

Asia (Taiwan)

: http://www.has.hitachi.com.sg/grp3/sicd/index.htm

: http://www.hitachi.com.tw/E/Product/SICD_Frame.htm

Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm

Japan

: http://www.hitachi.co.jp/Sicd/indx.htm

For further information write to:

Hitachi Semiconductor

(America) Inc.

Hitachi Europe GmbH

Hitachi Asia (Hong Kong) Ltd.

Group III (Electronic Components)

7/F., North Tower, World Finance Centre,

Harbour City, Canton Road, Tsim Sha Tsui,

Kowloon, Hong Kong

Tel: <852> (2) 735 9218

Fax: <852> (2) 730 0281

Hitachi Asia Pte. Ltd.

16 Collyer Quay #20-00

Hitachi Tower

Singapore 049318

Tel: 535-2100

Electronic components Group

Dornacher Stra§e 3

D-85622 Feldkirchen, Munich

Germany

Tel: <49> (89) 9 9180-0

Fax: <49> (89) 9 29 30 00

179 East Tasman Drive,

San Jose,CA 95134

Tel: <1> (408) 433-1990

Fax: <1>(408) 433-0223

Fax: 535-1533

Hitachi Asia Ltd.

Taipei Branch Office

3F, Hung Kuo Building. No.167,

Tun-Hwa North Road, Taipei (105)

Tel: <886> (2) 2718-3666

Fax: <886> (2) 2718-8180

Telex: 40815 HITEC HX

Hitachi Europe Ltd.

Electronic Components Group.

Whitebrook Park

Lower Cookham Road

Maidenhead

Berkshire SL6 8YA, United Kingdom

Tel: <44> (1628) 585000

Fax: <44> (1628) 778322

HD74ALVCH16269 [HITACHI]

相关型号：

HD74ALVCH16269T

HD74ALVCH16269T

HD74ALVCH16269T-E

HD74ALVCH16269TEL

HD74ALVCH16270

HD74ALVCH16270T

HD74ALVCH162721

HD74ALVCH162721

HD74ALVCH162721T

HD74ALVCH162721T

HD74ALVCH162721T-EL

HD74ALVCH162721TEL