HD74ALVCH16500T-EL [HITACHI]

Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TTP-56D;


型号：	HD74ALVCH16500T-EL
厂家：	HITACHI SEMICONDUCTOR
描述：	Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TTP-56D 总线驱动器总线收发器逻辑集成电路光电二极管
文件：	总13页 (文件大小：57K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HD74ALVCH16500

18-bit Universal Bus Transceivers with 3-state Outputs

ADE-205-167A (Z)

2nd. Edition

December 1999

Description

Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and

LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the

transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a

high or low logic level. If LEAB is low, the A bus data is stored in the latch flip flop on the high to low

transition of CLKAB. Output enable OEAB is active high. When OEAB is high, the B port outputs are

active. When OEAB is low, the B port outputs are in the high impedance state. Data flow for B to A is

similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are complementary

(OEAB is active high, and OEBA is active low). Active bus hold circuitry is provided to hold unused or

floating data inputs at a valid logic level.

Features

•

V_CC= 2.3 V to 3.6 V

Typical V_OLground bounce < 0.8 V (@V_CC= 3.3 V, Ta = 25°C)

Typical V_OHundershoot > 2.0 V (@V_CC= 3.3 V, Ta = 25°C)

High output current ±24 mA (@V_CC= 3.0 V)

Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

HD74ALVCH16500

Function Table ^*3

Inputs

Output B

OEAB

LEAB

CLKAB

↓

B₀

H : High level

L : Low level

X : Immaterial

Z : High impedance

↓ : High to low transition

Notes: 1. Output level before the indicated steady state input conditions were established.

2. Output level before the indicated steady state input conditions were established, provided that

CLKAB was low before LEAB went low.

3. A to B data flow is show; B to A flow is similar but uses OEBA, LEBA, and CLKBA.

HD74ALVCH16500

Pin Arrangement

GND

OEAB 1

LEAB 2

55 CLKAB

GND

V_CC

49 B4

GND

45 B7

A8 13

A9 14

A10

B10

41 B11

B12

A11

A12

39 GND

38 B13

37 B14

GND

A13

A14

A15 21

B15

V_CC

A16

V_CC

B16

A17

B17

GND

A18

GND

B18

OEBA

LEBA

CLKBA

GND

(Top view)

HD74ALVCH16500

Absolute Maximum Ratings

Item

Symbol

Ratings

–0.5 to 4.6

–0.5 to V_CC+0.5

–50

Unit

Conditions

Supply voltage

Input voltage ^{*1, 2}

V_CC

V_I

Except I/O ports

I/O ports

Output voltage ^{*1, 2}

V_O

I_IK

Input clamp current

Output clamp current

Continuous output current

I_OK

I_O

±50

V_O< 0 or V_O> V_CC

V_O= 0 to V_CC

±50

±100

Maximum power dissipation

P_T

TSSOP

at Ta = 55°C (in still air) ^*3

Storage temperature

Tstg

–65 to 150

°C

Notes:

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage

to the device. These are stress ratings only, and functional operation of the device at these or

any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute maximum rated conditions for extended periods may affect device

reliability.

1. The input and output negative voltage ratings may be exceeded if the input and output clamp

current ratings are observed.

2. This value is limited to 4.6 V maximum.

3. The maximum package power dissipation is calculated using a junction temperature of 150°C

and a board trace length of 750 mils.

Recommended Operating Conditions

Item

Symbol

V_CC

Min

2.3

Max

3.6

V_CC

–12

–24

Unit

Conditions

Supply voltage

Input voltage

V_I

Output voltage

High level output current

V_O

I_OH

—

V_CC= 2.3 V

V_CC= 2.7 V

V_CC= 3.0 V

V_CC= 2.3 V

V_CC= 2.7 V

V_CC= 3.0 V

Low level output current

I_OL

Input transition rise or fall rate

Operating temperature

∆t / ∆v

ns / V

–40

°C

Note: Unused control inputs must be held high or low to prevent them from floating.

HD74ALVCH16500

Logic Diagram

OEAB

CLKAB

LEAB

LEBA

CLKBA

OEBA

CLK

To seventeen other channels

HD74ALVCH16500

Electrical Characteristics (Ta = –40 to 85°C)

Item

Symbol V_CC(V) ^*1

Min

Max

—

Unit Test Conditions

Input voltage

V_IH

2.3 to 2.7 1.7

2.7 to 3.6 2.0

—

V_IL

2.3 to 2.7

2.7 to 3.6

—

0.7

0.8

—

Output voltage

V_OH

Min to Max V_CC–0.2

I_OH= –100 µA

2.3

2.7

3.0

2.0

1.7

2.2

2.4

2.0

—

I_OH= –6 mA, V_IH= 1.7 V

I_OH= –12 mA, V_IH= 1.7 V

I_OH= –12 mA, V_IH= 2.0 V

I_OH= –24 mA, V_IH= 2.0 V

I_OL= 100 µA

—

V_OL

Min to Max —

0.2

0.4

0.7

0.4

0.55

±5

2.3

—

I_OL= 6 mA, V_IL= 0.7 V

I_OL= 12 mA, V_IL= 0.7 V

I_OL= 12 mA, V_IL= 0.8 V

I_OL= 24 mA, V_IL= 0.8 V

V_IN= V_CCor GND

V_IN= 0.7 V

2.3

—

2.7

—

3.0

—

Input current

I_IN

3.6

—

µA

I_{IN (hold)}

2.3

–45

–75

—

2.3

—

V_IN= 1.7 V

3.0

—

V_IN= 0.8 V

3.0

—

V_IN= 2.0 V

3.6

±500

±10

V_IN= 0 to 3.6 V

Off state output current ^*2I_OZ

Quiescent supply current I_CC

3.6

—

µA

V_OUT= V_CCor GND

V_IN= V_CCor GND

3.6

—

∆I_CC

3.0 to 3.6

—

750

V_IN= one input at (V_CC–0.6) V,

other inputs at V_CCor GND

Notes: 1. For conditions shown as Min or Max, use the appropriate values under recommended operating

conditions.

2. For I/O ports, the parameter I_OZincludes the input leakage current.

HD74ALVCH16500

Switching Characteristics (Ta = –40 to 85°C)

Item

Symbol V_CC(V) Min

Typ

Max

Unit FROM

(Input)

(Output)

Maximum clock frequency f_max

2.5±0.2 150

2.7 150

—

4.0

8.0

—

MHz

—

3.3±0.3 150

2.5±0.2 1.0

—

Propagation delay time

t_PLH

t_PHL

5.1

4.7

3.9

5.9

5.5

4.7

6.1

6.6

5.5

5.7

5.4

4.6

6.1

6.2

5.2

6.2

5.7

5.0

5.4

4.6

4.3

—

A or B

B or A

2.7

—

3.3±0.3 1.0

2.5±0.2 1.0

LEAB or A or B

LEBA

2.7

—

3.3±0.3 1.0

2.5±0.2 1.0

CLKAB or A or B

2.7

—

CLKBA

3.3±0.3 1.1

2.5±0.2 1.0

Output enable time

t_ZH

t_ZL

OEAB

OEBA

OEAB

OEBA

2.7

—

3.3±0.3 1.0

2.5±0.2 1.0

2.7

—

3.3±0.3 1.0

2.5±0.2 1.7

Output disable time

t_HZ

t_LZ

2.7

—

3.3±0.3 1.5

2.5±0.2 1.0

2.7

—

3.3±0.3 1.0

Input capacitance

Output capacitance

C_IN

3.3

—

Control inputs

A or B ports

C_{IN / O}

—

HD74ALVCH16500

Switching Characteristics (Ta = –40 to 85°C) (Cont)

Item

Symbol V_CC(V)

t_su2.5±0.2 1.7

2.7 1.4

Min

Typ

—

Max

—

Unit

FROM (Input)

Setup time

Data before CLK↓

3.3±0.3 1.3

2.5±0.2 1.1

Data before LE↓

CLK “H”

2.7

1.0

3.3±0.3 1.0

2.5±0.2 1.9

Data before LE↓

CLK “L”

2.7

1.6

3.3±0.3 1.4

2.5±0.2 1.7

Hold time

t_h

Data after CLK↓

2.7

1.6

3.3±0.3 1.3

2.5±0.2 2.0

Data after LE↓

CLK “H”

2.7

1.8

3.3±0.3 1.5

2.5±0.2 1.6

Data after LE↓

CLK “L”

2.7

1.5

3.3±0.3 1.2

2.5±0.2 3.3

Pulse width

t_w

LE “H”

2.7

3.3

3.3±0.3 3.3

2.5±0.2 3.3

CLK “H” or “L”

2.7

3.3

3.3±0.3 3.3

HD74ALVCH16500

• Test Circuit

See under table

500 Ω

OPEN

GND

C_L= 50 pF

500 Ω

Load Circuit for Outputs

Vcc=2.7V,

Vcc=2.5±0.2V

Symbol

3.3±0.3V

t_PLH/ t_PHL

t_su/ t_h/ t_w

OPEN

t_ZH/ t_HZ

t_ZL/ t_LZ

GND

4.6 V

GND

6.0 V

Note: 1. C_Lincludes probe and jig capacitance.

HD74ALVCH16500

• Waveforms – 1

90 %

V_ref

90 %

V_ref

Input

10 %

GND

t_PHL

t_PLH

V_OH

Output

V_ref

V_OL

• Waveforms – 2

90 %

V_ref

Timing Input

10 %

t_su

GND

t_h

V_ref

Data Input

GND

t_w

V_ref

Input

GND

HD74ALVCH16500

• Waveforms – 3

90 %

V_ref

90 %

V_ref

Output

Control

10 %

t_ZL

10 %

GND

t_LZ

≈V_OH1

V_ref

Waveform - A

Waveform - B

V_OL+ 0.3 V

V_OH– 0.3 V

V_OL

V_OH

t_ZH

t_HZ

V_ref

≈V_OL1

Vcc=2.7V,

Vcc=2.5±0.2V

2.3 V

TEST

3.3±0.3V

V_IH

2.7 V

V_ref

1.2 V

1.5 V

3.0 V

GND

V_OH1

V_OL1

2.3 V

GND

Notes: 1. All input pulses are supplied by generators having the following characteristics:

PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

2. Waveform – A is for an output with internal conditions such that the output is low

except when disabled by the output control.

3. Waveform – B is for an output with internal conditions such that the output is high

except when disabled by the output control.

4. The output are measured one at a time with one transition per measurement.

HD74ALVCH16500

Package Dimensions

Unit : mm

+0.3

–0.1

14.00

0.50

+0.1

–0.05

0.08

0.20

8.10 ± 0.3

0.40 Max

10° Max

0.50 ± 0.1

0.10

Hitachi code

EIAJ code

JEDEC code

TTP-56D

—

HD74ALVCH16500

Cautions

1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,

Hitachi bears no responsibility for problems that may arise with third party’s rights, including

intellectual property rights, in connection with use of the information contained in this document.

2. Products and product specifications may be subject to change without notice. Confirm that you have

received the latest product standards or specifications before final design, purchase or use.

3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,

contact Hitachi’s sales office before using the product in an application that demands especially high

quality and reliability or where its failure or malfunction may directly threaten human life or cause risk

of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,

traffic, safety equipment or medical equipment for life support.

4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly

for maximum rating, operating supply voltage range, heat radiation characteristics, installation

conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used

beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable

failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-

safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other

consequential damage due to operation of the Hitachi product.

5. This product is not designed to be radiation resistant.

6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without

written approval from Hitachi.

7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor

products.

Hitachi, Ltd.

Semiconductor & Integrated Circuits.

Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan

Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109

URL

NorthAmerica

Europe

: http:semiconductor.hitachi.com/

: http://www.hitachi-eu.com/hel/ecg

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: http://www.has.hitachi.com.sg/grp3/sicd/index.htm

: http://www.hitachi.com.tw/E/Product/SICD_Frame.htm

Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm

Japan

: http://www.hitachi.co.jp/Sicd/index.htm

For further information write to:

Hitachi Semiconductor

(America) Inc.

Hitachi Europe GmbH

Hitachi Asia (Hong Kong) Ltd.

Group III (Electronic Components)

7/F., North Tower, World Finance Centre,

Harbour City, Canton Road, Tsim Sha Tsui,

Kowloon, Hong Kong

Tel: <852> (2) 735 9218

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Hitachi Asia Pte. Ltd.

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Singapore 049318

Tel: 535-2100

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Germany

Tel: <49> (89) 9 9180-0

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179 East Tasman Drive,

San Jose,CA 95134

Tel: <1> (408) 433-1990

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Taipei Branch Office

3F, Hung Kuo Building. No.167,

Tun-Hwa North Road, Taipei (105)

Tel: <886> (2) 2718-3666

Fax: <886> (2) 2718-8180

Telex: 40815 HITEC HX

Hitachi Europe Ltd.

Electronic Components Group.

Whitebrook Park

Lower Cookham Road

Maidenhead

Berkshire SL6 8YA, United Kingdom

Tel: <44> (1628) 585000

Fax: <44> (1628) 778322

HD74ALVCH16500T-EL [HITACHI]

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