HD74LV161AT-ELL [HITACHI]
Binary Counter, PDSO16, TTP-16DA;
| 型号： | HD74LV161AT-ELL |
| 厂家： | 
HITACHI SEMICONDUCTOR |
| 描述： | Binary Counter, PDSO16, TTP-16DA 计数器 |
| 文件： | 总19页 (文件大小：86K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74LV161A
Synchronous 4-bit Binary Counter (Direct Clear)
ADE-205-264A (Z)
2nd Edition
June 1999
Description
The HD74LV161A is 4-bit binary counters. All flip flops are clocked simultaneously on the low to high to
transition (positive edge) of the clock input waveform. These counters may be preset using the load input.
Presetting of all four flip flops is synchronous to the rising edge of clock. When load is held low counting
is disabled and tha data on the A, B, C and D inputs is loaded into the counter on the rising edge clock. If
the load input is taken high before the positive edge of clock the count operation will be unaffected.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
HD74LV161A
Function Table
Inputs
Outputs
QA
CLR
L
LOAD
ENP
X
ENT
X
CLK
QB
L
QC
L
QD
L
X
L
X
↑
↑
↑
↑
↓
L
H
X
X
A
B
C
D
H
H
H
H
X
X
L
No change
No change
Count up
No change
H
L
X
H
H
H
H
X
X
Note: H: High level
L: Low level
X: Immaterial
↑: Low to high transition
↓: High to low transition
A, B, C, D: Data input
Carry = ENT • QA • QB • QC • QD
Pin Arrangement
1
2
3
4
5
6
7
8
16 VCC
CLR
CK
A
CARRY
15
14
13
12
11
10
9
OUTPUT
QA
QB
B
QC
C
QD
D
ENP
GND
ENT
LOAD
(Top view)
2
HD74LV161A
Absolute Maximum Ratings
Item
Symbol
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
Unit
V
Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
V
H or L
VO
V
Output: H or L
VCC: OFF
Input clamp current
IIK
mA
mA
mA
mA
VI < 0
Output clamp current
IOK
±50
VO < 0 or VO > VCC
VO = 0 to VCC
Continuous output current
IO
±25
Continuous current through
ICC or IGND
±50
V
CC or GND
Maximum power dissipation
PT
785
mW
SOP
at Ta = 25°C (in still air)*3
500
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
3
HD74LV161A
Recommended Operating Conditions
Item
Symbol
VCC
Min
2.0
0
Max
5.5
5.5
VCC
–50
–2
Unit
V
Conditions
Supply voltage range
Input voltage range
Output voltage range
Output current
VI
V
VO
0
V
IOH
—
—
—
—
—
—
—
—
0
µA
mA
VCC = 2.0 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.0 V
–6
–12
50
IOL
µA
2
mA
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
6
12
Input transition rise or fall rate
∆t /∆v
200
100
20
ns/V
0
0
Operating free-air temperature Ta
–40
85
°C
Note: Unused or floating inputs must be held high or low.
4
HD74LV161A
Logic Diagram
CLK
Output
QA
CLR
D
Q
CK
Q
LOAD
CLR
P
Enable
T
A
Output
QB
D
Q
CK
Q
CLR
B
C
D
Output
QC
D
Q
CK
Data
Inputs
Q
CLR
Output
QD
D
Q
CK
Q
CLR
Carry
Output
5
HD74LV161A
Timing Diagram
CLR
LOAD
A
B
Data
Inputs
C
D
CLK
ENP
ENT
QA
QB
Out
puts
QC
QD
Carry
12
13
14
15
0
1
2
Count
Inhibit
Clear
Preset
(Load)
6
HD74LV161A
DC Electrical Characteristics
•
Ta = –40 to 85°C
Item
Symbol
VCC (V)*
2.0
Min
Typ
—
—
—
—
—
—
—
—
—
Max
—
Unit
Test Conditions
Input voltage
VIH
1.5
V
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
V
V
V
CC × 0.7
—
CC × 0.7
CC × 0.7
—
—
VIL
—
0.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
—
V
V
V
CC × 0.3
—
CC × 0.3
CC × 0.3
—
Output voltage
VOH
Min to
Max
VCC – 0.1
—
V
IOL = –50 µA
2.3
3.0
4.5
2.0
2.48
3.8
—
—
—
—
—
—
—
—
0.1
IOL = –2 mA
IOL = –6 mA
IOL = –12 mA
IOL = 50 µA
VOL
Min to
Max
2.3
—
—
—
—
—
—
—
—
—
—
0.4
0.44
0.55
±1
IOL = 2 mA
3.0
IOL = 6 mA
4.5
IOL = 12 mA
Input current
IIN
0 to 5.5
5.5
µA
µA
VIN = 5.5 V or GND
VIN = VCC or GND, IO = 0
Quiescent
ICC
20
supply current
Output leakage IOFF
current
0
—
—
—
5
µA
VO = 5.5 V
Input
CIN
3.3
1.7
—
pF
VI = VCC or GND
capacitance
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
7
HD74LV161A
Switching Characteristics
•
VCC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
FROM
(Input)
TO
Item
Symbol Min
Typ
Max Min
Max
Unit
Test Conditions
(Output)
Maximum
clock
fmax
50
90
—
40
—
MHz
CL = 15 pF
frequency
30
—
60
—
25
—
CL = 50 pF
CL = 15 pF
Propa-
tPLH/tPHL
11.1 16.2 1.0
19.5
ns
CLK
Q
gation
delay time
—
—
—
14.3 19.2 1.0
11.5 17.0 1.0
14.7 20.0 1.0
22.5
20.5
23.5
CL = 50 pF
CL = 15 pF
CL = 50 pF
tPLH/tPHL
CLK
CLK
Carry
Carry
Count
mode
tPLH/tPHL
—
—
13.8 20.6 1.0
17.0 23.6 1.0
24.5
27.5
CL = 15 pF
CL = 50 pF
Load
mode
tPLH/tPHL
—
10.3 15.7 1.0
14.0 18.7 1.0
11.7 17.0 1.0
14.7 20.0 1.0
11.2 16.6 1.0
14.4 19.6 1.0
19.0
22.0
20.5
23.5
20.0
23.0
—
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
ENT
CLR
CLR
Carry
Q
—
tPHL
—
—
tPHL
—
Carry
—
Setup time tsu
7.5
10.0
9.5
—
—
—
—
—
—
8.5
ns
Data before CLK ↑
LOAD before CLK ↑
11.5
11.0
—
—
ENT, ENP before CLK
↑
4.5
—
—
4.5
—
CLR inactive before
CLK ↑
Hold time
th
1.5
7.0
—
—
—
—
1.5
7.0
—
—
ns
ns
Pulse
width
tw
CLK H or L
7.0
—
—
7.0
—
CLR L
8
HD74LV161A
Switching Characteristics (cont)
•
VCC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
FROM
(Input)
TO
Item
Symbol Min
Typ
130
Max
Min
Max
Unit
Test Conditions
(Output)
Maximum
clock
fmax
80
—
70
—
MHz
CL = 15 pF
frequency
55
—
85
—
50
—
CL = 50 pF
CL = 15 pF
Propa-
tPLH/tPHL
8.3
12.8
1.0
15.0
ns
CLK
Q
gation
delay time
—
—
—
10.8 16.3
8.7 13.6
1.0
1.0
1.0
18.5
16.0
19.5
CL = 50 pF
CL = 15 pF
CL = 50 pF
tPLH/tPHL
CLK
CLK
Carry
Carry
Count
mode
11.2 17.1
tPLH/tPHL
—
—
11.0 17.2
13.5 20.7
1.0
1.0
20.0
23.5
CL = 15 pF
CL = 50 pF
Load
mode
tPLH/tPHL
—
7.5
10.5 15.8
8.9 13.6
11.2 17.1
8.4 13.2
10.9 16.7
12.3
1.0
1.0
1.0
1.0
1.0
1.0
6.5
9.5
9.0
14.5
18.0
16.0
19.5
15.5
19.0
—
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
ENT
CLR
CLR
Carry
Q
—
tPHL
—
—
tPHL
—
Carry
—
Setup time tsu
5.5
8.0
7.5
—
—
—
—
—
—
ns
Data before CLK ↑
LOAD before CLK ↑
—
—
ENT, ENP before CLK
↑
2.5
—
—
2.5
—
CLR inactive before
CLK ↑
Hold time
th
1.0
5.0
—
—
—
—
1.0
5.0
—
—
ns
ns
Pulse
width
tw
CLK H or L
5.0
—
—
5.0
—
CLR L
9
HD74LV161A
Switching Characteristics (cont)
•
VCC = 5.0 ± 0.5 V
Ta = 25°C
Ta = –40 to 85°C
FROM
(Input)
TO
Item
Symbol Min
Typ
185
Max
Min
Max
Unit
Test Conditions
(Output)
Maximum
clock
fmax
135
—
115
—
MHz
CL = 15 pF
frequency
95
—
125
4.9
—
85
—
CL = 50 pF
CL = 15 pF
Propa-
tPLH/tPHL
8.1
1.0
9.5
ns
CLK
Q
gation
delay time
—
—
—
8.7
4.9
6.4
10.1
8.1
1.0
1.0
1.0
11.5
9.5
CL = 50 pF
CL = 15 pF
CL = 50 pF
tPLH/tPHL
CLK
CLK
Carry
Carry
Count
mode
10.1
20.0
tPLH/tPHL
—
—
6.2
7.7
10.3
12.3
1.0
1.0
12.0
14.0
CL = 15 pF
CL = 50 pF
Load
mode
tPLH/tPHL
—
4.9
6.4
5.5
7.0
5.0
6.5
—
8.1
10.1
9.0
11.0
8.6
10.6
—
1.0
1.0
1.0
1.0
1.0
1.0
4.5
6.0
6.0
9.5
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
ENT
CLR
CLR
Carry
Q
—
11.5
10.5
12.5
10.0
12.0
—
tPHL
—
—
tPHL
—
Carry
—
Setup time tsu
4.5
5.0
5.0
ns
Data before CLK ↑
LOAD before CLK ↑
—
—
—
—
—
—
ENT, ENP before CLK
↑
1.5
—
—
1.5
—
CLR inactive before
CLK ↑
Hold time
th
1.0
5.0
—
—
—
—
1.0
5.0
—
—
ns
ns
Pulse
width
tw
CLK H or L
5.0
—
—
5.0
—
CLR L
10
HD74LV161A
Operating Characteristics
•
CL = 50 pF
Ta = 25°C
Min
Item
Symbol VCC (V)
Typ
Max
Unit
Test Conditions
Power
CPD
3.3
—
17.0
—
pF
f = 10 MHz
dissipation
capacitance
5.0
—
20.4
—
Noise Characteristics
•
CL = 50 pF
Ta = 25°C
Min
Item
Symbol VCC (V)
Typ
Max
Unit
Test Conditions
Quiet output, VOL (P)
maximum
dynamic VOL
3.3
3.3
3.3
3.3
3.3
—
0.3
0.8
V
Quiet output, VOL (V)
minimum
dynamic VOL
—
–0.3
3.0
—
–0.8
—
Quiet output, VOH (V)
minimum
dynamic VOH
—
High-level
dynamic
VIH (D)
2.31
—
—
V
input voltage
Low-level
dynamic
VIL (D)
—
0.99
input voltage
11
HD74LV161A
Test Circuit
Measurement point
*
C L
Note: 1. CL includes the probe and jig capacitance.
12
HD74LV161A
Waveform
Waveform – 1
Count mode
t
t
wL
wH
V
CC
CLK
50%V
CC
50%V
CC
GND
V
V
OH
OL
Q,
CARRY
50%V
50%V
CC
CC
t
t
pHL
pLH
Waveform – 2
Preset mode
V
CC
LOAD
50%V
50%V
su
CC
CC
GND
t
t
t
t
h
su
h
A~D
CLK
50%V
CC
t
t
su
h
V
CC
50%V
50%V
CC
CC
GND
t
t
pLH,pHL
V
V
OH
OL
Q,
CARRY
50%V
CC
13
HD74LV161A
Waveform – 3
Count enable mode
V
CC
ENP
ENT
50%V
50%V
CC
CC
GND
t
t
t
t
h
su
h
su
V
CC
CK
50%V
50%V
CC
CC
GND
V
V
OH
OL
Q
Waveform – 4
Clear mode
V
CC
CLR
50%V
CC
GND
t
wL
V
CC
CLK
50%V
CC
GND
t
su
V
V
OH
OL
Q,
CARRY
50%V
CC
t
pHL
14
HD74LV161A
Waveform – 5
Cascade mode
(Set to maximum count number)
VCC
ENT
50%VCC
50%VCC
GND
VOH
CARRY
50%VCC
50%VCC
VOL
tpLH
tpHL
Note:
1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t r≤ 3 ns, t f ≤ 3 ns
Application
Cascade circuitry
H: COUNT
L: DISABLE
INPUTS
INPUTS
INPUTS
LD
A
B
C
D
LD
A
B
C
D
LD
A
B
C
D
ENP
ENT
CK
ENP
ENT
CK
ENP
ENT
CK
H: COUNT
L: DISABLE
CARRY
CARRY
CARRY
to next stages
CLR QA QB QC QD
CLR QA QB QC QD
CLR QA QB QC QD
OUTPUT
OUTPUT
OUTPUT
CLR
CLK
15
HD74LV161A
Package Dimensions
10.06
10.5 Max
9
16
1
8
+ 0.20
7.80
– 0.30
0.80 Max
1.15
0° – 8°
1.27
0.70 ± 0.20
0.42 ± 0.08
0.40 ± 0.06
0.15
M
0.12
Hitachi Code
JEDEC
EIAJ
FP-16DA
—
Conforms
Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.24 g
16
HD74LV161A
Unit: mm
9.9
10.3 Max
9
16
1
8
1.27
+ 0.10
6.10
– 0.30
1.08
0.635 Max
0° – 8°
+ 0.67
0.60
– 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
0.25
M
Hitachi Code
JEDEC
EIAJ
FP-16DN
Conforms
Conforms
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.15 g
17
HD74LV161A
5.0
5.3 Max
16
9
8
1
0.65
0.13 M
0.65 Max
1.0
+ 0.08
– 0.07
0.22
0.20 ± 0.06
6.40 ± 0.20
0° – 8°
0.50 ± 0.10
0.10
Hitachi Code
JEDEC
EIAJ
TTP-16DA
—
—
Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.05 g
18
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica
Europe
: http:semiconductor.hitachi.com/
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Asia (Singapore)
Asia (Taiwan)
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: http://www.hitachi.com.tw/E/Product/SICD_Frame.htm
Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm
Japan
: http://www.hitachi.co.jp/Sicd/indx.htm
For further information write to:
Hitachi Semiconductor
(America) Inc.
Hitachi Europe GmbH
Hitachi Asia (Hong Kong) Ltd.
Group III (Electronic Components)
7/F., North Tower, World Finance Centre,
Harbour City, Canton Road, Tsim Sha Tsui,
Kowloon, Hong Kong
Tel: <852> (2) 735 9218
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Hitachi Asia Pte. Ltd.
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Tel: 535-2100
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Germany
Tel: <49> (89) 9 9180-0
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179 East Tasman Drive,
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Fax: 535-1533
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3F, Hung Kuo Building. No.167,
Tun-Hwa North Road, Taipei (105)
Tel: <886> (2) 2718-3666
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Hitachi Europe Ltd.
Electronic Components Group.
Whitebrook Park
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Berkshire SL6 8YA, United Kingdom
Tel: <44> (1628) 585000
Fax: <44> (1628) 778322
Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
相关型号：
HD74LV161ATELL
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HD74LV163ATELL-E
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