HD74LV164A8_技术文档

HD74LV164A

8-bit Parallel-out Serial-in Shift Register

ADE-205-266 (Z)

1st Edition

March 1999

Description

The HD74LV164A is 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type

master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A low at either or

both inputs inhibits entry of new data and resets the first flip-flop to the low level at the next clock pulse. A

high level on one input enables the other input which will then determine the state of the first flip-flop.

Data at the serial inputs may be changed while the clock is high or low, but only information meeting the

setup and hold time but only information meeting the setup and hold time requirements will be entered.

Data is serially shifted in and out of the 8-bit register during the positive going transition of the clock pulse.

Clear is independent of the clock and accomplished by low level at the clear input.

Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook

computers), and the low-power consumption extends the battery life.

Features

•

V_CC= 2.0 V to 5.5 V operation

All inputs V_IH(Max.) = 5.5 V (@V_CC= 0 V to 5.5 V)

All outputs V_O(Max.) = 5.5 V (@V_CC= 0 V)

Typical V_OLground bounce < 0.8 V (@V_CC= 3.3 V, Ta = 25°C)

Typical V_OHundershoot > 2.3 V (@V_CC= 3.3 V, Ta = 25°C)

Output current ±6 mA (@V_CC= 3.0 V to 3.6 V), ±12 mA (@V_CC= 4.5 V to 5.5 V)

HD74LV164A

Function Table

Inputs

Outputs

CLR

L

CLK

A

X

H

L

B

X

H

X

L

QA

L

QB

L

...

QD

L

X

↓

↑

H

Q_A0

H

Q_B0

Q_An

Q_H0

Q_Gn

H

L

H

X

L

Note: H: High level

L: Low level

X: Immaterial

↑: Low to high transition

↓: High to low transition

Q_AD, Q_B0...Q_H0: Outputs remain unchanged.

Q_An, Q_Bn...Q_Gn: Data shifted from the previous stage on a positive edge at the clock input.

Pin Arrangement

1

2

3

4

5

6

7

14 V_CC

A

B

13

12

11

10

9

Q_H

Q_A

Q_B

Q_C

Q_D

GND

Q_G

Q_F

Q_E

CLR

CLK

8

(Top view)

2

HD74LV164A

Absolute Maximum Ratings

Item

Symbol

Ratings

–0.5 to 7.0

–0.5 to V_CC+ 0.5

–0.5 to 7.0

–20

Unit

V

Conditions

Supply voltage range

Input voltage range*¹

Output voltage range*^{1, 2}

V_CC

V_I

V

V_O

V

Output: H or L

V_CC: OFF

Input clamp current

I_IK

mA

V_I< 0

Output clamp current

I_OK

±50

V_O< 0 or V_O> V_CC

V_O= 0 to V_CC

Continuous output current

I_O

±25

Continuous current through

I_CCor I_GND

±50

V

_CCor GND

Maximum power dissipation

P_T

785

mW

SOP

at Ta = 25°C (in still air)*³

500

TSSOP

Storage temperature

Tstg

–65 to 150

°C

Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,

no two of which may be realized at the same time.

1. The input and output voltage ratings may be exceeded if the input and output clamp-current

ratings are observed.

2. This value is limited to 5.5 V maximum.

3. The maximum package power dissipation was calculated using a junction temperature of 150°C.

3

HD74LV164A

Recommended Operating Conditions

Item

Symbol

V_CC

Min

2.0

0

Max

5.5

V_CC

–50

–2

Unit

V

Conditions

Supply voltage range

Input voltage range

Output voltage range

Output current

V_I

V

V_O

0

V

H or L

I_OH

—

0

µA

mA

V_CC= 2.0 V

V_CC= 2.3 to 2.7 V

V_CC= 3.0 to 3.6 V

V_CC= 4.5 to 5.5 V

V_CC= 2.0 V

–6

–12

50

I_OL

µA

2

mA

V_CC= 2.3 to 2.7 V

V_CC= 3.0 to 3.6 V

V_CC= 4.5 to 5.5 V

V_CC= 2.3 to 2.7 V

V_CC= 3.0 to 3.6 V

V_CC= 4.5 to 5.5 V

6

12

Input transition rise or fall rate

∆t /∆v

200

100

20

ns/V

0

Operating free-air temperature Ta

–40

85

°C

Note: Unused or floating inputs must be held high or low.

4

HD74LV164A

Logic Diagram

8

CLK

C1

1D

C1

1D

C1

1D

C1

1D

C1

1D

C1

1D

C1

1D

C1

1D

1

A

2

B

R

9

CLR

3

4

5

6

10

11

12

13

Q

H

A

B

C

D

E

F

G

Timing Diagram

CLR

A

B

CLK

Q_A

Q_B

Q_C

Q_D

Q_E

Q_F

Q_G

Q_H

Clear

5

HD74LV164A

DC Electrical Characteristics

•

Ta = –40 to 85°C

Item

Symbol

V_CC(V)*

2.0

Min

Typ

—

Max

—

Unit

Test Conditions

Input voltage

V_IH

1.5

V

2.3 to 2.7

3.0 to 3.6

4.5 to 5.5

2.0

V

_CC× 0.7

—

_CC× 0.7

—

V_IL

—

0.5

2.3 to 2.7

3.0 to 3.6

4.5 to 5.5

—

V

_CC× 0.3

—

_CC× 0.3

—

Output voltage

V_OH

Min to

Max

V_CC– 0.1

—

V

I_OL= –50 µA

2.3

3.0

4.5

2.0

2.48

3.8

—

0.1

I_OL= –2 mA

I_OL= –6 mA

I_OL= –12 mA

I_OL= 50 µA

V_OL

Min to

Max

2.3

—

0.4

0.44

0.55

±1

I_OL= 2 mA

3.0

I_OL= 6 mA

4.5

I_OL= 12 mA

Input current

I_IN

0 to 5.5

5.5

µA

V_I= 5.5 V or GND

V_I= V_CCor GND, I_O= 0

Quiescent

I_CC

20

supply current

Output leakage I_OFF

current

0

—

5

µA

V_Ior V_O= 0 V to 5.5 V

V_I= V_CCor GND

Input

C_IN

3.3

2.2

—

pF

capacitance

Note: For conditions shown as Min or Max, use the appropriate values under recommended operating

conditions.

6

HD74LV164A

Switching Characteristics

•

V_CC= 2.5 ± 0.2 V

Ta = 25°C

Ta = –40 to 85°C

FROM

(Input)

TO

Item

Symbol Min

Typ

Max

Min

Max

Unit

Test Conditions

(Output)

Maximum

clock

frequency

fmax

t_PLH/t_PHL

t_PHL

55

105

—

50

—

MHz C_L= 15 pF

45

—

85

—

40

—

C_L= 50 pF

Propa-

9.2

17.6

1.0

20.0

ns

C_L= 15 pF

CLK

Q

gation

delay time

—

11.5 21.1

8.6 16.0

10.8 19.5

1.0

8.5

3.0

24.0

18.0

22.0

—

C_L= 50 pF

C_L= 15 pF

C_L= 50 pF

—

CLR

—

Setup time t_su

6.5

3.0

—

ns

Data before CLK ↑

—

CLR inactive before

CLK ↑

Hold time

t_h

–0.5

6.0

—

0.0

6.5

—

ns

Data after CLK ↑

CLR L

Pulse

width

t_w

6.5

—

7.5

—

CLK H or L

7

HD74LV164A

Switching Characteristics (cont)

•

V_CC= 3.3 ± 0.3 V

Ta = 25°C

Ta = –40 to 85°C

FROM

(Input)

TO

Item

Symbol Min

Typ

Max

Min

Max

Unit

Test Conditions

(Output)

Maximum

clock

frequency

fmax

t_PLH/t_PHL

t_PHL

80

155

—

65

—

MHz C_L= 15 pF

50

—

120

6.4

—

45

—

C_L= 50 pF

Propa-

12.8

1.0

15.0

ns

C_L= 15 pF

CLK

Q

gation

delay time

—

8.3

6.0

7.9

—

16.3

12.8

16.3

—

1.0

6.0

2.5

18.5

15.0

18.5

—

C_L= 50 pF

C_L= 15 pF

C_L= 50 pF

—

CLR

—

Setup time t_su

5.0

2.5

ns

Data before CLK ↑

—

CLR inactive before

CLK ↑

Hold time

t_h

0.0

5.0

—

0.0

5.0

—

ns

Data after CLK ↑

CLR L

Pulse

width

t_w

5.0

—

5.0

—

CLK H or L

8

HD74LV164A

Switching Characteristics (cont)

•

V_CC= 5.0 ± 0.5 V

Ta = 25°C

Ta = –40 to 85°C

FROM

(Input)

TO

Item

Symbol Min

Typ

Max

Min

Max

Unit

Test Conditions

(Output)

Maximum

clock

frequency

fmax

t_PLH/t_PHL

t_PHL

125

220

—

105

—

MHz C_L= 15 pF

85

—

165

4.5

—

75

—

C_L= 50 pF

Propa-

9.0

1.0

10.5

ns

C_L= 15 pF

CLK

Q

gation

delay time

—

6.0

4.2

5.8

—

11.0

8.6

10.6

—

1.0

4.5

2.5

12.5

10.0

12.0

—

C_L= 50 pF

C_L= 15 pF

C_L= 50 pF

—

CLR

—

Setup time t_su

45

2.5

ns

Data before CLK ↑

—

CLR inactive before

CLK ↑

Hold time

t_h

1.0

5.0

—

1.0

5.0

—

ns

Data after CLK ↑

CLR L

Pulse

width

t_w

5.0

—

5.0

—

CLK H or L

9

HD74LV164A

Operating Characteristics

•

C_L= 50 pF

Ta = 25°C

Min

Item

Symbol V_CC(V)

Typ

Max

Unit

Test Conditions

Power

C_PD

3.3

—

48.1

—

pF

f = 10 MHz

dissipation

capacitance

5.0

—

47.5

—

Noise Characteristics

•

C_L= 50 pF

Ta = 25°C

Min

Item

Symbol V_CC(V)

Typ

Max

Unit

Test Conditions

Quiet output, V_{OL (P)}

maximum

dynamic V_OL

3.3

—

0.3

0.8

V

Quiet output, V_{OL (V)}

minimum

dynamic V_OL

—

–0.2

3.1

—

–0.8

—

Quiet output, V_{OH (V)}

minimum

dynamic V_OH

—

High-level

dynamic

V_{IH (D)}

2.31

—

V

input voltage

Low-level

dynamic

V_{IL (D)}

—

0.99

inout voltage

10

HD74LV164A

Test Circuit

Measurement point

*

C _L

Note: C_Lincludes the probe and jig capacitance.

11

HD74LV164A

Waveform

• Waveform – 1

Timing input

t_r

t_f

V_CC

0 V

V_CC

0 V

90%

50% V_CC

90%

50% V

CC

10%

t_su

t_h

Data input

50% V_CC

t_w

V_CC

0 V

Input

50% V_CC

• Waveform – 2

Input

t_r

t_f

V_CC

0 V

90%

50 % V

90%

50% V_CC

CC

10%

10 %

t_PHL

t_PLH

V_OH

In phase output

50% V_CC

50% V

CC

V_OL

t_PHL

t_PLH

V_OH

50% V_CC

50% V

CC

Out of phase output

V_OL

Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t_r≤ 3 ns, t_f≤ 3 ns

2. The output are measured one at a time with one transition per measurement.

12

HD74LV164A

Package Dimensions

10.06

10.5 Max

9

16

1

8

+ 0.20

7.80

– 0.30

0.80 Max

1.15

0° – 8°

1.27

0.70 ± 0.20

0.42 ± 0.08

0.40 ± 0.06

0.15

M

0.12

Hitachi Code

JEDEC

EIAJ

FP-16DA

—

Conforms

Dimension including the plating thickness

Base material dimension

Weight (reference value) 0.24 g

13

HD74LV164A

Unit: mm

9.9

10.3 Max

9

16

1

8

1.27

+ 0.10

6.10

– 0.30

1.08

0.635 Max

0° – 8°

+ 0.67

0.60

– 0.20

*0.42 ± 0.08

0.40 ± 0.06

0.15

0.25

M

Hitachi Code

JEDEC

EIAJ

FP-16DN

Conforms

*Dimension including the plating thickness

Base material dimension

Weight (reference value) 0.15 g

14

HD74LV164A

5.0

5.3 Max

16

1

9

8

0.65

0.13 M

0.65 Max

1.0

+ 0.08

– 0.07

0.22

0.20 ± 0.06

6.40 ± 0.20

0° – 8°

0.50 ± 0.10

0.10

Hitachi Code

JEDEC

EIAJ

TTP-16DA

—

Dimension including the plating thickness

Base material dimension

Weight (reference value) 0.05 g

15

Cautions

1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,

copyright, trademark, or other intellectual property rights for information contained in this document.

Hitachi bears no responsibility for problems that may arise with third party’s rights, including

intellectual property rights, in connection with use of the information contained in this document.

2. Products and product specifications may be subject to change without notice. Confirm that you have

received the latest product standards or specifications before final design, purchase or use.

3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,

contact Hitachi’s sales office before using the product in an application that demands especially high

quality and reliability or where its failure or malfunction may directly threaten human life or cause risk

of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,

traffic, safety equipment or medical equipment for life support.

4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly

for maximum rating, operating supply voltage range, heat radiation characteristics, installation

conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used

beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable

failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-

safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other

consequential damage due to operation of the Hitachi product.

5. This product is not designed to be radiation resistant.

6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without

written approval from Hitachi.

7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor

products.

Hitachi, Ltd.

Semiconductor & Integrated Circuits.

Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan

Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109

URL

NorthAmerica

Europe

: http:semiconductor.hitachi.com/

: http://www.hitachi-eu.com/hel/ecg

Asia (Singapore)

Asia (Taiwan)

: http://www.has.hitachi.com.sg/grp3/sicd/index.htm

: http://www.hitachi.com.tw/E/Product/SICD_Frame.htm

Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm

Japan

: http://www.hitachi.co.jp/Sicd/indx.htm

For further information write to:

Hitachi Semiconductor

(America) Inc.

Hitachi Europe GmbH

Hitachi Asia (Hong Kong) Ltd.

Group III (Electronic Components)

7/F., North Tower, World Finance Centre,

Harbour City, Canton Road, Tsim Sha Tsui,

Kowloon, Hong Kong

Tel: <852> (2) 735 9218

Fax: <852> (2) 730 0281

Hitachi Asia Pte. Ltd.

16 Collyer Quay #20-00

Hitachi Tower

Singapore 049318

Tel: 535-2100

Electronic components Group

Dornacher Stra§e 3

D-85622 Feldkirchen, Munich

Germany

Tel: <49> (89) 9 9180-0

Fax: <49> (89) 9 29 30 00

179 East Tasman Drive,

San Jose,CA 95134

Tel: <1> (408) 433-1990

Fax: <1>(408) 433-0223

Fax: 535-1533

Hitachi Asia Ltd.

Taipei Branch Office

3F, Hung Kuo Building. No.167,

Tun-Hwa North Road, Taipei (105)

Tel: <886> (2) 2718-3666

Fax: <886> (2) 2718-8180

Telex: 40815 HITEC HX

Hitachi Europe Ltd.

Electronic Components Group.

Whitebrook Park

Lower Cookham Road

Maidenhead

Berkshire SL6 8YA, United Kingdom

Tel: <44> (1628) 585000

Fax: <44> (1628) 778322


型号：	HD74LV164A8
厂家：	HITACHI SEMICONDUCTOR
描述：	8-bit Parallel-out Serial-in Shift Register 8位并行输出串行移位寄存器移位寄存器
文件：	总16页 (文件大小：69K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HD74LV164A8 [HITACHI]

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