HN62435P-12 [HITACHI]

MASK ROM, 512KX8, 120ns, CMOS, PDIP40, 0.600 INCH, PLASTIC, DIP-40;


型号：	HN62435P-12
厂家：	HITACHI SEMICONDUCTOR
描述：	MASK ROM, 512KX8, 120ns, CMOS, PDIP40, 0.600 INCH, PLASTIC, DIP-40 有原始数据的样本ROM 光电二极管内存集成电路
文件：	总9页 (文件大小：63K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HN62435 Series

262144-word × 16-bit/524288-word × 8-bit CMOS Mask

Programmable ROM

ADE-203-472A(Z)

Rev. 1.0

Nov. 16, 1995

Description

The HN62435 is a 4-Mbit CMOS mask-Programmable ROM organized either as 262144 words by 16 bits or

524288 words by 8 bits. Realizing a access speed of 120/150 ns (max) depend upon technology of a high

speed circuit.

Features

•

Single 5 V supply

High speed

Access time: 120/150 ns (max)

Low power

•

Active: 275 mW (max)

Standby: 165 µW (max)

•

Byte-wide or word-wide data organization (Switched by BHE terminal)

Three-state data output for or-tying

Directly TTL compatible

All inputs and outputs

•

Pin compatible with 4 Mbit EPROM (HN27C4000G/FP)

Ordering Information

Type No.

Access time

Package

HN62435P-12

HN62435P-15

120 ns

150 ns

600 mil 40-pin plastic DIP (DP-40)

HN62435FA-12

HN62435FA-15

120 ns

150 ns

525 mil 40-pin plastic SOP (FP-40D)

HN62435TT-12

HN62435TT-15

120 ns

150 ns

400 mil 44-pin plastic TSOP II (TTP-44D)

HN62435 Series

Pin Arrangement

HN62435P Series

HN62435FA Series

HN62435TT Series

A17

A10

A11

A12

A13

A14

A15

A16

BHE

V_SS

A10

A11

A12

A13

A14

A15

A16

BHE

V_SS

D10

D11

V_SS

D10

D11

D15/A-1

D14

D15/A-1

D14

D13

D12

D13

V_CC

D12

V_CC

(Top View)

Pin Description

Pin name

Function

A-1, A0 to A17

Address inputs

Data outputs

D0 to D15

BHE

8/16 bit (byte/word) mode switch

Chip enable

Output enable

No connection

Power supply

V_CC

V_SS

Ground

HN62435 Series

Block Diagram

A12

X Decoder

Memory Array

A17

A13

Address

Buffer

Y Decoder

Y Gates

(A-1)^*1

BHE

Hex/Byte

3-state output

buffer

D15/(D7)

BHE = V_IH: 16-bit (D15 to D0)

BHE = V_IL: 8-bit (D7 to D0)

Note : 1. A-1 is least significant address.

When BHE is 'low', D14 to D8 goes the high impedance state, and D15 should be A-1.

HN62435 Series

Mode Selection

Data output

D15/A-1 D0-D7

Address input

Mode

BHE

D8-D15

High-Z

LSB

—

MSB

Standby

High-Z^*2

—

Output disable

Read (16-bit)

Read (8-bit)

High-Z

—

Dout

D0 to D7

D8 to D15 A0

A17

High-Z

A-1

D8 to D15 High-Z

Notes: 1. ×: Don’t care.

2. High-Z: High impedance

Absolute Maximum Ratings

Parameter

Symbol

Value

Unit

Supply voltage^*1

V_CC

–0.3 to +7.0

–0.3 to V_CC+ 0.3

0 to + 70

All input and output voltage^*1

Operating temperature range

Storage temperature range

Temperature under bias

Note: 1. With respect to V_SS.

Vin, Vout

Topr

°C

Tstg

–55 to +125

–20 to +85

Tbias

Recommended DC Operating Conditions (Ta = 0 to + 70°C)

Parameter

Symbol

V_CC

Min

4.5

Typ

5.0

Max

5.5

Unit

Supply voltage

V_SS

Input voltage

V_IH

2.2

–0.3

—

V_CC+ 0.3

0.8

V_IL

—

HN62435 Series

DC Characteristics (V_CC= 5.0 V ± 10%, V_SS= 0 V, Ta = 0 to + 70°C)

Parameter

Symbol

Min

—

Max

Unit

µA

Test conditions

Supply current Active

I_CC

V_CC= 5.5 V, I_DOUT= 0 mA, t_RC= min

V_CC= 5.5 V, CE ≥ V_CC– 0.2 V

V_CC= 5.5 V, CE ≥ 2.2 V

Vin = 0 to V_CC

Standby I_SB1

Standby I_SB2

—

Input leakage current

|I_IL|

—

Output leakage current

Output voltage

|I_OL|

V_OH

V_OL

—

CE = 2.2 V, Vout = 0 to V_CC

I_OH= –205 µA

2.4

—

0.4

I_OL= 1.6 mA

Capacitance (V_CC= 5.0 V ± 10%, V_SS= 0 V, Ta = 25°C, Vin = 0 V, f = 1MHz)

Parameter

Symbol

Cin

Min

—

Max

Unit

Input capacitance^*1

Output capacitance^*1

Cout

—

Note: 1. This parameter is sampled and not 100% tested. D15/A-1 pin is output.

HN62435 Series

AC Characteristics (V_CC= 5.0 V ± 10%, V_SS= 0 V, Ta = 0 to + 70°C)

•

Output load: 1TTL + C_L= 100 pF (including jig)

Input pulse level: 0.6 to 2.4 V

Input and output timing reference levels: 1.5 V

Input rise and fall time: 5 ns

HN62435-12

HN62435-15

Parameter

Symbol

t_RC

Min

120

—

Max

Min

150

—

Max

Unit Note

Read cycle time

—

Address access time

CE access time

t_AA

120

—

150

—

t_ACE

t_OE

OE access time

BHE access time

t_BHE

t_DHA

t_DHC

t_DHO

t_DHB

t_CHZ

t_OHZ

t_BHZ

t_CLZ

Output hold time from address change

Output hold time from CE

Output hold time from OE

Output hold time from BHE

CE to output in high-Z

OE to output in high-Z

BHE to output in high-Z

CE to output in low-Z

OE to output in low-Z

BHE to output in low-Z

—

t_OLZ

t_BLZ

—

Note: 1. t_CHZ, t_OHZand t_BHZare defined as the time at which the output achieves the open circuit conditions

and are not referred to output voltage levels.

HN62435 Series

Timing Waveforms

Word Mode (BHE = ‘V_IH’) or Byte Mode (BHE = ‘V_IL’)

t_RC

Address

t_DHA

t_AA

t_ACE

t_DHC

t_CHZ

t_CLZ

t_OE

t_DHO

t_OHZ

t_OLZ

High-Z

Dout

High-Z

Valid data

Notes : 1. t_DHA, t_DHC, t_DHO: Determined by faster.

2. t_AA, t_ACE, t_OE: Determined by slower.

3. t_CLZ, t_OLZ: Determined by slower.

Word Mode, Byte Mode Switch

High-Z

A-1

High-Z

t_DHA

t_AA

BHE

t_BHZ

t_BHE

Valid data

D7 to D0

t_DHB

t_BLZ

High-Z

D15 to D8

Notes : 1. CE and OE are enable, A17 to A0 are valid.

2. D15/A-1 pin is in the output state when BHE is high, CE and OE are enable.

Therefore, the input signals of opposite phase to the output must not be applied to them.

HN62435 Series

Package Dimensions

HN62435P Series (DP-40)

Unit: mm

52.80

53.80 Max

1.20

2.57 Max

15.24

+ 0.13

– 0.05

0.25

0.48 ± 0.10

2.54 ± 0.25

0° – 15°

HN62435FA Series (FP-40D)

Unit: mm

26.00

26.20 Max

14.13 ± 0.30

1.72

1.04 Max

0 – 10°

1.27

0.40 ± 0.10

0.10

0.12 M

0.80 ± 0.20

HN62435 Series

Package Dimensions (cont)

HN62435TT Series (TTP-44D)

Unit: mm

18.41

18.81 Max

0.80

0.13

0.30 ± 0.10

11.76 ± 0.20

1.105 Max

0 – 5°

0.80

0.10

0.50 ± 0.10

HN62435P-12 [HITACHI]

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