MDR4212A [HITACHI]

SPECIALTY TELECOM CIRCUIT, XFO;
MDR4212A
型号: MDR4212A
厂家: HITACHI SEMICONDUCTOR    HITACHI SEMICONDUCTOR
描述:

SPECIALTY TELECOM CIRCUIT, XFO

电信 电信集成电路
文件: 总12页 (文件大小:81K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Preliminary Technical Data (v0.4, July, 1999)  
MDS/R4212A  
12-channel Optical Interconnect Modules  
Preliminary Product Disclaimer  
This preliminary data sheet is provided to assist you in the evaluation of functional samples of  
the products which are under development and for which reliability testing has not been  
completed. Hitachi, Ltd. reserves the right to change prices, features, functions, specifications,  
capabilities and release schedule, until it releases these products for general sales.  
FEATURES  
· 12-channel parallel transmission from DC to 800 Mbit/s per channel  
· Transmission distance up to 50 m  
· Compact size: 3.9 cm3, and low power consumption: 300 mW/ch  
· Single 3.3 V power supply  
· MPO (Multi-path Push-On) / MT (Mechanical Transfer) optical connector  
· Wide temperature range: Tc= 0 to 80°C  
· Reliable hermetically-sealed active components  
DESCRIPTION  
General  
Hitachi’s 12-channel parallel optical interconnects modules MDS/R4212A offer an attractive  
solution over the electrical interconnection bottleneck. The MDS/R4212A modules are used in  
applications that require very high data throughput such as high-speed computers, high-capacity  
communication systems, and large-capacity data-acquisition systems.  
The MDS/R4212A modules provide synchronous 11 data channels and single clock channel. Each  
data channel can handle from DC up to 800 Mbit/s data stream. Both the transmitter and receiver  
include latches to adjust the 11 data slots, which release from the optical transmission skew.  
The MDS/R4212A modules are fully integrated 12-channel optical interconnect modules. The  
MDS4212A transmitter consists of a monolithically integrated 12-channel LD (Laser Diode) array  
and driver array IC array. The MDR4212A receiver consists of a monolithically integrated 12-  
channel PD (PhotoDiode) array and receiver array IC. They are incorporated in hermetically  
sealed compact packages. The power consumption is 300 mW per channel.  
The MDS/R4212A modules require a single 3.3-V power supply. The MDS/R4212A modules  
have widely used MPO or MT optical connectors.  
PDF00002_MDS/R4212A_v0.4_9907  
Preliminary Technical Data of MDS/R4212A  
Block Diagram  
HITACHI  
MPO / MT MPO / MT  
Connector Connector  
MDR4212A  
MDS4212A  
LD array  
LD driver  
PD array  
DOO-0  
DOI-0  
DOO-1  
DOI-1  
DOO-2  
DOI-2  
DOO-3  
DOI-3  
DOO-4  
DOI-4  
DOO-5  
DOI-5  
DOO-6  
DOI-6  
DOO-7  
DOI-7  
DOO-8  
DOI-8  
DOO-9  
DOI-9  
DOO-A  
DOI-A  
DEI-0-P/N  
DEI-1-P/N  
DEI-2-P/N  
DEI-3-P/N  
DEI-4-P/N  
DEI-5-P/N  
DEI-6-P/N  
DEI-7-P/N  
DEI-8-P/N  
DEI-9-P/N  
DEI-A-P/N  
DEI-B  
DQ  
C
DQ  
C
DEO-0-P/N  
DEO-1-P/N  
DEO-2-P/N  
DEO-3-P/N  
DEO-4-P/N  
DEO-5-P/N  
DEO-6-P/N  
DEO-7-P/N  
DEO-8-P/N  
DEO-9-P/N  
DEO-A-P/N  
DEO-B  
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
DQ  
C
CLKOO  
CLKOI  
DQ  
C
CLKI-P/N  
CLKO-P/N  
STC-N  
STD-N  
SHUT1-n  
SHUT0-n  
Figure 1. Block diagram of MDS/R4212A  
- 2 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Functional Description  
(1) Latch (MDS4212A)  
No. DEI-[0:A]  
CLKI-p  
CLKOI  
DOO-[0:A]  
Remarks  
Emitting  
Extinction  
1
2
H
L
H
L
(2) Latch (MDR4212A)  
No. DOOI-[0:A]  
DEO-[0:A]  
Remarks  
Remarks  
1
2
H
L
H
L
(3) Shut Down (MDS4212A)  
No. STD-N  
STC-N  
-
Function  
1
L
DOO-[0:A] Shut  
down  
2
3
-
H
L
H
CLKOO Shut down  
(Normal Operation)  
(4) Timing Chart  
DEI-[0:A]  
CLKI-p/n  
Tst  
Tht  
DOO-[0:A]  
CLKOO  
Tstr  
Tstf  
Tw= 1/B  
Tw/2 Tw/2  
Tsrl  
Thrl  
DOI-[0:A]  
CLKOI  
Tsrh  
Thrh  
DEO-[0:A]  
CLKO-p/n  
Tsr  
- 3 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Recommended Circuit  
MDS4212A  
Transmission line  
Q
Q
Q
100W  
Q
Z0=100W  
LVDS  
Vpg< TBD V  
Figure 2. Recommended Termination Circuit (MDS4212A)  
MDR4211A  
Vcc  
Q
Q
Transmission line  
Q
100W  
Q
Z0=100W  
150W  
(a)  
MDR4211A  
Vcc  
120W  
33W  
Q
Q
Q
Transmission line  
To LVDS  
Q
51W  
(b)  
Figure 3. Recommended Termination Circuit (MDR4212A) for (a) PECL and (b) LVDS  
- 4 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
PERFORMANCE SPECIFICATIONS  
Absolute Maximum Ratings  
Table 1. Absolute Maximum Ratings  
No.  
1
2
Parameter  
Supply Voltage  
Input Voltage (High  
speed signal: DEI,  
CLKI)  
Symbol  
Vcc  
Vihs  
Min  
Vee - 0.3  
Vee - 0.5  
Max  
Vee + 4.5  
Vee + 2.0  
Unit  
V
V
Remarks  
100W  
termination  
included  
100W  
3
Input Voltage  
Vihsd  
-
0.6  
V
Difference (High speed  
signal: DEI, CLKI)  
termination  
included  
4 Input Voltage (Control Vics  
signal)  
Vee - 0.5  
-
Vcc  
26  
V
5 Output Current (High  
Speed Signal: DEO,  
CLKO)  
Iso  
mA  
6
7
Input Optical Power  
Operating Case  
Temperature  
Pi  
Tc  
0
80  
dBm  
°C  
0
0
8 Operating Connector  
Temperature  
9 Storage Temperature  
Tcn  
70  
80  
°C  
Tstr  
Lpg  
-20  
5.9  
°C  
N
10  
Fiber Array Tensile  
Strength  
Fiber Array Bend  
11  
Rpg  
30  
mm  
Radius  
Operating Environment  
The electrical and optical characteristics below are defined under this operating environment  
unless otherwise noted.  
Table 2. Operating Environment  
No.  
Parameter  
Symbol  
Min  
3.0  
0
Typ  
3.3  
Max  
3.6  
80  
Unit  
V
°C  
Remarks  
1 Power Supply Voltage Vcc  
2
Operating Case  
Temperature  
Tc  
Electrical Characteristics  
Table 3. Power Consumption  
No.  
1
Parameter  
Tx Power Consumption  
Symbol  
Pds  
Min  
Typ  
Max  
1.9  
Unit  
W
Remarks  
Rx Power Consumption  
2
Pdr  
1.7  
W
- 5 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Table 4. Electrical AC Characteristics  
No.  
1
2
Parameter  
Data rate  
Clock Frequency  
Symbol  
B
Fc  
Tst  
Tht  
Tsr  
Min  
DC  
TBD  
-
Typ  
Max  
Unit  
Remarks  
-
-
-
-
-
-
800 M bit/s synchronous  
800 M  
0.4  
0.4  
0.25  
0.3  
Hz  
ns  
ns  
ns  
ns  
3 Tx Input Set-up Time  
4
5
6
Tx Input Hold Time  
Rx Output Skew  
Rx Output Rise/Fall Trr/Tfr  
Time  
-
-0.25  
-
20 – 80%  
7 Tx Input Clock Duty  
Dci  
dDco  
45  
-10  
-
-
55  
10  
%
%
8
Clock Duty  
Degradation  
Table 5. Interface for data and clock channels  
No.  
Parameter  
High Level Input  
Voltage  
Symbol  
VIHs  
Min  
1.175  
Typ  
Max  
1.90  
Unit  
V
Remarks  
LVDS H out  
1
2
Low Level Input  
Voltage  
VILs  
0.925  
1.65  
V
LVDS L out  
3
4
5
Input Amplitude  
Offset Voltage  
VIAs  
Voffs  
VIHs  
0.25  
1.125  
2.230  
0.6  
1.775  
2.460  
V
V
V
LVDS out  
LVDS out  
High Level Output  
Voltage (Tc=0°C)  
Low Level Output  
Voltage (Tc=0°C)  
High Level Output  
Voltage (Tc=20°C)  
Low Level Output  
Voltage (Tc=20°C)  
High Level Output  
Voltage (Tc=80°C)  
Low Level Output  
Voltage (Tc=80°C)  
6
7
VILs  
VIHs  
VILs  
VIHs  
VILs  
1.350  
2.270  
1.350  
2.340  
1.350  
1.670  
2.490  
1.670  
2.580  
1.705  
V
V
V
V
V
8
9
10  
Table 6. LV-TTL Interface for control signals  
No.  
Parameter  
High Level Input  
Voltage  
Symbol  
VIH  
Min  
2.0  
Typ  
Max  
Unit  
V
Remarks  
1
2
3
4
Low Level Input  
Voltage  
High Level Output  
Voltage  
Low Level Output  
Voltage  
VIL  
VIH  
VIL  
0.8  
V
V
V
2.0  
0.8  
- 6 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Optical Characteristics  
Table 7. Optical Interface  
No.  
1
2
Parameter  
Wavelength  
Fiber  
Symbol  
Min  
-
-
Typ  
1310  
SMF  
Max  
-
-30  
Unit  
nm  
Remarks  
l T  
Table 8. Optical DC Characteristics  
No.  
Parameter  
Symbol  
Min  
-7.8  
Typ  
-
Max  
-3  
Unit  
dBm  
Remarks  
1 Tx High Level Output POH  
Power  
2 Tx Low Level Output  
Power  
3 Tx Shut-down Output  
Power  
POL  
PSH  
PIH  
PIL  
-
-
-
-
-
-30  
-30  
-3  
dBm  
-
-12.6  
-
dBm Data channls  
4
Rx High Level Input  
Power  
dBm  
dBm  
5
Rx Low Level Input  
Power  
-20  
Table 9. Optical Skew Characteristics  
No.  
Parameter  
Symbol  
Min  
0.2  
-0.1  
-
-
-
-
Typ  
Max  
0.2  
0.1  
0.3  
0.3  
0.3  
0.3  
Unit  
ns  
ns  
ns  
ns  
Remarks  
1 Tx Skew at rising edge Tstr  
2 Tx Skew at falling edge Tstf  
3 Rx Set-up Time for H Tsrh  
4 Rx Set-up Time for L Tsrl  
5
6
-
-
-
-
-
-
Rx Hold Time for L  
Rx Hold Time for H  
Thrl  
Thrh  
ns  
ns  
- 7 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Package Dimensions  
D
H
E
J
A
I
B
F
V
W
S
T
U
C
G
R
L
K
P
Q
f
f
46x  
N
M
DIM. MILLIMETERS  
INCHES  
DIM. MILLIMETERS  
INCHES  
MIN. TYP. MAX. MIN. TYP. MAX.  
MIN. TYP. MAX. MIN. TYP. MAX.  
A
B
C
D
E
F
G
H
I
TBD  
TBD  
TBD TBD  
13.5  
TBD  
50  
33  
12.59  
7.7  
TBD TBD  
TBD  
0.532  
TBD  
1.969  
1.300  
0.496  
0.304  
TBD  
0.185  
0.197  
L
M
N
f P  
f Q  
R
S
T
U
V
2.54  
15.24  
7.62  
0.100  
0.600  
0.300  
0.4  
0.8  
2.6  
0.5 0.016  
1.2 0.031  
3.4 0.102  
1.57 0.038  
0.020  
0.047  
0.134  
0.062  
0.97  
TBD  
1
3.5  
TBD  
0.039  
0.138  
4.7  
5
J
K
2.54  
0.1  
W
7.8  
8.2 0.307  
0.323  
- 8 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Pin Configuration  
Table 10. Pin configuration (MDS4212A)  
Description Pin Symbol  
24 Vee GND  
Pin Symbol  
Description  
1
2
3
4
5
6
7
8
9
STD-N Data channel shut down  
DEI-10-P DATA-10-P input  
25 DEI-3-P DATA-3-P input  
26 DEI-4-P DATA-4-P input  
Vcc  
+3.3V  
DEI-9-P DATA-9-P input  
27  
28 DEI-1-P DATA-1-P input  
29 Vcc +3.3V  
STC-N Clock channel shut down  
Vee  
Vcc  
GND  
+3.3V  
PPD-P (Normal operation.: L)  
Vee GND  
DEI-10-N DATA-10-N input  
30 DEI-2-P DATA-2-P input  
31 DEI-3-N DATA-3-N input  
32  
33 DEI-4-N DATA-4-N input  
34 CN2-P (Normal operation.: L)  
Vcc  
+3.3V  
10 DEI-9-N DATA-9-N input  
11 Vee GND  
12 DEI-8-P DATA-8-P input  
13 DEI-7-P DATA-7-P input  
35 DEI-1-N DATA-1-N input  
36 DEI-2-N DATA-2-N input  
14  
15 DEI-6-P DATA-6-P input  
16 Vcc +3.3V  
-
N.C.  
37  
38  
Vee  
GND  
CLK-P CLK-P input  
39 DEI-0-P DATA-0-P input  
17 DEI-5-P DATA-5-P input  
18 DEI-8-N DATA-8-N input  
40  
41  
42  
43  
44  
45  
FFD-P (Normal operation.: L)  
CO2-P (Normal operation.: L)  
19  
20 DEI-7-N DATA-7-N input  
21 Vee GND  
Vcc  
+3.3V  
Vcc  
Vee  
+3.3V  
GND  
CLK-N CLK-N input  
Vcc +3.3V  
22 DEI-6-N DATA-6-N input  
23 DEI-5-N DATA-5-N input  
46 DEI-0-N DATA-0-N input  
40 41 42 43 44 45 46  
34 35 36 37 38 39  
27 28 29 30 31 32 33  
21 22 23 24 25 26  
14 15 16 17 18 19 20  
8
9
10 11 12 13  
1
2
3
4
5
6
7
Top view  
- 9 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Table 11. Pin configuration (MDR4212A)  
Description Pin Symbol  
24 Vee GND  
Pin Symbol  
Description  
1
2
3
4
5
6
7
8
9
Vcc  
DEO-10-P DEO-10-P output  
Vcc +3.3V  
DEO-9-P DATA-9-P output  
+3.3V  
25 DEO-3-P DATA-3-P output  
26 DEO-4-P DATA-4-P output  
27  
28 DEO-1-P DATA-1-P output  
29 Vcc +3.3V  
ATC-N (Normal operation.: L)  
Vee  
Vcc  
GND  
+3.3V  
LOS-P Loss of signal output  
Vcc +3.3V  
DEO-10-N DATA-10-N output  
30 DEO-2-P DATA-2-P output  
31 DEO-3-N DATA-3-N output  
32  
33 DEO-4-N DATA-4-N output  
34 CN2-P (Normal operation.: L)  
Vcc  
+3.3V  
10 DEO-9-N DATA-9-N output  
11 Vee GND  
12 DEO-8-P DATA-8-P output  
13 DEO-7-P DATA-7-P output  
35 DEO-1-N DATA-1-N output  
36 DEO-2-N DATA-2-N output  
14  
15 DEO-6-P DATA-6-P output  
16 Vcc +3.3V  
Vee  
GND  
37  
38  
Vee  
GND  
CLK-P CLK-P output  
39 DEO-0-P DATA-0-P output  
17 DEO-5-P DATA-5-P output  
18 DEO-8-N DATA-8-N output  
40  
41  
42  
43  
44  
45  
FFD-P (Normal operation.: L)  
CO2-P (Normal operation.: L)  
19  
20 DEO-7-N DATA-7-N output  
21 Vee GND  
Vcc  
+3.3V  
Vcc  
Vee  
+3.3V  
GND  
CLK-N CLK-N output  
Vcc +3.3V  
22 DEO-6-N DATA-6-N output  
23 DEO-5-N DATA-5-N output  
46 DEO-0-N DATA-0-N output  
40 41 42 43 44 45 46  
34 35 36 37 38 39  
27 28 29 30 31 32 33  
21 22 23 24 25 26  
14 15 16 17 18 19 20  
8
9
10 11 12 13  
1
2
3
4
5
6
7
Top view  
- 10 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
Qualification  
The following qualification test in Table 12 is scheduled.  
Table 12. Plan for Qualification Test  
Test Condition MDS4212A  
No.  
Test Item  
MDR4212A  
Criteria  
Size  
11  
Criteria  
Size  
11  
MIL-STD-883C Method 2002  
15000 m/s2, 0.5 ms,  
1 Mechanical shock  
5 times/axis, 6 axes  
MIL-STD-883C Method 2007  
196 m/s2, 20 to 2000 Hz,  
4 min/cycle, 4 cycle/axis, 3 axes  
2
3
Vibration  
Fiber pull  
11  
11  
|DPith|  
£ 0.5 dB  
|DPoH|  
£ 0.5 dB  
1 kg, 3 times  
11  
11  
11  
11  
MIL-STD-883C Method 1010  
DT=100°C, 100-cycle  
4 Temperature cycling  
Ta= 70°C, 1 m/s Air flow, 2000h  
5
6
7
8
High temperature  
operation  
11  
11  
11  
6
11  
11  
11  
6
|DPoH|  
£ 1.5 dB  
|DPoH|  
|DPith|  
£ 0.8 dB  
85°C, 2000h  
High temperature  
storage  
£ 0.7 dB  
MIL-STD-883C Method 103  
95%, 40°C, 1344h  
High relative  
humidity storage  
Electrostatic  
MIL-STD-883C Method 3015.7  
Single pins: 1000 V, power supply  
and control pins: 2000 V  
All  
functional  
All  
functional  
discharge sensitivity  
- 11 -  
Preliminary Technical Data of MDS/R4212A  
HITACHI  
USER INFORMATION  
Handling Precautions  
CAUTION: Take proper electrostatic-discharge (ESD) precautions while handling these devices.  
These devices are sensitive to ESD damage.  
Laser Safety  
This product complies with IEC 60825-1 Class 1.  
Because of size constraints, laser safety labeling is not affixed to the module but attached to the  
outside of the shipping carton.  
Ordering Information  
Table 13 Ordering Information  
Device Name  
Description  
Device  
12-ch Tx  
12-ch Rx  
Channel Speed  
DC - 800 Mbit/s 11 Data + CLK  
DC - 800 Mbit/s 11 Data + CLK  
Channel  
Latches  
Included  
Included  
MDS4212A  
MDR4212A  
- 12 -  

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