HT66FB30 [HOLTEK]
Enhanced A/D Flash Type 8-Bit MCU with EEPROM & USB Interface; 增强A / D型闪存的8位MCU带有EEPROM和USB接口
| 型号： | HT66FB30 |
| 厂家： | 
HOLTEK SEMICONDUCTOR INC |
| 描述： | Enhanced A/D Flash Type 8-Bit MCU with EEPROM & USB Interface |
| 文件： | 总26页 (文件大小：199K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Enhanced A/D Flash Type 8-Bit MCU
with EEPROM & USB Interface
Features
·
·
·
MCU Features
Watchdog Timer function
·
Up to 39 bidirectional I/O lines
Operating voltage:
f
f
f
SYS= 8MHz at 2.2V~5.5V
SYS= 12MHz at 2.7V~5.5V
SYS= 20MHz at 4.5V~5.5V
Software controlled 4-SCOM lines LCD driver with
1/2 bias
·
·
Multiple pin-shared external interrupts
·
·
·
Up to 0.2ms instruction cycle with 20MHz system
clock at VDD=5V
Multiple Timer Module for time measure, input
capture, compare match output, PWM output or
single pulse output functions
Serial Interface Module -- SIM for SPI or I2C
Power down and wake-up functions to reduce
power consumption
·
·
·
Five oscillators
Dual Comparator functions
-
-
-
-
-
External High Speed Xtal
Dual Time-Base functions for generation of fixed
time interrupt signal
External 32.768kHz Xtal
External RC
·
·
·
Multi-channel 12-bit resolution A/D converter
Low voltage reset function
Internal High Speed -- no ext. components
Internal 32kHz -- no ext. components
Low voltage detect function
·
·
·
Multi-mode operation: NORMAL, SLOW, IDLE and
SLEEP
SPI to USB chip Features
Fully integrated internal 4MHz, 8MHz and 12MHz
oscillator requires no external components
·
Fully compliant with USB 2.0 Full-Speed
specification
All instructions executed in one or two instruction
cycles
·
·
6 endpoints (including endpoint 0)
·
·
·
·
FIFO: 8, 8, 8, 64, 8, 64 for endpoint 0 ~ endpoint 5
respectively
Table read instructions
63 powerful instructions
·
·
Suspend Mode and Remote Wake-up function
Up to 8 subroutine nesting levels
Bit manipulation instruction
Multiple USB interrupt generation sources: endpoint
access, suspend, resume and reset signals
·
CMOS clock input with frequency of 6MHz/12MHz
for the USB PLL clock
MCU Peripheral Features
·
·
·
Flash Program Memory: 1K´14 ~ 12K´16
RAM Data Memory: 64´8 ~ 576´8
EEPROM Memory: 32´8 ~ 256´8
Rev. 1.10
1
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
General Description
The HT66FBx0 series of devices are Flash Memory A/D
type 8-bit high performance RISC architecture
microcontrollers with a USB interface. Offering users
the convenience of Flash Memory multi-programming
features, these devices also include a wide range of
functions and features. Other memory includes an area
of RAM Data Memory as well as an area of EEPROM
memory for storage of non-volatile data such as serial
numbers, calibration data etc.
A full choice of HXT, LXT, ERC, HIRC and LIRC oscilla-
tor functions are provided including a fully integrated
system oscillator which requires no external compo-
nents for its implementation. The ability to operate and
switch dynamically between a range of operating modes
using different clock sources gives users the ability to
optimise microcontroller operation and minimize power
consumption.
The device contains a single USB Full-speed interface
to allow data communication with an external USB host
controller. It is particularly suitable for applications which
require data communication between PCs and periph-
eral USB hardware.
Analog features include a multi-channel 12-bit A/D con-
verter and dual comparator functions. Multiple and ex-
tremely flexible Timer Modules provide timing, pulse
generation and PWM generation functions. Communi-
cation with the outside world is catered for by including
fully integrated SPI or I2C interface functions, two popu-
lar interfaces which provide designers with a means of
easy communication with external peripheral hardware.
Protective features such as an internal Watchdog Timer,
Low Voltage Reset and Low Voltage Detector coupled
with excellent noise immunity and ESD protection en-
sure that reliable operation is maintained in hostile elec-
trical environments.
An extensive choice of oscillator functions is provided
including a fully integrated system oscillator which re-
quires no external components for its implementation.
The ability to operate and switch dynamically between a
range of operating modes using different clock sources
gives users the ability to optimise microcontroller opera-
tion and minimise power consumption. The devices also
include flexible I/O programming features, Time-Base
functions and a range of other features.
Selection Guide
Most features are common to all devices, the main feature distinguishing them are Memory capacity, A/D Converter,
Timer Module types and stack capacity. The following table summarises the main features of each device.
Program
Memory Memory EEPROM
Data
Data
Ext.
Int.
Timer
Module
Interface
(SPI/I2C)
USB
Part No.
VDD
I/O
Stack
Package
2.2V~
5.5V
10-bit CTM´1,
10-bit ETM´1
28SKDIP/SOP/SSOP
HT66FB30
2K´14
4K´15
96´8
64´8
16
2
2
Ö
Ö
Ö
4
10-bit CTM´1,
10-bit ETM´1,
10-bit STM´1
2.2V~
5.5V
44QFP/LQFP
48QFN
HT66FB40
HT66FB50
HT66FB60
192´8
128´8
33
34
39
Ö
Ö
Ö
8
8
8
10-bit CTM´2,
10-bit ETM´1,
10-bit STM´1
2.2V~
5.5V
44QFP/LQFP
48QFN
8K´16
384´8
576´8
256´8
256´8
2
4
Ö
Ö
10-bit CTM´2,
10-bit ETM´1,
10-bit STM´1
2.2V~
5.5V
44/52QFP
40/48QFN
12K´16
Note: As devices exist in more than one package format, the table reflects the situation for the package with the most
pins.
Rev. 1.10
2
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Block Diagram
The following block diagram illustrates the dual-chip structure of the devices, where an individual MCU and SPI to USB
chips are combined into a single package.
V
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Internal Chip Interconnection Diagram
Note: The ground pins of the internal chips are NOT connected together. On some devices the positive power supply
pins are connected together and on some they remain independent.
Rev. 1.10
3
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
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4
Rev. 1.10
4
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
3
3
3
3
3
4
3
5
4
6
7
4
8
4
4
9
4
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1
2
3
4
4
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4
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9
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5
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/
A
N
1
6
7
0
1
/
/
[
[
T
T
P
P
0
1
_
A
6
7
/
/
[
[
T
T
P
P
0
1
_
A
0
]
/
S
C
O
M
P
2
A
/
T
C
K
0
/
C
0
+
/
A
N
2
P
A
0
/
C
0
X
/
T
P
0
_
0
/
A
N
0
]
/
S
C
O
M
3
P
A
1
/
T
P
1
A
/
A
N
1
P
F
F
1
/
[
1
C
0
1
1
0
X
]
/
T
P
1
B
_
0
/
C
P
A
0
/
C
0
X
/
T
1
1
1
0
1
2
P
0
_
0
/
A
N
0
P
0
0
/
[
C
X
]
/
T
P
1
B
_
1
C
C
0
1
/
/
T
T
P
1
B
_
0
/
S
C
O
M
N
C
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
1
B
_
P
1
/
S
C
O
M
1
P
F
1
/
[
C
1
X
]
1
3
1
4
1
1
7
5
1
1
8
6
1
9
2
0
2
1
2
2
2
3
2
4
3
3
3
3
3
4
3
5
4
6
7
4
8
4
4
9
4
0
1
2
3
4
3
3
3
3
3
1
2
3
3
3
4
3
5
4
6
7
8
9
0
P
B
5
/
S
C
S
1
2
3
4
5
6
7
8
9
/
V
R
E
F
N
P
P
P
P
P
P
P
P
P
P
C
3
3
3
3
2
2
2
2
2
2
2
3
1
2
3
4
5
6
7
8
9
1
3
2
2
2
2
2
2
2
2
2
0
9
8
7
6
5
4
3
2
1
V
D
D
U
N
P
P
P
P
P
P
P
P
P
C
P
A
7
/
S
C
K
/
S
C
L
/
A
N
7
2
1
0
9
8
7
6
5
4
3
D
D
E
E
E
E
C
C
C
C
4
5
/
/
[
[
T
T
P
P
2
0
_
_
P
A
7
/
S
C
K
/
S
C
L
/
A
N
7
D
D
E
G
C
C
C
C
E
4
5
/
/
[
[
T
T
P
P
2
0
_
_
1
1
]
]
P
A
6
/
S
D
I
/
S
D
A
/
/
A
A
N
N
6
P
A
6
/
S
D
I
/
S
D
A
/
/
A
A
N
N
6
P
A
5
/
C
1
X
/
S
D
O
5
0
1
2
3
/
/
/
/
[
[
[
[
I
I
I
T
N
N
N
T
T
T
0
1
2
P
A
5
/
C
1
X
/
S
D
O
5
0
/
[
I
N
T
0
]
P
A
4
/
I
N
T
1
/
T
C
K
1
/
A
N
4
H
T
6
6
F
B
6
0
P
A
4
/
I
N
T
1
/
T
C
K
1
/
A
N
4
1
/
[
C
1
X
]
H
T
6
6
F
B
6
0
P
A
3
/
I
N
T
0
/
C
0
-
/
A
N
3
4
4
Q
F
P
-
A
4
0
Q
F
N
-
A
P
A
3
/
I
N
T
0
/
C
0
-
/
A
N
3
6
7
0
1
/
/
/
/
[
[
T
T
T
T
P
P
0
1
_
A
0
]
/
S
C
O
M
2
+ C /
P
A
2
/
T
K
A
0
N
/
2
C
0
P
3
_
P
A
/
2
T
C
K
0
/
C
0
+
/
A
N
2
]
/
S
C
O
M
3
1 /
P
A
T
P
1
A
/
A
N
1
6
7
0
1
/
/
[
[
T
T
P
P
0
1
_
A
P
A
1
/
T
P
1
A
/
A
N
1
P
1
B
_
0
/
S
C
O
M
0
0
P
A
0
/
C
X
/
T
P
0
_
0
/
A
N
0
P
A
0
/
C
0
X
/
T
P
0
_
0
/
A
N
0
1
/
P
S
1
C
B
O
_
M
1
P
F
1
/
/
[
C
1
1
X
0
]
/
A
N
1
1
/
T
P
1
B
_
0
/
0
P
F
1
/
[
C
1
X
]
/
A
N
1
1
4
/
[
T
P
1
B
_
2
]
P
F
0
[
C
0
X
]
1
/
A
N
1
0
/
T
P
1
B
_
1
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
4
4
5
5
5
8
9
0
1
2
4
4
4
5
6
7
4
4
4
4
4
0
1
2
3
4
3
3
3
3
3
3
9
8
7
6
5
4
1
2
3
4
5
6
7
8
9
1
1
1
1
N
P
P
P
P
P
P
P
P
P
P
P
P
C
P
P
F
3
2
D
D
E
E
E
E
F
F
G
G
C
C
4
5
/
/
[
[
T
T
P
P
2
0
F
4
4
8
7
4
4
5
6
4
4
4
3
4
4
2
1
3
4
9
0
3
3
7
8
P
B
5
/
S
C
S
/
V
R
E
F
1
2
3
4
5
6
7
8
9
3
3
3
3
3
3
3
2
2
2
2
2
6
5
4
3
2
1
0
9
8
7
6
5
N
C
N
P
P
P
P
P
P
P
P
N
P
P
C
0
1
2
3
/
/
/
/
[
[
[
[
I
I
I
T
N
N
N
T
T
T
P
A
7
/
S
C
K
/
S
C
L
/
/
A
N
7
P
B
5
/
S
C
S
/
V
R
E
F
D
D
E
E
E
E
C
C
4
5
/
/
[
[
T
T
P
P
2
0
_
_
1
1
]
]
P
A
6
/
S
D
I
/
S
D
A
A
N
6
5
P
A
7
/
S
C
K
/
S
C
L
/
A
N
7
P
A
5
/
C
1
X
/
S
D
O
/
A
N
P
A
6
/
S
D
I
/
S
D
A
/
/
A
A
N
N
6
0
1
2
3
/
/
/
/
[
[
[
[
I
I
I
T
N
N
N
T
T
T
0
1
2
]
]
]
H
T
6
6
F
B
6
0
3
3
3
3
2
2
2
3
2
1
0
9
8
7
P
3
P
A
4
/
I
N
T
1
/
T
C
K
1
/
A
N
4
P
A
5
/
C
1
X
/
S
D
O
5
5
2
Q
F
P
-
A
6
P
A
N
3
T
/
I
0
/
C
0
-
/
A
N
3
P
A
4
/
I
N
T
1
/
T
C
K
1
/
A
N
4
F
H
T
6
6
B
6
0
7
P A
]
2
/
T
C
K
0
/
C
0
+
/
A
N
2
4
8
Q
F
N
-
A
P
A
3
/
I
N
T
0
/
C
0
-
/
A
A
N
3
P
3
_
1
0
0
/
[
C
0
1
X
X
P
A
1
/
T
P
2
1
A
/
A
N
1
P
A
2
/
T
C
K
0
/
C
0
+
/
N
2
6
7
/
/
[
[
T
T
P
P
0
1
_
A
0
]
/
S
C
O
M
1
P
1
/
[
C
P
A
0
/
C
0
X
3
/
T
0
_
0
/
A
N
0
P
A
1
/
T
P
1
A
/
A
N
1
]
/
S
C
O
M
2
3
6
7
/
/
[
[
S
T
T
C
P
P
O
0
1
P
F
1
/
[
[
C
C
1
X
]
/
/
A
N
1
1
P
A
0
/
C
0
X
/
T
1
1
1
P
0
1
2
0
_
0
/
A
N
0
C
P
S
F
C
0
/
0
X
]
A
N
1
0
N
C
C
0
/
T
P
1
B
_
0
/
O
M
0
1
4
1
5
1
6
1
7
1
2
8
3
1
2
9
4
2
2
0
5
2
2
1
6
2
2
P
F
1
/
[
C
1
X
]
/
A
N
1
1
C
1
/
T
P
1
B
_
1
/
S
C
O
M
1
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
Note: 1. Bracketed pin names indicate non-default pinout remapping locations.
2. For pin-shared pin functions, pin names to the right side of the ²/² sign have higher priority.
3. VDD & AVDD & VDDU means the VDD, AVDD and VDDU pins are bonded together.
Rev. 1.10
5
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Pin Description
With the exception of the power pins, all pins on these devices can be referenced by their Port name, e.g. PA.0, PA.1
etc, which refer to the digital I/O function of the pins. However these Port pins are also shared with other function such
as the Analog to Digital Converter, Serial Port pins, etc. The function of each pin is listed in the following tables, how-
ever the details behind how each pin is configured is contained in individual MCU and SPI to USB chip datasheet. The
important point to note here is that some I/O lines are not bonded to the external pins. Users should take special care of
these I/O port lines. Refer to the Hardware Considerations section for more details.
HT66FB30
Pin Name
Function
OP
I/T
O/T
Pin-Shared Mapping
PAWU
PAPU
PA0~PA7
Port A
ST
CMOS
¾
PB0~PB5
PC2~PC3
AN0~AN7
VREF
Port B
Port C
PBPU
PCPU
ST
ST
AN
AN
AN
AN
CMOS
CMOS
¾
¾
¾
A/D converter input
ACERL
ADCR1
PA0~PA7
PB5
A/D converter reference input
Comparator 0, 1 input
Comparator 0, 1 input
Comparator 0, 1 output
¾
C0-, C1-
C0+, C1+
C0X, C1X
PA3, PC3
PA2, PC2
¾
CP0C
CP1C
¾
CMOS PA0, PA5
PA2, PA4
¾
TCK0, TCK1 TM0, TM1 input
ST
ST
ST
ST
ST
¾
TMPC0
TMPC0
¾
¾
TP0_0
TP1A
INT0, INT1
PINT
PCK
TM0 I/O
CMOS PA0
CMOS PA1
TM1 I/O
External interrupt 0, 1
Peripheral Interrupt ***
Peripheral Clock Output ***
SPI data input ***
SPI data output ***
SPI slave select ***
SPI serial clock ***
I2C clock
PA3, PA4
PC3 or PC4
¾
¾
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
CO
CMOS PC2 or PC5
PA6 or PC0
¾
SDI
ST
¾
SDO
SCS
CMOS PA5 or PC1
CMOS PB5 or PC6
CMOS PA7 or PC7
NMOS PA7
¾
ST
SCK
ST
SCL
ST
SDA
I2C data
ST
NMOS PA6
OSC1
OSC2
XT1
HXT/ERC pin
HXT
PB1
PB2
PB3
PB4
PB0
¾
¾
HXT
¾
HXT pin
CO
¾
LXT
¾
LXT pin
CO
XT2
LXT pin
CO
LXT
¾
RES
Reset input
CO
ST
VDD
MCU power supply *
A/D converter power supply *
MCU ground **
A/D converter ground **
USB D+ pin
PWR
PWR
PWR
PWR
ST
¾
¾
¾
¾
¾
¾
¾
AVDD
VSS
¾
¾
¾
¾
AVSS
UDP
¾
¾
CMOS
CMOS
¾
UDN
USB D- pin
ST
¾
Rev. 1.10
6
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Pin Name
V33O
Function
3.3V regulator output pin
USB power supply
OP
¾
¾
¾
¾
I/T
¾
O/T
¾
Pin-Shared Mapping
¾
VDDU
VSSU
NC
PWR
PWR
¾
¾
¾
¾
¾
USB ground
¾
Not connected, can not be used
¾
Note: I/T: Input type; O/T: Output type
OP: Optional by configuration option (CO) or register option
PWR: Power; CO: Configuration option; ST: Schmitt Trigger input
CMOS: CMOS output; NMOS: NMOS output
AN: Analog input pin
HXT: High frequency crystal oscillator
LXT: Low frequency crystal oscillator
*: VDD is the device power supply while AVDD and VDDU are the ADC and USB power supply respectively.
The AVDD and VDDU pins are bonded together internally with VDD.
**: VSS is the device ground pin while AVSS is the ADC ground pin. The AVSS pin is bonded together internally
with VSS.
***: When the PINT, PCK and SPI functions are pin-shared remapping to PC4~PC5, PC0~PC1 and PC6~PC7
pins, the SPI pins are to be used as the master SPI signal to communicate with the slave SPI in HT45B0K
along with the PINT and PCK pins used as the interrupt input and clock output connected to the SPI to USB
chip to control the overall USB functions.
HT66FB40
Pin Name
PA0~PA7
PB0~PB7
Function
OP
I/T
ST
ST
ST
O/T
Pin-Shared Mapping
PAWU
PAPU
Port A
Port B
Port C
CMOS
CMOS
CMOS
¾
PBPU
PCPU
¾
¾
PC0~PC1,
PC6~PC7
PD4~PD6
PE0~PE7
PF0~PF1
AN0~AN7
VREF
Port D
Port E
Port F
PDPU
PEPU
ST
ST
ST
AN
AN
AN
AN
CMOS
CMOS
CMOS
¾
¾
¾
PFPU
¾
A/D converter input
ACERL
ADCR1
PA0~PA7
PB5
PA3
PA2
A/D converter reference input
Comparator 0 input
¾
C0-
¾
CP0C
C0+
Comparator 0 input
¾
CP0C
CP1C
PRM0
C0X, C1X
Comparator 0, 1 output
CMOS
¾
PA0, PA5 or PF0, ¾
TCK0, TCK1 TM0, TM1 input
PRM1
ST
ST
¾
PA2, PA4, ¾
TP0_0,
TM0 I/O
TP0_1
TMPC0
PRM2
CMOS
PA0, ¾, or PC6, PD5
TMPC0
PRM2
TP1A
TM1 I/O
TM1 I/O
ST
ST
CMOS PA1 or PC7
PC0, PC1, ¾ or
¾, ¾, PE4
TP1B_0~
TP1B_2
TMPC0
PRM2
CMOS
Rev. 1.10
7
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Pin Name
Function
OP
I/T
O/T
Pin-Shared Mapping
TMPC1
PRM2
TP2_1
TM2 I/O
ST
CMOS
¾ or PD4
INT0, INT1
PINT
PCK
External interrupt 0, 1
Peripheral Interrupt ***
Peripheral Clock Output ***
SPI data input ***
SPI data output ***
SPI slave select ***
SPI serial clock ***
I2C clock
PRM1
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
ST
ST
¾
PA3, PA4 or PE6, PE7
¾ or PC4
¾
¾
CMOS
¾
¾ or PC5
SDI
ST
PA6 or PD2 or PB7
SDO
SCS
CMOS PA5 or PD3 or PB6
CMOS PB5 or PD0 or PD7
CMOS PA7 or PD1 or PD6
NMOS PA7 or PD1 or PD6
NMOS PA6 or PD2 or PB7
¾
ST
ST
ST
ST
SCK
SCL
SDA
I2C data
SCOM0~
SCOM3
SCOM0~SCOM3
SCOMC
SCOM PC0, PC1, PC6, PC7
¾
OSC1
OSC2
XT1
HXT/ERC pin
CO
CO
CO
CO
CO
¾
HXT
¾
PB1
PB2
PB3
PB4
PB0
¾
¾
HXT
¾
HXT pin
LXT pin
LXT
¾
XT2
LXT pin
LXT
¾
RES
Reset input
ST
VDD
AVDD
VSS
MCU power supply *
A/D converter power supply *
MCU ground **
A/D converter ground **
USB D+ pin
PWR
PWR
PWR
PWR
ST
¾
¾
¾
¾
¾
¾
¾
AVSS
UDP
UDN
V33O
VDDU
VSSU
NC
¾
¾
¾
CMOS
CMOS
¾
¾
¾
USB D- pin
ST
¾
¾
3.3V regulator output pin
USB power supply
USB ground
¾
¾
¾
PWR
PWR
¾
¾
¾
¾
¾
¾
¾
Not connected, can not be used
¾
¾
¾
Note: I/T: Input type; O/T: Output type
OP: Optional by configuration option (CO) or register option
PWR: Power; CO: Configuration option; ST: Schmitt Trigger input
CMOS: CMOS output; NMOS: NMOS output
SCOM: Software controlled LCD COM; AN: Analog input pin
HXT: High frequency crystal oscillator
LXT: Low frequency crystal oscillator
*: VDD is the device power supply while AVDD and VDDU are the ADC and USB power supply respectively.
The AVDD and VDDU pins are bonded together internally with VDD.
**: VSS is the device ground pin while AVSS is the ADC ground pin. The AVSS pin is bonded together internally
with VSS.
***: When the PINT, PCK and SPI functions are pin-shared remapping to PC4~PC5 and PD0~PD3 pins, the
SPI pins are to be used as the master SPI signal to communicate with the slave SPI in HT45B0K along with the
PINT and PCK pins used as the interrupt input and clock output connected to the SPI to USB chip to control the
overall USB functions.
Rev. 1.10
8
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
HT66FB50
Pin Name
Function
OP
I/T
ST
ST
ST
O/T
Pin-Shared Mapping
PAWU
PAPU
PA0~PA7
PB0~PB7
Port A
Port B
Port C
CMOS
CMOS
CMOS
¾
PBPU
PCPU
¾
¾
PC0~PC1,
PC6~PC7
PD4~PD7
PE0~PE7
PF0~PF1
AN0~AN7
VREF
Port D
Port E
Port F
PDPU
PEPU
ST
ST
ST
AN
AN
AN
AN
CMOS
CMOS
CMOS
¾
¾
¾
PFPU
¾
A/D converter input
ACERL
ADCR1
PA0~PA7
PB5
PA3
PA2
A/D converter reference input
Comparator 0 input
¾
C0-
¾
CP0C
C0+
Comparator 0 input
¾
CP0C
CP1C
PRM0
C0X, C1X
Comparator 0, 1 output
CMOS PA0, PA5 or PF0, PF1
¾
TCK0, TCK1 TM0, TM1 input
PRM1
ST
ST
¾
PA2, PA4, ¾, ¾
TP0_0,
TM0 I/O
TP0_1
TMPC0
PRM2
CMOS
PA0, ¾, or PC6, PD5
TMPC0
PRM2
TP1A
TM1 I/O
TM1 I/O
ST
ST
CMOS PA1 or PC7
PC0, PC1, ¾ or
TP1B_0~
TP1B_2
TMPC0
PRM2
CMOS
¾, ¾, PE4
TMPC1
PRM2
TP2_1
TM2 I/O
TM3 I/O
ST
ST
CMOS
CMOS
¾ or PD4
TP3_0,
TP3_1
TMPC1
PRM2
¾, ¾, or PE5, PE3
INT0, INT1
PINT
PCK
External interrupt 0, 1
Peripheral Interrupt ***
Peripheral Clock Output ***
SPI data input ***
SPI data output ***
SPI slave select ***
SPI serial clock ***
I2C clock
PRM1
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
ST
ST
¾
PA3, PA4 or PE6, PE7
¾ or PC4
¾
¾
CMOS
¾
¾ or PC5
SDI
ST
PA6 or PD2 or PB7
SDO
SCS
CMOS PA5 or PD3 or PB6
CMOS PB5 or PD0 or PD7
CMOS PA7 or PD1 or PD6
NMOS PA7 or PD1 or PD6
NMOS PA6 or PD2 or PB7
¾
ST
ST
ST
ST
SCK
SCL
SDA
I2C data
SCOM0~
SCOM3
SCOM0~SCOM3
SCOMC
SCOM PC0, PC1, PC6, PC7
¾
OSC1
OSC2
XT1
HXT/ERC pin
HXT pin
CO
CO
CO
CO
HXT
¾
PB1
PB2
PB3
PB4
¾
HXT
¾
LXT pin
LXT
¾
XT2
LXT pin
LXT
Rev. 1.10
9
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Pin Name
RES
Function
OP
CO
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
I/T
ST
O/T
¾
Pin-Shared Mapping
Reset input
PB0
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
VDD
MCU power supply *
A/D converter power supply *
MCU ground **
PWR
PWR
PWR
PWR
ST
¾
AVDD
VSS
¾
¾
AVSS
UDP
A/D converter ground **
USB D+ pin
¾
CMOS
CMOS
¾
UDN
V33O
VDDU
VSSU
NC
USB D- pin
ST
3.3V regulator output pin
USB power supply
USB ground
¾
PWR
PWR
¾
¾
¾
Not connected, can not be used
¾
Note: I/T: Input type; O/T: Output type
OP: Optional by configuration option (CO) or register option
PWR: Power; CO: Configuration option; ST: Schmitt Trigger input
CMOS: CMOS output; NMOS: NMOS output
SCOM: Software controlled LCD COM; AN: Analog input pin
HXT: High frequency crystal oscillator
LXT: Low frequency crystal oscillator
*: VDD is the device power supply while AVDD and VDDU are the ADC and USB power supply respectively.
The AVDD and VDDU pins are bonded together internally with VDD.
**: VSS is the device ground pin while AVSS is the ADC ground pin. The AVSS pin is bonded together internally
with VSS.
***: When the PINT, PCK and SPI functions are pin-shared remapping to PC4~PC5 and PD0~PD3 pins, the
SPI pins are to be used as the master SPI signal to communicate with the slave SPI in HT45B0K along with the
PINT and PCK pins used as the interrupt input and clock output connected to the SPI to USB chip to control the
overall USB functions.
HT66FB60
Pin Name
PA0~PA7
PB0~PB6
Function
OP
I/T
ST
ST
ST
O/T
Pin-Shared Mapping
PAWU
PAPU
Port A
Port B
Port C
CMOS
CMOS
CMOS
¾
PBPU
PCPU
¾
¾
PC0~PC1,
PC6~PC7
PD4~PD5
PE0~PE7
PF0~PF7
PG0~PG1
Port D
Port E
Port F
Port G
PDPU
PEPU
PFPU
PFPU
ST
ST
ST
ST
CMOS
CMOS
CMOS
CMOS
¾
¾
¾
¾
ACERL
ACERH
PA0~PA7, PE6~PE7,
PF0~PF1
AN0~AN11
A/D converter input
AN
¾
VREF
C0-
A/D converter reference input
Comparator 0 input
ADCR1
AN
AN
AN
PB5
PA3
PA2
¾
¾
¾
CP0C
C0+
Comparator 0 input
Rev. 1.10
10
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Pin Name
Function
OP
I/T
O/T
Pin-Shared Mapping
CP0C
CP1C
PRM0
PA0, PA5 or PF0, PF1
or PG0, PG1
C0X, C1X
Comparator 0, 1 output
CMOS
¾
TCK0, TCK1 TM0, TM1 input
PRM1
ST
ST
¾
PA2, PA4, ¾, ¾
TP0_0,
TM0 I/O
TP0_1
TMPC0
PRM2
CMOS
PA0, ¾, or PC6, PD5
TMPC0
PRM2
TP1A
TM1 I/O
TM1 I/O
ST
ST
CMOS PA1 or PC7
PC0, PC1, ¾ or
TP1B_0~
TP1B_2
TMPC0
PRM2
CMOS
¾, ¾, PE4
TMPC1
PRM2
TP2_1
TM2 I/O
TM3 I/O
ST
ST
CMOS
CMOS
¾ or PD4
TP3_0,
TP3_1
TMPC1
PRM2
¾, ¾, or PE5, PE3
PA3, PA4, ¾ or
¾, ¾, PE2,
PE0, PE1, ¾, or
PE6, PE7, ¾
INT0~INT2
External interrupt 0~2
PRM1
ST
¾
PINT
PCK
SDI
Peripheral Interrupt ***
Peripheral Clock Output ***
SPI data input ***
SPI data output ***
SPI slave select ***
SPI serial clock ***
I2C clock
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
PRM0
ST
¾
¾
CMOS
¾
¾ or PC4
¾ or PC5
PA6 or PD2
ST
SDO
SCS
SCK
SCL
SDA
CMOS PA5 or PB6 or PD1
CMOS PB5 or PD0
CMOS PA7 or PD3
NMOS PA7
¾
ST
ST
ST
ST
I2C data
NMOS PA6
SCOM0~
SCOM3
SCOM0~SCOM3
SCOMC
SCOM PC0, PC1, PC6, PC7
¾
OSC1
OSC2
XT1
HXT/ERC pin
CO
CO
CO
CO
CO
¾
HXT
¾
PB1
PB2
PB3
PB4
PB0
¾
¾
HXT
¾
HXT pin
LXT pin
LXT
¾
XT2
LXT pin
LXT
¾
RES
Reset input
ST
VDD
AVDD
VSS
MCU power supply *
A/D converter power supply *
MCU ground **
A/D converter ground **
USB D+ pin
PWR
PWR
PWR
PWR
ST
¾
¾
¾
¾
¾
¾
¾
AVSS
UDP
UDN
V33O
VDDU
VSSU
NC
¾
¾
¾
CMOS
CMOS
¾
¾
¾
USB D- pin
ST
¾
¾
3.3V regulator output pin
USB power supply
USB ground
¾
¾
¾
PWR
PWR
¾
¾
¾
¾
¾
¾
¾
Not connected, can not be used
¾
¾
¾
Rev. 1.10
11
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Note: I/T: Input type; O/T: Output type
OP: Optional by configuration option (CO) or register option
PWR: Power; CO: Configuration option; ST: Schmitt Trigger input
CMOS: CMOS output; NMOS: NMOS output
SCOM: Software controlled LCD COM; AN: Analog input pin
HXT: High frequency crystal oscillator
LXT: Low frequency crystal oscillator
*: VDD is the device power supply while AVDD is the ADC power supply. The AVDD pin is bonded together in-
ternally with VDD.
**: VSS is the device ground pin while AVSS is the ADC ground pin. The AVSS pin is bonded together internally
with VSS.
***: When the PINT, PCK and SPI functions are pin-shared remapping to PC4~PC5 and PD0~PD3 pins, the
SPI pins are to be used as the master SPI signal to communicate with the slave SPI in HT45B0K along with the
PINT and PCK pins used as the interrupt input and clock output connected to the SPI to USB chip to control the
overall USB functions.
Internally Connected Pins
Among the pins mentioned in the tables above several pins are not connected to external package pins. These pins are
interconnection pins between the MCU and the SPI to USB chips and are listed in the following table. The description is
provided from the SPI to USB chip standpoint.
SPI to USB Chip
Type
Description
Pin Name
Slave SPI Serial Data In Input Signal
SDI
I
O
I
Internally connected to the MCU Master SPI SDO output signal
Slave SPI Serial Data Out Output Signal
SDO
SCK
Internally connected to the MCU Master SPI SDI input signal
Slave SPI Serial Clock Input Signal
Internally connected to the MCU Master SPI SCK output signal
Slave SPI Device Select Input Signal
SCS
CLKI
INT
I
I
Internally connected to the MCU Master SPI SCS output signal - connected to pull high
resistor
Clock Input Signal
Internally connected to the MCU Master PCK output signal
USB Interrupt Output Signal
O
Internally connected to the MCU Master PINT input signal
A USB related interrupt will generate a low pulse signal on this line
Rev. 1.10
12
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Functional Description
·
As these devices packages contain multiple internal
chips, for a detailed functional description, users must
refer to the relevant individual datasheets for both the
MCU and the SPI to USB chips. The following table
shows which individual devices are inside each pack-
age.
Power Down and Wake up
The MCU and SPI to USB chip are powered down in-
dependently of each other. The method of powering
down the MCU is covered in the relevant MCU
datasheet. The SPI to USB chip must be powered
down before the MCU is powered down.
After the device is powered down, it could be also
woken up by the SPI to USB chip interrupt except by
wake-up sources mentioned in the MCU datasheet.
When a USB interrupt occurs on the INT line, it will
wake up the MCU if the MCU has entered a power
down mode. After the MCU is woken up, the applica-
tion program must set the corresponding control bits
to make the device function normally.
Device
MCU
SPI to USB Chip
HT45B0K
HT66FB30
HT66FB40
HT66FB50
HT66FB60
HT66F30
HT66F40
HT66F50
HT66F60
HT45B0K
HT45B0K
HT45B0K
·
Interrupts
Multi-chip Internal Devices
When a USB interrupt occurs, a low pulse will be gen-
erated on the INT line and sent to the peripheral inter-
rupt line PINT in the MCU to get the attention of the
microcontroller. When the USB interrupt caused by
one of the USB interrupt generation sources occurs, if
the corresponding interrupt control in the host MCU is
enabled and the stack is not full, the program will jump
to the corresponding interrupt vector where it can be
serviced before returning to the main program.
For a USB interrupt to be serviced, in addition to the
bits for the corresponding interrupt enable control in
the SPI to USB chip being set, the global interrupt en-
able control and the related interrupt enable control
bits in the host MCU must also be set. If these bits are
not set, then the interrupt signal will only be a wake-up
source and no interrupt will be serviced.
Although most of the functional description material will
be located in the individual datasheets, there are some
special considerations which need to be taken into ac-
count when using multi-chip devices. These points will
be mentioned in the hardware and software consider-
ation sections
As the complexity of USB data protocol does not permit
comprehensive USB operation information to be pro-
vided in the related datasheets, the reader should there-
fore consult other external information for a detailed
USB understanding.
Multi-chip Hardware Considerations
As these single-package multi-chip devices are com-
posed of an individual MCU and SPI to USB chip, using
them together requires the user to take care of some
special points.
·
Unbonded MCU pins
Examination of the relevant MCU datasheet will re-
veal that not all of the MCU I/O port lines are bonded
out to external pins. As a result special attention re-
garding initialisation procedures should be paid to
these port lines. If the pins are pin-shared with the an-
alog input pins, they will be setup as analog inputs and
the corresponding analog circuits will be disabled af-
ter a reset. When these pins are set as analog input
pins and the relevant analog circuits are disabled,
they will not consume any power even if the input pin
conditions are not kept as either high or low logic lev-
els. However, if the pins are not pin-shared with ana-
log input pins, they will be setup as input states
without pull high resistors after a reset. Users should
therefore ensure that these pins are setup in input
states with pull high resistors or in output states with
either a high or low levels to avoid additional power
consumption resulting from floating input pins.
·
Absolute Maximum Ratings
The Absolute Maximum Ratings for the two individual
chips must be checked for discrepancies and the nec-
essary care taken in device handling and usage.
·
Power Supply
Examination of the block diagram will reveal that the
SPI to USB chip Ground pin, VSSU, has no internal
connection to the MCU Ground pin, VSS. For this rea-
son these two pins must be connected externally. With
the exception of the HT66FB60 device, the SPI to
USB chip power supply pin, VDDU, is internally con-
nected to the MCU power supply pin, VDD. For the
HT66FB60 device, the SPI to USB chip power supply
pin and the MCU power supply pin should be con-
nected together externally.
To calculate the power consumption for the devices,
the total operating current is the sum of the operating
current for the MCU specified in the MCU datasheet
and the operating current for the SPI to USB chip
listed in its datasheet. Similarly, the standby current is
the sum of the two individual chip standby currents.
Rev. 1.10
13
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
·
The PCK control bit is set to 1 to enable the PCK out-
put as the clock source for the USB external clock in-
put with various PCK output frequencies determined
by the PCKP1 and PCKP0 bits in the SIMC0 Register.
Multi-chip Programming Considerations
To use the USB function, several important steps must
be implemented to ensure that the SPI to USB chip op-
erates normally:
¨
PCK output frequency selection bits PCKP1~
PCKP0 in the SIMC0 Register
·
The SPI pin-remapping function must be properly
configured when the SPI functional pins of the
microcontroller are used to control the SPI to USB
chip and for transmission and reception.
Bit
1
0
Name
PCKP1
PCKP0
To ensure proper setup between the MCU Master SPI
interface to the SPI to USB chip Slave SPI, the SIM
pin-remapping settings for PCK and PINT in the MCU
PRM0 register should be setup as shown in the follow-
ing table.
Setting Value
11, 10, 01 or 00
00: PCK output frequency is fSYS
01: PCK output frequency is fSYS/4
10: PCK output frequency is fSYS/8
11: PCK output frequency is TM0 CCRP match
frequency/2
¨
HT66FB30 PRM0 Register -
PCK and PINT pin-remap setup
¨
PCK output enable control bit PCKEN in the SIMC0
Register
Bit
1
SIMPS0
1
0
PCKPS
1
Name
Bit
4
PCKEN
1
Setting Value
Name
¨
HT66FB40/HT66FB50 PRM0 Register -
PCK and PINT pin-remap setup
Setting Value
0: Disable PCK output
1: Enable PCK output
Bit
2
1
0
Name
SIMPS1 SIMPS0 PCKPS
After the above setup conditions have been imple-
mented, the MCU can enable the SIM interface by set-
ting the SIMEN bit high. The MCU can then begin
communication with external USB connected appli-
ances using its SPI interface. The detailed functional
descriptions of the MCU Master SPI are provided within
the Serial Interface Module section of the relevant MCU
datasheet.
Setting Value
0
1
1
¨
HT66FB60 PRM0 Register -
PCK and PINT pin-remap setup
Bit
2
1
0
Name
SIMPS1 SIMPS0 PCKPS
Setting Value
1
1
1
·
The SIM operating mode control bits SIM2~SIM0 in
the SIMC0 register have to be configured to enable
the SIM to operate in the SPI master mode with a dif-
ferent SPI clock frequency.
¨
SIM operating mode control bits SIM2~SIM0 in the
SIMC0 Register
Bit
2
1
0
Name
SIMPS1 SIMPS0 PCKPS
Setting Value
1
1
1
000: SPI master mode; SPI clock is fSYS/4
001: SPI master mode; SPI clock is fSYS/16
010: SPI master mode; SPI clock is fSYS/64
011: SPI master mode; SPI clock is fTBC
100: SPI master mode; SPI clock is TM0 CCRP
match frequency/2
101~111: must not be used
Rev. 1.10
14
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Application Circuits
V
D
D
0
.
m
0
F
1
*
*
V
D
D
R
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s
e
t
1
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C
i
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1
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W
0
k
1
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4
1
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8
*
0
m
. F 1
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I
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O
P
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t
s
3
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~
1
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Note:
²*² Recommended component for added ESD protection.
²**² Recommended component in environments where power line noise is significant.
Rev. 1.10
15
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Package Information
28-pin SKDIP (300mil) Outline Dimensions
A
1
1
5
4
2
8
B
1
H
C
D
I
E
F
G
Dimensions in inch
Symbol
Min.
1.375
0.278
0.125
0.125
0.016
0.050
¾
Nom.
¾
Max.
1.395
0.298
0.135
0.145
0.020
0.070
¾
A
B
C
D
E
F
G
H
I
¾
¾
¾
¾
¾
0.100
0.295
¾
0.315
¾
¾
0.375
Dimensions in mm
Symbol
Min.
34.93
7.06
3.18
3.18
0.41
1.27
¾
Nom.
¾
Max.
35.43
7.57
3.43
3.68
0.51
1.78
¾
A
B
C
D
E
F
G
H
I
¾
¾
¾
¾
¾
2.54
7.49
¾
8.00
¾
¾
9.53
Rev. 1.10
16
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
28-pin SOP (300mil) Outline Dimensions
2
8
1
5
A
B
1
1
4
C
C
'
G
H
D
a
E
F
·
MS-013
Dimensions in inch
Symbol
Min.
0.393
0.256
0.012
0.697
¾
Nom.
¾
Max.
0.419
0.300
0.020
0.713
0.104
¾
A
B
C
C¢
D
E
F
¾
¾
¾
¾
0.050
¾
0.004
0.016
0.008
0°
0.012
0.050
0.013
8°
¾
¾
¾
¾
G
H
a
Dimensions in mm
Symbol
Min.
9.98
6.50
0.30
17.70
¾
Nom.
¾
Max.
10.64
7.62
0.51
18.11
2.64
¾
A
B
C
C¢
D
E
F
¾
¾
¾
¾
1.27
¾
0.10
0.41
0.20
0°
0.30
1.27
0.33
8°
¾
¾
¾
¾
G
H
a
Rev. 1.10
17
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
28-pin SSOP (150mil) Outline Dimensions
2
8
1
1
5
4
A
B
1
C
C
'
G
H
D
a
E
F
Dimensions in inch
Symbol
Min.
0.228
0.150
0.008
0.386
0.054
¾
Nom.
¾
Max.
0.244
0.157
0.012
0.394
0.060
¾
A
B
C
C¢
D
E
F
¾
¾
¾
¾
0.025
0.004
0.022
0.007
0°
0.010
0.028
0.010
8°
¾
¾
¾
¾
G
H
a
Dimensions in mm
Symbol
Min.
5.79
3.81
0.20
9.80
1.37
¾
Nom.
¾
Max.
6.20
3.99
0.30
10.01
1.52
¾
A
B
C
C¢
D
E
F
¾
¾
¾
¾
0.64
0.10
0.56
0.18
0°
0.25
0.71
0.25
8°
¾
¾
¾
¾
G
H
a
Rev. 1.10
18
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
SAW Type 40-pin (6mm´ 6mm for 0.75mm) QFN Outline Dimensions
D
D
2
3
1
4
0
3
0
1
b
E
E
2
e
2
1
1
0
2
0
1
1
A
1
L
K
A
3
A
·
GTK
Dimensions in inch
Nom.
Symbol
Min.
0.028
0.000
¾
Max.
A
A1
A3
b
0.030
0.031
0.002
¾
0.001
0.008
0.007
¾
0.010
0.012
¾
D
0.236
E
0.236
¾
¾
e
0.020
¾
¾
D2
E2
L
0.173
0.173
0.014
0.008
0.177
0.179
0.179
0.018
¾
0.177
0.016
K
¾
Dimensions in mm
Symbol
Min.
0.70
0.00
¾
Nom.
0.75
0.02
0.20
0.25
6.00
6.00
0.50
4.50
4.50
0.40
¾
Max.
0.80
0.05
¾
A
A1
A3
b
0.18
¾
0.30
¾
D
E
¾
¾
e
¾
¾
D2
E2
L
4.40
4.40
0.35
0.20
4.55
4.55
0.45
¾
K
Rev. 1.10
19
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
SAW Type 48-pin (7mm´ 7mm) QFN Outline Dimensions
D
D
2
3
7
4
8
1
b
3
6
E
E
2
e
2
5
1
2
1
3
2
4
A
1
L
K
A
3
A
Dimensions in inch
Symbol
Min.
0.028
0.000
¾
Nom.
¾
Max.
0.031
0.002
¾
A
A1
A3
b
¾
0.008
0.007
¾
0.012
¾
¾
0.276
0.276
0.020
¾
D
E
¾
¾
e
¾
¾
D2
E2
L
0.177
0.177
0.012
0.008
0.227
0.227
0.020
¾
¾
¾
K
¾
Dimensions in mm
Symbol
Min.
0.70
0.00
¾
Nom.
¾
Max.
0.80
0.05
¾
A
A1
A3
b
¾
0.203
0.18
¾
0.30
¾
¾
7.00
7.00
0.50
¾
D
E
¾
¾
e
¾
¾
D2
E2
L
4.50
4.50
0.30
0.20
5.76
5.76
0.50
¾
¾
¾
K
¾
Rev. 1.10
20
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
44-pin QFP (10mm´ 10mm) Outline Dimensions
C
H
D
G
3
3
2
3
I
3
4
2
2
L
F
A
B
E
1
2
4
4
a
K
J
1
1
1
Dimensions in inch
Symbol
Min.
0.512
0.390
0.512
0.390
¾
Nom.
¾
Max.
0.528
0.398
0.528
0.398
¾
A
B
C
D
E
F
G
H
I
¾
¾
¾
0.031
0.012
¾
¾
0.075
¾
0.087
0.106
0.020
0.037
0.008
¾
¾
¾
0.010
0.029
0.004
¾
¾
J
¾
K
L
¾
0.004
¾
a
0°
7°
Dimensions in mm
Symbol
Min.
13.00
9.90
13.00
9.90
¾
Nom.
¾
Max.
13.40
10.10
13.40
10.10
¾
A
B
C
D
E
F
G
H
I
¾
¾
¾
0.80
0.30
¾
¾
1.90
¾
2.20
2.70
0.50
0.93
0.20
¾
¾
¾
0.25
0.73
0.10
¾
¾
J
¾
K
L
¾
0.10
¾
a
0°
7°
Rev. 1.10
21
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
52-pin QFP (14mm´ 14mm) Outline Dimensions
C
H
D
G
3
9
2
7
I
4
0
2
6
F
A
B
E
1
4
5
2
K
J
1
1
3
Dimensions in inch
Symbol
Min.
Nom.
¾
Max.
0.689
0.555
0.689
0.555
¾
A
B
C
D
E
F
G
H
I
0.681
0.547
0.681
0.547
¾
¾
¾
¾
0.039
0.016
¾
¾
0.098
¾
0.122
0.134
¾
¾
¾
0.004
¾
¾
J
0.029
0.004
¾
0.041
0.008
¾
K
L
¾
0.004
¾
a
0°
7°
Dimensions in mm
Symbol
Min.
17.30
13.90
17.30
13.90
¾
Nom.
¾
Max.
17.50
14.10
17.50
14.10
¾
A
B
C
D
E
F
G
H
I
¾
¾
¾
1.00
0.40
¾
¾
2.50
¾
3.10
3.40
¾
¾
¾
0.10
¾
¾
J
0.73
0.10
0°
1.03
0.20
7°
K
a
¾
¾
Rev. 1.10
22
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
44-pin LQFP (10mm´ 10mm) (FP3.2mm) Outline Dimensions
C
H
D
G
3
3
2
3
I
3
4
2
2
F
A
B
E
1
2
4
4
a
K
J
1
1
1
Dimensions in inch
Symbol
Min.
0.512
0.390
0.512
0.390
¾
Nom.
0.520
0.394
0.520
0.394
0.031
0.012
0.055
¾
Max.
0.528
0.398
0.528
0.398
¾
A
B
C
D
E
F
G
H
I
¾
¾
0.053
¾
0.057
0.063
0.010
0.053
0.008
0.004
0.041
0.004
¾
J
0.047
¾
K
a
0°
¾
7°
Dimensions in mm
Symbol
Min.
13.00
9.90
13.00
9.90
¾
Nom.
13.20
10.00
13.20
10.00
0.80
0.30
1.40
¾
Max.
13.40
10.10
13.40
10.10
¾
A
B
C
D
E
F
G
H
I
¾
¾
1.35
¾
1.45
1.60
0.25
1.35
0.25
0.10
1.05
0.10
¾
J
1.20
¾
K
a
0°
¾
7°
Rev. 1.10
23
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Product Tape and Reel Specifications
Reel Dimensions
D
T
2
C
A
B
T
1
SOP 28W (300mil)
Symbol
Description
Dimensions in mm
330.0±1.0
A
B
Reel Outer Diameter
Reel Inner Diameter
Spindle Hole Diameter
Key Slit Width
100.0±1.5
+0.5/-0.2
13.0
C
D
2.0±0.5
+0.3/-0.2
24.8
T1
T2
Space Between Flange
Reel Thickness
30.2±0.2
SSOP 28S (150mil)
Symbol
Description
Reel Outer Diameter
Reel Inner Diameter
Dimensions in mm
330.0±1.0
A
B
100.0±1.5
+0.5/-0.2
13.0
C
Spindle Hole Diameter
Key Slit Width
D
2.0±0.5
+0.3/-0.2
16.8
T1
T2
Space Between Flange
Reel Thickness
22.2±0.2
Rev. 1.10
24
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Carrier Tape Dimensions
P
0
P
1
t
D
E
F
W
B
0
C
D
1
P
K
0
A
0
R
e
e
l
H
o
l
e
I
C
p
a
c
k
a
g
e
p
i
n
1
a
n
d
t
h
e
a
r
e
l
o
c
a
t
e
d
o
n
t
h
e
s
a
m
e
SOP 28W (300mil)
Symbol
Description
Dimensions in mm
24.0±0.3
W
P
Carrier Tape Width
Cavity Pitch
12.0±0.1
E
Perforation Position
1.75±0.10
F
Cavity to Perforation (Width Direction)
Perforation Diameter
Cavity Hole Diameter
Perforation Pitch
11.5±0.1
+0.1/-0.0
1.5
D
+0.25/-0.00
D1
P0
P1
A0
B0
K0
t
1.50
4.0±0.1
2.0±0.1
Cavity to Perforation (Length Direction)
Cavity Length
10.85±0.10
18.34±0.10
2.97±0.10
0.35±0.01
21.3±0.1
Cavity Width
Cavity Depth
Carrier Tape Thickness
Cover Tape Width
C
SSOP 28S (150mil)
Symbol
Description
Carrier Tape Width
Cavity Pitch
Dimensions in mm
16.0±0.3
W
P
8.0±0.1
E
Perforation Position
Cavity to Perforation (Width Direction)
Perforation Diameter
Cavity Hole Diameter
Perforation Pitch
1.75±0.1
F
7.5±0.1
+0.10/-0.00
D
1.55
+0.25/-0.00
D1
P0
P1
A0
B0
K0
t
1.50
4.0±0.1
2.0±0.1
Cavity to Perforation (Length Direction)
Cavity Length
6.5±0.1
Cavity Width
10.3±0.1
2.1±0.1
Cavity Depth
Carrier Tape Thickness
Cover Tape Width
0.30±0.05
13.3±0.1
C
Rev. 1.10
25
June 4, 2010
HT66FB30/HT66FB40/HT66FB50/HT66FB60
Holtek Semiconductor Inc. (Headquarters)
No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: 886-3-563-1999
Fax: 886-3-563-1189
http://www.holtek.com.tw
Holtek Semiconductor Inc. (Taipei Sales Office)
4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan
Tel: 886-2-2655-7070
Fax: 886-2-2655-7373
Fax: 886-2-2655-7383 (International sales hotline)
Holtek Semiconductor Inc. (Shenzhen Sales Office)
5F, Unit A, Productivity Building, No.5 Gaoxin M 2nd Road, Nanshan District, Shenzhen, China 518057
Tel: 86-755-8616-9908, 86-755-8616-9308
Fax: 86-755-8616-9722
Holtek Semiconductor (USA), Inc. (North America Sales Office)
46729 Fremont Blvd., Fremont, CA 94538, USA
Tel: 1-510-252-9880
Fax: 1-510-252-9885
http://www.holtek.com
Copyright Ó 2010 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek as-
sumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.
Rev. 1.10
26
June 4, 2010
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