HT71D02 [HOLTEK]
Power Line Data Transceiver; 电力线数据收发器
| 型号： | HT71D02 |
| 厂家： | 
HOLTEK SEMICONDUCTOR INC |
| 描述： | Power Line Data Transceiver |
| 文件： | 总11页 (文件大小：491K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HT71D02/HT71D04
Power Line Data Transceiver
Features
·
Complete Data Transmission on Power Line functions
·
·
·
·
·
·
·
High Maximum Input Voltage: 30V
Integrated Low Dropout Voltage Regulator
Integrated Voltage Detector for Power Supply Monitoring
Open drain NMOS drivers for flexible interfacing
Power and Reset Protection Features
8-pin SOP package type
Minimal external component requirements
General Description
In systems where a master controller controls a number of individual interconnected subsystems such
as found in smoke detector systems, water metering systems, solar energy system etc., the cost of the
lengthy interconnecting cabling can be a major factor. By sending data along the power supply lines,
the interconnecting cables can be reduced to a simple two line type, thus greatly reducing both cable
and installation costs.
With a the addition of a few external components, this power line data transceiver device contains all
the internal components required to provide users with a system for power line data transmission and
reception. Data is modulated onto the power line by the simple reduction of the power line voltage for
a specific period of time. Power supply voltage changes can be initiated by the master controller for
data reception or initiated by the HT71D0x devices for data transmission. An internal voltage
regulator within the device ensures that a constant voltage power supply is provided to the
interconnected subsystem units while an internal voltage detector monitors the power line voltage
level.
Selection Guide
LDO
Detect
Part No.
Package
Voltage
Voltage
3.3V
5.0V
8SOP
8SOP
HT71D02
HT71D04
9.0V
9.0V
Rev. 1.00
1
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Block Diagram
VCC
VDD
LDO
3.3V/5.0V
VIN
VO
Q1
CEB
VCC
RPU1
INT0
VDLY
CDLY
LVD
9.0V
Q2
Q3
CX
CN
C1
+
CP/TD
VDD
RPU2
Q4
VDLY
C2X
Protection
Circuit
TG
C2
VPT
VSS/TS
Vref
VPT
VDLY
C2X
R
Pin Assignment
V
S
S
/
T
S
T
C
C
V
G
D
X
O
1
2
3
4
8
7
6
5
C
P
/
T
D
L
Y
C
N
V
I
N
H
T
7
1
D
0
2
/
H
T
7
1
D
0
4
8
S
O
P
-
A
Rev. 1.00
2
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Pin Description
Pin Name
VIN
I/O
¾
I
Pin-Shared Mapping
Input voltage
CN
Comparator Negative Terminal Input
Comparator positive input - CP
NMOS Driver Drain Terminal - TD
Ground pin - VSS
I
CP/TD
O
¾
O
I
VSS/TS
NMOS Driver Source Terminal - TS
NMOS Gate Input
TG
CX
O
O
¾
Comparator NMOS output
CDLY
VO
LDO Output Control - delay time determined by external capacitor
LDO Output Voltage
CP and TD share the same pin
Absolute Maximum Ratings
Maximum Input Supply Voltage ..................................................................................................33V
Operating Temperature................................................................................................-40°C to 85°C
Storage Temperature .................................................................................................-55°C to 150°C
Maximum Junction Temperature..............................................................................................150°C
Note:
These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum
Ratings² may cause substantial damage to the device. Functional operation of this device at other
conditions beyond those listed in the specification is not implied and prolonged exposure to extreme
conditions may affect device reliability.
D.C. Characteristics
Ta=25°C
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
VIN
ICC
Operating Voltage
10
30
85
V
¾
¾
¾
VIN=24V , CP=5V,
CN=2V, No Load
Operating current of VIN
30
¾
¾
¾
¾
¾
¾
mA
Output Sink Current
(Q1, VO pin)
IOL1
IOL2
IOL3
IOL4
VIN=5V, VOL =0.5V
VIN=5V, VOL =0.5V
VIN=5V, VOL =0.5V
VGS=18V, VDS =1V
0.8
250
0.8
90
mA
mA
¾
500
¾
¾
¾
¾
¾
Output Sink Current
(Q2,CDLY pin)
Output Sink Current
(Q3,CX pin)
mA
mA
Output Sink Current
¾
(Q4,TS pin) (NMOS driver)
RPU1
RPU2
VIN=10V
VIN=10V
Pull-up resistor 1
Pull-up resistor 2
-50%
-30%
5
+50%
+30%
¾
¾
MW
kW
50
Rev. 1.00
3
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
Inverter 0 (INT) Schmitt Trigger Window
VH
-20%
-20%
-20%
-20%
13.7
7.16
5.83
3.07
+20%
+20%
+20%
+20%
V
V
V
V
V
IN=24V
IN=10V
¾
VL
VSW
(note)
VH
V
¾
VL
Inverter 0 (INT) Schmitt Trigger Window
3.3V
3.201
4.850
3.300
5.000
3.399
5.150
V
V
VOUT
VIN=10V, IOUT=10mA
LDO Output Voltage
LDO Output Current
5.0V
VIN=10V, DVOUT=3%
IOUT
60
mA
¾
¾
¾
(Note1)
VIN=10V,
DVLOAD Load Regulation
60
0.2
3.3
100
¾
mV
%/V
ms
¾
¾
¾
¾
¾
¾
1mA£IOUT£30mA
Line Regulation
DVLINE
IOUT=1mA, 10V£VIN£24V
VIN=10V, IOUT=10mA,
5.0
Startup Time
CL=10mF
tSU
(Falling Egde of CE to VOUT
Within Specification)
VIN=10V, IOUT=10mA,
700
1400
¾
¾
ms
CL=0.1mF
3.3V
5.0V
¾
¾
±0.50
±0.75
¾
¾
mV/°C
mV/°C
D
V
O
U
T
IOUT=10mA,
Temperature Coefficient
D
T
a
-40°C < Ta < +85°C
Voltage Detector
VDET
VHYS
VLVD=9.0V
VLVD-0.3
VLVD VLVD+0.3
Detection Voltage
Hysteresis Width
V
V
¾
¾
0.05
¾
¾
¾
¾
VDET
D
V
D
E
T
Temperature Coefficient
¾
-40°C < Ta < +85°C
±0.9
¾
mV/°C
D
T
a
Comparator
tRES
VHC
Response Time
10
¾
¾
¾
¾
¾
¾
¾
¾
¾
0.15
¾
ms
V
hysteresis Window
¾
VCOM
VSS+1.5
VIN-1
Common-Mode Input Range
V
Note:
1. DVOUT is calculated as the difference between the output voltage under testing and the output voltage which
is measured at IOUT =10mA.
2. VIO specification is design guaranteed.
Rev. 1.00
4
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Functional Description
These devices provide a way to transmit and receive data on the common power lines of an
interconnected array of microcontroller based subsystems. By having one of these devices inside each
subsystem, the shared power and data cabling can be reduced to a simple two line type, offering major
installation cost reductions.
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System Block Diagram
Shared Power Line
All microcontroller based subsystems are connected together via the same two line power connection.
The ground line is hardwired to each subsystem while the positive power line is connected to the VIN
pin on each of the HT71D0x devices. An internal Low Dropout Voltage Regulator within the
HT71D0x devices, converts this input power supply voltage to a fixed voltage level which is supplied
to the subsystem microcontroller and other circuit components. In this way when the power line
voltage is changed due to the transmission or reception of data the subsystem circuits still continue to
receive a regulated power supply.
Rev. 1.00
5
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Data Transmission
Refer to the application circuit when reading the following description. Data information can be
transmitted onto the positive power line by reducing the voltage level for a short time duration. As the
devices include a voltage regulator which is used as the power supply to the subsystem units, then the
subsystem power supply voltage will not be affected as long as the regulator minimum dropout voltage
is maintained. However a reduction in the power supply will be detected by the C1 internal
comparators. The output of this comparator is connected to an open drain NMOS transistor, Q1, whose
open drain output on pin CX can be connected to a microcontroller input for use as a data signal.
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Power Line Data Reception
Data Reception
Refer to the application circuit when reading the following description. The individual subsystems can
transmit data to the master controller along the power supply line by using one of its I/O lines to reduce
the positive power line supply line voltage level for a short time duration. An output line on the
subsystem microcontroller should be connected to the TG pin. An internal comparator, C2, whose
positive input is connected to an internal voltage reference, will detect if this pin is pulled low. The
comparator output is connected to an internal open drain NMOS transistor, Q4, which will pull the
CP/TD line low. By connecting a suitable value resistor between the CP/TD pin and the power supply
line, the correct value of power supply voltage reduction can be implemented.
Protection Circuits
The devices include an internal Voltage Detector function which monitors the power supply input
voltage. Should the input power supply voltage fall below a safe level specified by the voltage detector
level, then the voltage detector output will change state and disable the internal regulator thus
removing the power supply source to the subsystem circuits. An internal NMOS transistor whose drain
is connected to the output power supply line, VO will also turn on keeping the VO level close to zero.
This ensures that the subsystem microcontroller receives the proper power on reset conditions. When
power is applied an external capacitor, connected to pin CDLY, together with an internal resistor,
RPU1, implement a power on delay time for the internal LDO.
Rev. 1.00
6
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Application Considerations
It is envisaged that the devices will be used together with microcontroller based subsystems which will
be required to provide two I/O pins for data transmission and reception. The MCU pin connected to the
TG pin must be setup as an output while the MCU pin connected to the CX pin must be setup as an
input.
The power supply impedence will play an important role in applications using these devices and must
be well defined for reliable data transmission and reception.
The external components connected to the CP/TD pin must be chosen carefully to ensure that an
adequate pulse duration on pin CX is generated.
The usual decoupling precautions must be taken to ensure reliable operation.
Application Circuits
The following application circuit shows the device used in conjunction with a microcontroller.
VIN
VO
VCC
VDD
LDO
3.3V/5.0V
+24V
VDD
VSS
R
Q1
47uF
104
104
VCC
RPU1
R1
R2
CEB
CDLY
LVD
9.0V
203
270
Q2
Q3
104
VO
RX
MCU
CX
CN
I/O0
Note: RX = 80kX
C1
CP/TD
+
VDD
RPU2
TG
I/O1
Protection
Circuit
VSS/TS
C2
0V
Q4
Vref
Rev. 1.00
7
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Package Information
8-pin SOP (150mil) Outline Dimensions
8
1
5
A
B
4
C
C
'
G
H
D
a
E
F
MS-012
Symbol
Dimensions in inch
Min.
0.228
0.150
0.012
0.188
¾
Nom.
¾
Max.
0.244
0.157
0.020
0.197
0.069
¾
A
B
C
C¢
D
E
F
¾
¾
¾
¾
0.050
¾
0.004
0.016
0.007
0°
0.010
0.050
0.010
8°
¾
¾
¾
¾
G
H
a
Dimensions in mm
Symbol
Min.
5.79
3.81
0.30
4.78
¾
Nom.
¾
Max.
6.20
3.99
0.51
5.00
1.75
¾
A
B
C
C¢
D
E
F
¾
¾
¾
¾
1.27
¾
0.10
0.41
0.18
0°
0.25
1.27
0.25
8°
¾
¾
¾
¾
G
H
a
Rev. 1.00
8
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Reel Dimensions
D
T
2
C
A
B
T
1
SOP 8N
Symbol
Description
Dimensions in mm
330.0±1.0
A
B
Reel Outer Diameter
Reel Inner Diameter
Spindle Hole Diameter
Key Slit Width
100.0±1.5
+0.5/-0.2
13.0
C
D
2.0±0.5
+0.3/-0.2
12.8
T1
T2
Space Between Flange
Reel Thickness
18.2±0.2
Rev. 1.00
9
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Carrier Tape Dimensions
P
0
P
1
t
D
E
F
W
B
0
C
D
1
P
K
0
A
0
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SOP 8N
Symbol
Description
Dimensions in mm
+0.3/-0.1
12.0
W
P
Carrier Tape Width
Cavity Pitch
8.0±0.1
1.75±0.1
5.5±0.1
E
Perforation Position
F
Cavity to Perforation (Width Direction)
Perforation Diameter
Cavity Hole Diameter
Perforation Pitch
D
1.55±0.1
+0.25/-0.00
D1
P0
P1
A0
B0
K0
t
1.50
4.0±0.1
2.0±0.1
6.4±0.1
5.2±0.1
2.1±0.1
0.30±0.05
9.3±0.1
Cavity to Perforation (Length Direction)
Cavity Length
Cavity Width
Cavity Depth
Carrier Tape Thickness
Cover Tape Width
C
Rev. 1.00
10
June 30, 2010
HT71D02/HT71D04
Power Line Data Transceiver
Holtek Semiconductor Inc. (Headquarters)
No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: 886-3-563-1999
Fax: 886-3-563-1189
http://www.holtek.com.tw
Holtek Semiconductor Inc. (Taipei Sales Office)
4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan
Tel: 886-2-2655-7070
Fax: 886-2-2655-7373
Fax: 886-2-2655-7383 (International sales hotline)
Holtek Semiconductor Inc. (Shenzhen Sales Office)
5F, Unit A, Productivity Building, No.5 Gaoxin M 2nd Road, Nanshan District, Shenzhen, China 518057
Tel: 86-755-8616-9908, 86-755-8616-9308
Fax: 86-755-8616-9722
Holtek Semiconductor (USA), Inc. (North America Sales Office)
46729 Fremont Blvd., Fremont, CA 94538, USA
Tel: 1-510-252-9880
Fax: 1-510-252-9885
http://www.holtek.com
Copyright Ó 2010 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek as-
sumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.
Rev. 1.00
11
June 30, 2010
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