HI-6140 [HOLTIC]

10 MBit/s MIL-STD-1553 3.3V BC / MT / RT; 10 Mbit / s的MIL -STD -1553 3.3V BC / MT / RT
HI-6140
型号: HI-6140
厂家: HOLT INTEGRATED CIRCUITS    HOLT INTEGRATED CIRCUITS
描述:

10 MBit/s MIL-STD-1553 3.3V BC / MT / RT
10 Mbit / s的MIL -STD -1553 3.3V BC / MT / RT

文件: 总7页 (文件大小:717K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HI-6140  
10 MBit/s MIL-STD-1553  
3.3V BC / MT / RT  
January 2013  
GENERAL DESCRIPTION  
FEATURES  
•ꢀ 10 Mbps bit rate complies with MMSI / EBR-1553  
TheꢀHI-6140ꢀisꢀaꢀ10ꢀMBit/secꢀversionꢀofꢀHolt’sꢀHI-6130ꢀ  
integratedꢀBC/MT/RTꢀsolution.ꢀTheꢀpartꢀisꢀdesignedꢀforꢀ  
MIL-STD-1553-derivedprotocolsthatusea10MB/secꢀ  
dataꢀrate,ꢀsuchꢀasꢀMiniatureꢀMunitionsꢀStoresꢀInterfaceꢀ  
(MMSI)ꢀorꢀEBR-1553.ꢀ  
and SAE AS5652 10Mbps network protocol  
•ꢀ DO-254ꢀcertifiable  
•ꢀ MayꢀbeꢀconfiguredꢀasꢀBC,ꢀRTꢀorꢀMT  
•ꢀ 16-bitꢀparallelꢀhostꢀbusꢀinterface  
Theꢀ partꢀ isꢀ availableꢀ inꢀ Industrialꢀ -40oC to +85oC,ꢀ orꢀ  
Extendedꢀ-55oC to +125oCꢀtemperatureꢀranges.ꢀOptionalꢀ  
burn-inꢀisꢀavailableꢀonꢀtheꢀextendedꢀtemperatureꢀrange.  
•ꢀ 64K bytes on-chip RAM with error detection/  
correction option  
•ꢀ Logicꢀlevelꢀsignalꢀinterfaceꢀtoꢀꢀstandardꢀexternalꢀ  
RS-485 transceivers  
Referꢀ toꢀ theꢀ HI-6130ꢀ datasheetꢀ forꢀ fullꢀ functionalꢀ  
description and operation.  
•ꢀ Autonomousꢀterminalꢀoperationꢀrequiresꢀminimalꢀ  
host intervention  
•ꢀ FullyꢀprogrammableꢀBusꢀControllerꢀusesꢀ28ꢀopꢀ  
codeꢀinstructionꢀset  
•ꢀ BCꢀmodeꢀoperationꢀprovidesꢀlogicꢀsignalsꢀtoꢀ  
simplifyꢀexternalꢀMMSIꢀLogicalꢀHubꢀdesign  
PIN CONFIGURATION (TOP)  
•ꢀ SupportsꢀallꢀthreeꢀAS5652ꢀ(MMSI)ꢀBusꢀ  
Controllerꢀmodes:ꢀSpec,ꢀSwitchꢀandꢀLinkꢀmodes  
•ꢀ SimpleꢀMonitorꢀTerminalꢀ(SMT)ꢀModeꢀrecordsꢀ  
commandsꢀandꢀdataꢀseparately,ꢀwithꢀ16-bitꢀorꢀ  
48-bitꢀtimeꢀtagging  
75 - D1  
74 - D0  
VCC - 1  
GND - 2  
BCTRIG - 3  
D12 - 4  
D13 - 5  
D14 - 6  
73 - WPOL  
72 - BTYPE  
71 - BENDI  
70 - TEST  
69 - LOCK  
68 - MTSTOFF  
67 - BCENA  
66 - DNC*  
65 - VCCP  
64 - DNC*  
63 - DNC*  
62 - VCCP  
61 - DNC*  
60 - GND  
59 - DENAA  
58 - TXA  
•ꢀ Independentꢀtime-tagꢀcountersꢀforꢀallꢀterminalsꢀ  
withꢀ32-bitꢀoptionꢀforꢀBusꢀControllerꢀandꢀ48-bitꢀ  
optionꢀforꢀMonitorꢀTerminal  
D15 - 7  
RAMEDC - 8  
CE - 9  
MODE - 10  
STR / OE - 11  
VCC - 12  
MCLK - 13  
GND - 14  
WAIT / WAIT - 15  
R/W / WE - 16  
RTA0 - 17  
RTA1 - 18  
RTA2 - 19  
MR - 20  
•ꢀ 64-WordꢀInterruptꢀLogꢀBufferꢀqueuesꢀtheꢀmostꢀ  
recentꢀ32ꢀinterrupts.ꢀHardware-assistedꢀinterruptꢀ  
decodingꢀquicklyꢀidentifiesꢀinterruptꢀsources  
HI-6140PQxF  
•ꢀ Built-inꢀself-testꢀforꢀprotocolꢀlogic,ꢀdigitalꢀsignalꢀ  
57 - DENAB  
56 - TXB  
55 - BWID  
54 - A15  
53 - A14  
52 - A12  
paths and internal RAM  
RTA3 - 21  
RTA4 - 22  
A0 - 23  
A1 - 24  
A2 - 25  
•ꢀ Optionalꢀself-initializationꢀatꢀresetꢀusesꢀexternalꢀ  
51 - A13  
TOP VIEW  
serial EEPROM  
•ꢀ Twoꢀtemperatureꢀranges:ꢀ-40oC to +85oC,ꢀorꢀ  
-55oC to +125oC  
100-pin PQFP  
* DNC: Do not connect  
HOLT INTEGRATED CIRCUITS  
www.holtic.com  
1
DS6140 Rev. A  
01/13  
HI-6140  
BLOCK DIAGRAM  
HI-6140 10MBit / Sec 1553 Terminal (RS-485) with Host Parallel Bus Interface  
Hub RT Address (MMSI BC only)  
HRTA4:0  
IRQ  
*MTPKRDY  
READY  
(only if 0x004D bit 3 = 1)  
Discrete  
Signal  
Outputs  
ACTIVE  
RTA4:0  
*RTMC8  
RTAP  
Configuration  
Option  
RTLOCK  
BENDI  
Logic  
Static RAM  
and  
Registers  
VCC  
GND  
MTSTOFF  
RAMEDC  
MCLK  
TTCLK  
INTERNAL  
CLOCKS  
BC  
Message  
Processor  
MTTCLK  
BWID  
BTYPE  
WPOL  
HI-4853  
Bus A  
Manchester  
Encoder  
TXA  
DI  
A
B
RS-485  
BUS A  
Address  
Data  
DENAA  
RXA  
DE  
RO  
Memory  
and  
Register  
Access  
Control  
CE  
R / W or WE  
STR or OE  
A0 / LB  
Bus A  
Manchester  
Decoder  
Host Bus  
Interface  
Control  
RE  
MT  
Message  
Processor  
WAIT or WAIT  
A15:1  
D15:0  
HI-4853  
Bus B  
Manchester  
Encoder  
TXB  
DI  
A
B
RS-485  
BUS B  
DENAB  
RXB  
DE  
RO  
Bus B  
Manchester  
Decoder  
AUTOEN  
EECOPY  
MR  
Reset &  
Initialization  
Logic  
RE  
RT  
Message  
Processor  
BCENA  
BCTRIG  
MTRUN  
RTENA  
RTSSF  
Discrete  
Signal  
Input  
TEST  
MODE  
Serial  
Test  
Logic  
Peripheral  
Interface  
(SPI) to  
EEPROM  
ACKIRQ  
* Two signals not available if register 0x004D bit 3 = 1,  
i.e., device configured for MMSI Bus Controller operation  
OPTIONAL  
SERIAL EEPROM  
(AUTO-CONFIG)  
Figureꢀ1.ꢀ HI-6140ꢀBlockꢀDiagram  
HOLT INTEGRATED CIRCUITS  
2
HI-6140  
PIN DESCRIPTIONS  
See HI-6130 datasheet for full Pin Descriptions.  
Table 1. Pins that apply to HI-6140 only  
Pin  
Function  
Description  
UnipolarꢀTransmitꢀDataꢀoutputꢀforꢀBusꢀA.ꢀConnectꢀthisꢀpinꢀtoꢀtheꢀDriverꢀ  
Inputꢀ(DI)ꢀpinꢀofꢀexternalꢀRS-485ꢀTransceiver.ꢀWhenꢀbuildingꢀanꢀAS5652ꢀ  
MMSIꢀBusꢀController,ꢀthisꢀsignalꢀgoesꢀtoꢀtheꢀBCꢀLogicalꢀHubꢀwhichꢀroutesꢀ  
commandsꢀtoꢀselectedꢀhub-RTꢀlink(s).  
TXA  
Output  
UnipolarꢀReceiveꢀDataꢀinputꢀfromꢀBusꢀA.ꢀConnectꢀthisꢀpinꢀtoꢀtheꢀReceiverꢀ  
Outputꢀ(RO)ꢀpinꢀofꢀexternalꢀRS-485ꢀTransceiver.ꢀWhenꢀbuildingꢀanꢀAS5652ꢀ  
MMSIꢀBusꢀController,ꢀthisꢀsignalꢀcomesꢀfromꢀtheꢀBCꢀLogicalꢀHubꢀwhichꢀ  
routesꢀRTꢀcommandꢀresponsesꢀfromꢀselectedꢀhub-RTꢀlink(s)ꢀintoꢀtheꢀHI-6140ꢀ  
operatingꢀinꢀBCꢀmode.  
Input  
50KΩꢀpull-up  
RXA  
TXB  
RXB  
UnipolarꢀTransmitꢀDataꢀoutputꢀforꢀBusꢀB.ꢀConnectꢀthisꢀpinꢀtoꢀtheꢀDriverꢀ  
Inputꢀ(DI)ꢀpinꢀofꢀexternalꢀRS-485ꢀTransceiver.ꢀWhenꢀbuildingꢀanꢀAS5652ꢀ  
MMSIꢀBusꢀController,ꢀthisꢀsignalꢀgoesꢀtoꢀtheꢀBCꢀLogicalꢀHubꢀwhichꢀroutesꢀ  
commandsꢀtoꢀselectedꢀhub-RTꢀlink(s).  
Output  
UnipolarꢀReceiveꢀDataꢀinputꢀfromꢀBusꢀB.ꢀConnectꢀthisꢀpinꢀtoꢀtheꢀReceiverꢀ  
Outputꢀ(RO)ꢀpinꢀofꢀexternalꢀRS-485ꢀTransceiver.ꢀWhenꢀbuildingꢀanꢀAS5652ꢀ  
MMSIꢀBusꢀController,ꢀthisꢀsignalꢀcomesꢀfromꢀtheꢀBCꢀLogicalꢀHubꢀwhichꢀ  
routesꢀRTꢀcommandꢀresponsesꢀfromꢀselectedꢀhub-RTꢀlink(s)ꢀintoꢀtheꢀHI-6140ꢀ  
operatingꢀinꢀBCꢀmode.  
Input  
50KΩꢀpull-up  
DriverꢀEnableꢀoutputꢀforꢀBusꢀA.ꢀConnectꢀthisꢀpinꢀtoꢀtheꢀdriverꢀenableꢀ(DE)ꢀ  
inputꢀpinꢀofꢀexternalꢀBusꢀAꢀRS-485ꢀtransceiver.ꢀWhenꢀbuildingꢀanꢀAS5652ꢀ  
MMSIꢀBusꢀController,ꢀthisꢀsignalꢀgoesꢀtoꢀtheꢀBCꢀLogicalꢀHubꢀforꢀroutingꢀBCꢀ  
Command Words.  
DENAA  
DENAB  
Output  
Output  
DriverꢀEnableꢀoutputꢀforꢀBusꢀB.ꢀConnectꢀthisꢀpinꢀtoꢀtheꢀdriverꢀenableꢀ(DE)ꢀ  
inputꢀpinꢀofꢀexternalꢀBusꢀBꢀRS-485ꢀtransceiver.ꢀWhenꢀbuildingꢀanꢀAS5652ꢀ  
MMSIꢀBusꢀController,ꢀthisꢀsignalꢀgoesꢀtoꢀtheꢀBCꢀLogicalꢀHubꢀforꢀroutingꢀBCꢀ  
Command Words.  
AS5652ꢀ(MMSI)ꢀBusꢀControllerꢀHubꢀRTꢀAddress.ꢀTheꢀMMSIꢀBCꢀoutputsꢀaꢀ  
5-bitꢀparallelꢀRTꢀaddressꢀbeforeꢀissuingꢀaꢀnewꢀCommandꢀWord.ꢀTheꢀLogicalꢀ  
HubꢀusesꢀtheꢀhubꢀRTꢀaddressꢀforꢀHub-RTꢀlinkꢀselection.ꢀHRTAꢀoutputsꢀonlyꢀ  
availableꢀwhenꢀregisterꢀ0x004Dꢀbitꢀ3ꢀisꢀlogicꢀ1.ꢀWhenꢀselected,ꢀtheꢀfollowingꢀ  
pinsꢀareꢀnotꢀavailable:ꢀTEST4,ꢀTEST6,ꢀRTMC8,ꢀMTPKTRDY.  
HRTA4:0  
Output  
Note:TheHI-6140mayfunctionasasingleremoteterminal(RT),whereasHI-613xdevicescanfunctionastwoꢀ  
independentꢀRTs.ꢀTheꢀpinꢀassignmentsꢀforꢀdualꢀRTꢀoperationꢀinꢀHI-613xꢀ(e.g.ꢀRT1A4-0,ꢀRT2A4-0,ꢀRT1AP,ꢀRT2AP,ꢀetc.)ꢀ  
areꢀreplacedꢀwithꢀpinꢀassignmentsꢀforꢀaꢀsingleꢀRTꢀinꢀHI-6140ꢀ(e.g.ꢀRTA4:0,ꢀRTAP,ꢀetc.).ꢀDescriptionsꢀandꢀfunctionalityꢀ  
remain the same.  
HOLT INTEGRATED CIRCUITS  
3
HI-6140  
OPERATION  
ReferꢀtoꢀtheꢀHI-6130ꢀdatasheetꢀforꢀdetailedꢀoperationꢀandꢀregisterꢀdescription.ꢀ  
Operational and Protocol Considerations for 10Mbit/sec  
TheꢀHI-6140ꢀisꢀdesignedꢀforꢀuseꢀinꢀMIL-STD-1553Bꢀ10Mbpsꢀapplications,ꢀsuchꢀasꢀMiniatureꢀMunitionsꢀStoresꢀInterfaceꢀ  
(MMSI)orEBR-1553.ꢀThedeviceproducesdualredundantManchesterIIbi-phaseencodeddatafortransmissionꢀ  
onꢀ dualꢀ RS-485ꢀ busses.ꢀ External,ꢀ half-duplex,ꢀ 20Mbpsꢀ slewꢀ rateꢀ controlledꢀ RS-485ꢀ transceiversꢀ (HI-4853)ꢀ areꢀ  
recommendedforconnectiontotheRS-485busses(seeFigure1.HI-6140BlockDiagram”onpage2 and “Pin  
Descriptions”ꢀonꢀpageꢀ3).ꢀꢀ  
Timing differences compared to MIL-STD-1553B (measured mid-parity to mid-sync):  
•ꢀ MinimumꢀintermessageꢀGapꢀ=ꢀ1μsꢀ(vsꢀ4μsꢀforꢀMIL-STD-1553B)  
•ꢀ MinimumꢀNoꢀResponseꢀTimeoutꢀ=ꢀ8μsꢀꢀ(vsꢀ12μsꢀforꢀMIL-STD-1553B)  
•ꢀ RTꢀresponseꢀtimeꢀmustꢀbeginꢀinꢀrangeꢀ400nsꢀtoꢀ4μs  
System Architecture  
SAEAS5652ꢀMMSIꢀnetworkꢀisꢀasꢀaꢀ“star”ꢀconfigurationꢀwithꢀeachꢀremoteꢀterminalꢀconnectedꢀtoꢀaꢀcentralꢀBusꢀControllerꢀ  
usingꢀaꢀdedicatedꢀRS-485ꢀcable.ꢀAꢀLogicalꢀHubꢀprovidesꢀtheꢀindividualꢀRTꢀinterfaces,ꢀaꢀseriesꢀofꢀHub-to-RTꢀlinks.ꢀTheꢀ  
LogicalꢀHubꢀroutesꢀcommandsꢀfromꢀtheꢀBCꢀtoꢀtheꢀselectedꢀRTꢀ(orꢀtoꢀallꢀRTs,ꢀinꢀtheꢀcaseꢀofꢀbroadcastꢀcommands.)ꢀ  
TheꢀHubꢀalsoꢀroutesꢀRTꢀresponsesꢀfromꢀtheꢀselectedꢀRTꢀbackꢀtoꢀtheꢀBC.ꢀToꢀsimplifyꢀdesignꢀofꢀaꢀLogicalꢀHubꢀoutsideꢀ  
aꢀHI-6140-basedꢀMMSIꢀBC,ꢀtheꢀdeviceꢀhasꢀtwoꢀconfigurationꢀbitsꢀwhichꢀapplyꢀonlyꢀforꢀMMSIꢀBusꢀControllerꢀservice:  
•ꢀ Whenꢀset,ꢀregisterꢀ0x004Dꢀbitꢀ3ꢀenablesꢀaꢀ5-bitꢀparallelꢀHubꢀRTꢀAddressꢀoutput.ꢀThisꢀ5-bitꢀvalueꢀisꢀupdatedꢀ  
atꢀleastꢀ250nsꢀbeforeꢀaꢀnewꢀCommandꢀWordꢀisꢀissuedꢀbyꢀtheꢀBC.ꢀTheꢀHubꢀusesꢀthisꢀvalueꢀtoꢀactivateꢀtheꢀap-  
propriateꢀHub-RTꢀlinkꢀforꢀCommandꢀWordꢀtransmission.ꢀTheꢀlinkꢀremainsꢀactiveꢀforꢀtheꢀRTꢀresponseꢀtoꢀtheꢀBC.  
•ꢀ AS5652MMSIdefines3RTaddressingmodes:Specmode,SwitchmodeandLinkmode.Theuniquead-  
dressingꢀforꢀMMSIꢀLinkꢀmodeꢀisꢀenabledꢀwhenꢀregisterꢀ0x004Dꢀbitsꢀ4:3ꢀareꢀbothꢀhigh.ꢀInꢀthisꢀconfiguration,ꢀtheꢀ  
5-bitꢀHubꢀRTꢀAddressꢀ(HRTA)ꢀoutputꢀreflectsꢀtheꢀCommandꢀWordꢀinꢀtheꢀHI-6140ꢀBCꢀInstructionꢀList;ꢀtheꢀHubꢀ  
usesꢀthisꢀvalueꢀforꢀroutingꢀBCꢀcommandꢀ(andꢀRTꢀresponse)ꢀtoꢀ(andꢀfrom)ꢀtheꢀselectedꢀHub-RTꢀlink.ꢀHoweverꢀ  
theꢀserialꢀcommandꢀoutputꢀfromꢀtheꢀTXAꢀorꢀTXBꢀtransmitꢀdataꢀoutputꢀfromꢀtheꢀHI-6140ꢀwillꢀalwaysꢀcontainꢀtheꢀ  
embeddedꢀRTꢀaddressꢀ0ꢀ(00000ꢀatꢀcommandꢀwordꢀbitsꢀ15:11.ꢀ  
NoꢀspecialꢀaddressingꢀconsiderationꢀisꢀneededꢀforꢀdesignꢀofꢀanꢀAS5652ꢀMMSIꢀRTꢀbasedꢀonꢀtheꢀHI-6140ꢀdevice.ꢀ  
Protocol Considerations  
•ꢀ Forꢀ10Mbit/secꢀMMSIꢀapplications,ꢀsingleꢀterminalꢀBC,ꢀRTꢀorꢀMTꢀoperationꢀisꢀrecommended.  
•ꢀ InꢀSAEꢀAS5652,ꢀtransmitꢀmodeꢀcodesꢀ0,4ꢀandꢀ5ꢀareꢀreserved,ꢀnotꢀused.ꢀReceiveꢀmodeꢀcodesꢀ20-21ꢀareꢀre-  
served,ꢀnotꢀused.ꢀTheseꢀmodeꢀcommandsꢀcorrespondꢀtoꢀ“DynamicꢀBusꢀControl”,ꢀandꢀtwoꢀvariantsꢀeachꢀofꢀ“Busꢀ  
Shutdown”ꢀandꢀ“OverrideꢀBusꢀShutdown”ꢀmodeꢀcommands.ꢀ  
•ꢀ AllꢀRT-RTꢀcommandsꢀareꢀprohibitedꢀinꢀMMSIꢀapplications.ꢀꢀForꢀmulti-dropꢀ10Mbit/secꢀEBR-1553ꢀapplications,ꢀ  
theHI-6140processesconventionalRT-RTmessagesnormally.NonsenseRT-RTmessageshavingmodeꢀ  
codeꢀ(oneꢀorꢀbothꢀcommandꢀwordsꢀwithꢀsubaddressꢀ0ꢀorꢀ31ꢀdecimal)ꢀgivesꢀunpredictableꢀresults.ꢀTherefore,ꢀ  
encodingꢀnonsenseꢀmodeꢀcodeꢀRT-RTꢀmessagesꢀforꢀBCꢀisꢀnotꢀrecommended.ꢀ  
HOLT INTEGRATED CIRCUITS  
4
HI-6140  
PACKAGE DIMENSIONS  
100-PIN PLASTIC QUAD FLAT PACK (PQFP)  
inches (millimeters)  
Package Type: 100PQS  
.0197  
BSC  
(0.50)  
.630  
(16.0)  
.551  
(14.0)  
BSC SQ  
BSC SQ  
.009 ± .002  
(.22 ± .05)  
.024 ± .006  
(.60 ± .15)  
.039  
(1.0)  
typ  
.008  
(0.20)  
min  
See Detail A  
.008  
(0.20)  
R max  
.059 ± .004  
(1.50 ± .10)  
.055 ± .002  
(1.40 ± .05)  
0°  
7°  
BSC = “Basic Spacing between Centers”  
is theoretical true position dimension and  
has no tolerance. (JEDEC Standard 95)  
.003  
(0.08)  
R min  
Detail A  
HOLT INTEGRATED CIRCUITS  
5
HI-6140  
ORDERING INFORMATION  
HI - 6140 PQ x F  
PART NUMBER LEAD FINISH  
F
100%ꢀMatteꢀTinꢀ(Pb-free,ꢀRoHSꢀcompliant)  
PART NUMBER TEMPERATURE RANGE  
FLOW BURN IN  
I
-40oC to +85oC  
-55oC to +125oC  
-55oC to +125oC  
I
No  
No  
T
M
T
M
Yes  
PART NUMBER PACKAGE DESCRIPTION  
PQ  
100ꢀPINꢀPLASTICꢀQUADꢀFLATꢀPACK,ꢀPQFPꢀ(100PQS)  
HOLT INTEGRATED CIRCUITS  
6
HI-6140  
REVISION HISTORY  
Revision  
DS6140,ꢀ Rev. New  
Rev. A  
Date  
Description of Change  
05/02/12 Initial Release.  
01/03/13 Correctedꢀpin-out.ꢀUpdatedꢀpinꢀnamesꢀandꢀpinꢀdescriptions.  
HOLT INTEGRATED CIRCUITS  
7

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