HI-8570PDTF [HOLTIC]
ARINC 429 /- 5V Supply Line Driver; ARINC 429 / - 5V电源线路驱动器
| 型号： | HI-8570PDTF |
| 厂家： | 
HOLT INTEGRATED CIRCUITS |
| 描述： | ARINC 429 /- 5V Supply Line Driver |
| 文件： | 总9页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HI-8570, HI-8571
ARINC 429
+/- 5V Supply Line Driver
August 2013
DESCRIPTION
PIN CONFIGURATION
The HI-8570 and HI-8571 are CMOS integrated circuits
designed to directly drive the ARINC 429 bus in an 8-pin
package. Two logic inputs control a differential voltage
between the output pins producing a +10 volt One, a
-10 volt Zero, and a 0 volt Null.
SLP1.5
8
V+
1
TX0IN 2
TX1IN 3
GND 4
7
6
5
TXBOUT
TXAOUT
V-
A logic input is provided to control the slope of the
differential output signal. Timing is set by an on-chip
resistor and capacitor and tested to be within ARINC
requirements.
SUPPLY VOLTAGES
The HI-8570 has 37.5 ohms in series with each line driver
output. The HI-8571 provides the option to bypass part of
the output resistance so external resistance may be
added for lightning protection circuits.
V+ = +5V
V- = -5V
The HI-8570 or the HI-8571 along with the HI-8588 line
receiver offer the smallest options available to get on and
off theARINC 429bus.
FUNCTION TABLE
TX1IN TX0IN SLP1.5
TXAOUT
0V
TXBOUT
0V
SLOPE
N/A
0
0
0
1
1
1
0
1
1
0
0
1
X
0
1
0
1
X
FEATURES
-5V
5V
10ms
1.5ms
10ms
1.5ms
N/A
-5V
5V
• Direct ARINC 429 line driver interface
in a small package
5V
-5V
5V
-5V
0V
0V
• On-chip line driver slope control and
selection by logic input
• Low current 5 volt supplies
• CMOS / TTL logic pins
PIN DESCRIPTION TABLE
PIN SYMBOL
FUNCTION
LOGIC INPUT
LOGIC INPUT
LOGIC INPUT
POWER
DESCRIPTION
1
2
3
4
5
6
7
8
SLP 1.5
TX0IN
TX1IN
GND
CMOS OR TTL, V+ IS OK
CMOS OR TTL
• Plastic and ceramic package options -
surface mount and DIP
CMOS OR TTL
GROUND
• Thermally enhanced SOIC packages
V-
POWER
-5 VOLTS
TXAOUT
TXBOUT
V+
OUTPUT
LINE DRIVER TERMINAL A
LINE DRIVER TERMINAL B
+5 VOLTS
• Extended Temperature and Burn-in
available
OUTPUT
POWER
HOLT INTEGRATED CIRCUITS
www.holtic.com
(DS8570 Rev. E)
08/13
HI-8570, HI-8571
FUNCTIONAL DESCRIPTION
Figure 1 is a block diagram of the line driver. The +5V and
-5V levels are generated from the supply voltages. Cur-
rents for slope control are set by zener voltages across on-
chip resistors.
A unity gain buffer receives the internally generated slopes
and differentially drives the ARINC line. Current is limited
by the series output resistors at each pin. There are no
fuses at the outputs of the HI-8570 as exists on the HI-
8382.
The TX0IN and TX1IN inputs receive logic signals from a
control transmitter chip such as the HI-6010, HI-3282, HI-
8282A, HI-8584 or HI-8783. TXAOUT and TXBOUT hold
each side of the ARINC bus at Ground until one of the
inputs becomes a One. If for example TX1IN goes high, a
charging path is enabled to 5V on an “A” side internal
capacitor while the “B” side is enabled to -5V. The charg-
ing current is selected by the SLP1.5 pin. If the SLP1.5
pin is high, the capacitor is nominally charged from 10% to
90% in 1.5µs. If SLP1.5 is low, the rise and fall times are
10µs.
The HI-8570 has 37.5 ohms in series with each output and
the HI-8571 has 27.5 ohms in series with each output.
The HI-8571 is for applications where external series re-
sistance is required, typically for lightning protection de-
vices.
Both the HI-8570 and HI-8571 are built using high-speed
CMOS technology. Care should be taken to ensure the
V+ and V- supplies are locally decoupled and that the
input waveforms are free from negative voltage spikes
which may upset the chip’s internal slope control circuitry.
5V
“A” SIDE
ONE
TXAOUT
CURRENT
CONTROL
HI-8570 = 37.5 OHMS
HI-8571 = 27.5 OHMS
NULL
ZERO
-5V
CONTROL
LOGIC
TX0IN
TX1IN
ESD
PROTECTION
AND
SLP1.5
VOLTAGE
TRANSLATION
5V
“B” SIDE
ONE
NULL
ZERO
TXBOUT
CURRENT
CONTROL
HI-8570 = 37.5 OHMS
HI-8571 = 27.5 OHMS
-5V
CONTROL
LOGIC
FIGURE 1 - LINE DRIVER BLOCK DIAGRAM
5V
1
VCC
2
6
7
HARDWIRED
OR
DRIVEN FROM LOGIC
TESTA
TESTB
ROUTA
ROUTB
RXD1
RXD0
8
{
HI-8588
4
3
RINA
ARINC
Channel
HI-6010
APPLICATION INFORMATION
RINB
Figure 2 shows a possible application
of the HI-8570/8571 interfacing an
ARINC transmit channel from the HI-
6010.
5
5V
8 BIT BUS
1
SLP1.5
8
V+
6
7
3
2
TXAOUT
TXD1
TXD0
TX1IN
TX0IN
ARINC
Channel
HI-8570
TXBOUT
GND
V-
4
5
-5V
FIGURE 2 - APPLICATION DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HI-8570, HI-8571
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS
Supply Voltages
V+....................................+4.8V to +5.3V
V-..................................... -5.3V to -4.8V
Voltages referenced to Ground
Supply voltages
V+....................................................+7V
V-......................................................-7V
Temperature Range
Industrial ........................-40°C to +85°C
Extended......................-55°C to +125°C
DC current per input pin................. 10mA
Power dissipation at 25°C
plastic DIL............1.0W, derate 10mW/°C
ceramic DIL..........0.5W, derate 7mW/°C
NOTE: Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to
the device. These are stress ratings only.
Operation at the limits is not recommended.
Reflow Solder Temperature ...............260°C
Storage Temperature........-65°C to +150°C
DC ELECTRICAL CHARACTERISTICS
V+ = +5V, V- = -5V, TA = Operating Temperature Range (unless otherwise stated)
PARAMETERS
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNITS
Input voltage (TX1IN, TX0IN, SLP1.5)
high
low
VIH
VIL
2.1
-
-
-
V+
volts
volts
0.5
Input current (TX1IN, TX0IN, SLP1.5)
source
sink
IIH
IIL
VIN = 0V
VIN = 5V
-
-
-
-
0.1
0.1
mA
mA
ARINC output voltage (Differential)
one
zero
null
VDIFF1
VDIFF0
VDIFFN
no load; TXAOUT - TXBOUT
9.00 10.00 11.00
volts
volts
volts
no load; TXAOUT - TXBOUT -11.00 -10.00 -9.00
no load; TXAOUT - TXBOUT -0.50
0
0.50
ARINC output voltage (Ref. to GND)
one or zero
null
VDOUT
VNOUT
no load & magnitude at pin
no load
4.50
5.00
0
5.50
0.25
volts
volts
-0.25
Operating supply current
SLP1.5 = V+
V+
V-
IDD
IEE
TX1IN & TX0IN = 0V: no load
-
6.0
10.0
-
mA
mA
TX0IN & TX1IN = 0V: no load -10.0
-6.0
ARINC output impedence
HI-8570
ZOUT
-
-
37.5
27.5
-
-
ohms
ohms
HI-8571
HOLT INTEGRATED CIRCUITS
3
HI-8570, HI-8571
AC ELECTRICAL CHARACTERISTICS
V+ = 5.0V, V- = -5V, TA = Operating Temperature Range (unless otherwise stated)
SYMBOL TEST CONDITIONS
defined in Figure 3, no load
MIN
TYP
MAX
UNITS
PARAMETERS
Line Driver propagation delay
Output high to low
ns
ns
t
t
-
-
500
500
-
-
phlx
plhx
Output low to high
Line Driver transition times
High Speed
SLP 1.5 = V+
pin 1 = logic 1
pin 1 = logic 1
Output high to low
Output low to high
t
1.0
1.0
1.5
1.5
2.0
2.0
µs
µs
fx
rx
t
Low Speed
SLP1.5 = GND
pin 1 = logic 0
pin 1 = logic 0
Output high to low
Output low to high
t
t
5.0
5.0
10.0
10.0
15.0
15.0
µs
µs
fx
rx
Input capacitance (1)
logic
C
-
-
10
pF
IN
Notes:
1. Guaranteed but not tested
5V
0V
pin 3
t
phlx
t
t
plhx
plhx
5V
0V
pin 2
t
phlx
t
rx
t
rx
10V
0V
90%
V
10%
10%
DIFF
pin 6 - pin 7
90%
10%
-10V
t
fx
t
fx
FIGURE 3 - LINE DRIVER TIMING
HOLT INTEGRATED CIRCUITS
4
HI-8570, HI-8571
PACKAGE THERMAL CHARACTERISTICS
Maximum ARINC Load
SUPPLY CURRENT (mA)2
PACKAGE STYLE1
ARINC 429
JUNCTION TEMP, Tj °C
DATA RATE Ta = 25°C
Ta = 85°C
Ta = 125°C
Ta = 25°C
Ta = 85°C
Ta = 125°C
Low Speed3
High Speed4
20.98
26.40
20.96
26.16
20.96
25.96
38.24
44.78
98.34
138.92
144.59
8 Lead Plastic ESOIC5
104.66
TXAOUT and TXBOUT Shorted to Ground 6,7,8
PACKAGE STYLE1
ARINC 429
SUPPLY CURRENT (mA)2
JUNCTION TEMP, Tj °C
DATA RATE Ta = 25°C
Ta = 85°C
Ta = 125°C
Ta = 25°C
Ta = 85°C
Ta = 125°C
Low Speed3
High Speed4
30.26
30.44
29.22
29.42
28.46
28.68
53.75
53.92
112.76
112.95
152.04
152.25
8 Lead Plastic ESOIC5
Notes:
1. All data taken in still air.
2. At 100% duty cycle, 5V power supplies.
3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF.
4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF
as this is considered unrealistic for high speed operation.
5. 8 Lead Plastic ESOIC (Thermally enhanced SOIC with built in heat sink). Heat sink not soldered.
6. Similar results would be obtained with TXAOUT shorted to TXBOUT.
7. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
8. Data will vary depending on air flow and the method of heat sinking employed.
HOLT INTEGRATED CIRCUITS
5
HI-8570, HI-8571
ORDERING INFORMATION
HI - 857x xx x x
PART
NUMBER
LEAD
FINISH
Tin / Lead (Sn / Pb) Solder
Blank
F
100% Matte Tin (Pb-free, RoHS compliant)
PART
NUMBER
TEMPERATURE
RANGE
FLOW
BURN
IN
I
-40°C TO +85°C
-55°C TO +125°C
-55°C TO +125°C
I
No
No
T
M
T
M
Yes
PART
NUMBER
PACKAGE
DESCRIPTION
PD
PS
CR
8 PIN PLASTIC DIP (8P)
8 PIN PLASTIC NARROW BODY ESOIC (8HNE)
8 PIN CERDIP (8D) not available Pb-free
PART
NUMBER
OUTPUT SERIES RESISTANCE
BUILT-IN
REQUIRED EXTERNALLY
8570
8571
0
37.5 Ohms
27.5 Ohms
10 Ohms
Legend: ESOIC
- Thermally Enhanced Small Outline Package (SOIC) with built-in heat sink
HOLT INTEGRATED CIRCUITS
6
HI-8570, HI-8571
REVISION HISTORY
P/N
Rev
Date
Description of Change
DS8570
E
08/19/13 Remove references to Military temp range. Update Reflow Solder Temperature and change
DC current per input pin to +/-10mA in Absolute Maximum Ratings. Remove Heat Sink note
on p. 5. Update ESOIC-8 package drawing (8HNE).
HOLT INTEGRATED CIRCUITS
7
HI-8570 / HI-8571 PACKAGE DIMENSIONS
8-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB
(Narrow Body, Thermally Enhanced)
inches (millimeters)
Package Type: 8HNE
Top View
Bottom View
.007 .003
(.175 .075)
.193
BSC
(4.90)
.154 .04
(3.90 1.10)
.154
(3.90)
.236
(6.00)
.119 .04
(3.02 .97)
BSC
BSC
PIN 1
Electrically isolated heat
sink pad on bottom of
package
SEE DETAIL A
.016 .004
(.410 .100)
.056 .006
(1.413 .163)
Connect to any ground or
power plane for optimum
thermal dissipation
0° to 8°
.100 .10
(.04 .04)
.050
(1.27)
BSC
.033 .017
(.835 .435)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
DETAIL A
8-PIN PLASTIC DIP
inches (millimeters)
Package Type: 8P
.385 ±.015
(9.799 ±.381)
.250 .010
(6.350 ±.254)
.100
(2.54)
BSC
.300 ±.010
(7.620 ±.254)
.025 ±.010
(.635 .254)
.135 ±.015
(3.429 ±.381)
.0115 ±.0035
(.292 ±.089)
.1375 ±.0125
(3.493 ±.318)
.055 ±.010
(1.397 ±.254)
.335 ±.035
(8.509 ±.889)
.019 ±.002
(.483 ±.102)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
HOLT INTEGRATED CIRCUITS
8
HI-8570 / HI-8571 PACKAGE DIMENSIONS
inches (millimeters)
8-PIN CERDIP
Package Type: 8D
.380 ±.004
(9.652 ±.102)
.005 min
(.127 min)
.248 ±.003
(6.299 ±.076)
.039 ±.006
(.991 ±.154)
.100
BSC
(2.54)
.314 ±.003
(7.976 ±.076)
.015 min
(.381min)
.200 max
(5.080 max)
Base Plane
.010 ±.006
(.254 ±.152)
Seating Plane
.163 ±.037
(4.140 ±.940)
.018 ±.006
.350 ±.030
(8.890 ±.762)
(.457 ±.152)
.056 ±.006
(1.422 ±.152)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
HOLT INTEGRATED CIRCUITS
9
相关型号：
©2020 ICPDF网 联系我们和版权申明