HI-8588PSM-10 [HOLTIC]
ARINC 429 LINE RECEIVER; ARINC 429线路接收器
| 型号： | HI-8588PSM-10 |
| 厂家： | 
HOLT INTEGRATED CIRCUITS |
| 描述： | ARINC 429 LINE RECEIVER |
| 文件： | 总6页 (文件大小：66K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HI-8588-10
ARINC 429 LINE RECEIVER
July 2006
DESCRIPTION
PIN CONFIGURATION
The HI-8588-10 ARINC 429 bus interface receiver is simi-
lar to the HI-8588 with the exception that it allows an exter-
nal 10 Kohm resistor in series with each ARINC input with-
out affecting the ARINC input thresholds. The product is
especially useful in applications where lightning protection
circuitry is also required. In addition, the test inputs force
both of the outputs to zero instead of open circuit. The ana-
log/digital CMOS product requires only a 5 volt supply and
is available in a 8-pin SOIC package.
VCC - 1
TESTA - 2
RINB - 3
RINA - 4
8 - TESTB
7 - ROUTB
6 - ROUTA
5 - GND
HI-8588PSI-10, HI-8588PST-10 & HI-8588PSM-10
8 - PIN PLASTIC NARROW BODY SOIC
Each side of the ARINC bus must be connected through a
10 Kohm series resistor in order for the chip to detect the
correct ARINC levels. The typical 10 volt differential signal
is translated and input to a window comparator and latch.
The comparator levels are set so that with the external
10 Kohm resistors they are just below the standard 6.5 volt
minimum ARINC data threshold and just above the stan-
dard 2.5 volt maximumARINC null threshold.
SUPPLY VOLTAGES
vcc = 5.0V 5%
FUNCTION TABLE
The TESTAand TESTB inputs bypass the analog inputs for
testing purposes. Also if TESTAand TESTB are both taken
high, the digital outputs are forced to zero.
RECEIVER
RINA
RINB
TESTA TESTB ROUTA ROUTB
See Holt Application Note AN-300 for more information on
lightning protection.
-1.25V to 1.25V
-1.25V to 1.25V
0
0
0
0
1
1
0
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
-3.25V to -6.5V
3.25V to 6.5V
FEATURES
3.25V to 6.5V
-3.25V to -6.5V
X
X
X
X
X
X
!
ARINC 429 line receiver interface in a
small outline package
!
Lightning protection simplified with the
ability to add 10 Kohm external series
resistors
PIN DESCRIPTION TABLE
!
!
Receiver input hystersis at least 2 volts
PIN
1
SYMBOL
VCC
FUNCTION
SUPPLY
DESCRIPTION
5 VOLT SUPPLY
CMOS
Test inputs bypass analog inputs and
force digital outputs to an one, zero or
null state
2
TESTA
RINB
LOGIC INPUT
ARINC INPUT
ARINC INPUT
POWER
3
RECEIVER B INPUT
RECEIVER A INPUT
GROUND
4
RINA
5
GND
6
ROUTA
ROUTB
TESTB
LOGIC OUTPUT
LOGIC OUTPUT
LOGIC INPUT
RECEIVER CMOS OUTPUT A
RECEIVER CMOS OUTPUT B
CMOS
!
!
Plastic and ceramic package options -
surface mount and DIP
7
8
Mil processing available
HOLT INTEGRATED CIRCUITS
www.holtic.com
(DS8588-10, Rev. C)
07/06
HI-8588-10
FUNCTIONAL DESCRIPTION
RECEIVER
between VCC and Ground. The nominal settings corre-
spond to a One/Zero amplitude of 6.0V and a Null ampli-
tude of 3.3V.
Figure 1 shows the general architecture of the ARINC 429
receiver. The receiver operates off the VCC supply only.
The inputs RINA and RINB each require 35KW of resis-
tance of which 25KW is internal to the chip. The series re-
sistance is connected to level translators whose resistance
to Ground is typically 10KW. In order for the voltage trans-
lation not to be adversely affected, an external 10KW series
resister must be added to each ARINC input. The
HI-8588-10 device is typically chosen for applications
where external series resistors are required in its lightning
protection circuitry.
The status of theARINC receiver input is latched. A Null
input resets the latches and a One or Zero input sets the
latches.
The logic at the output is controlled by the test signal
which is generated by the logical OR of the TESTA and
TESTB pins. Unlike the HI-8588, if TESTA and TESTB
are both One, the HI-8588-10 outputs are pulled low in-
stead of being tri-stated. This allows the digital outputs
of a transmitter to be connected to the test inputs through
control logic for self-test purposes.
After level translation, the inputs are buffered and become
inputs to a differential amplifier. The amplitude of the differ-
ential signal is compared to levels derived from a divider
TEST
ONE
S
Q
ROUTA
LATCH
R
TESTA
TESTB
RINA
ESD
NULL
PROTECTION
AND
TEST
TRANSLATION
RINB
ZERO
S
Q
ROUTB
LATCH
R
TESTA
TESTB
NULL
FIGURE 1 - RECEIVER BLOCK DIAGRAM
5V
1
VCC
2
6
7
HARDWIRE
OR
DRIVE FROM LOGIC
TESTA
TESTB
ROUTA
ROUTB
RXD1
RXD0
8
{
10KW
10KW
HI-8588-10
4
3
RINA
ARINC
Channel
HI-6010
APPLICATION INFORMATION
RINB
GND
Figure 2 shows a possible application of the
HI-8588-10 interfacing an ARINC receive
channel to the HI-6010 which in turn inter-
faces to an 8-bit bus.
5
8 BIT BUS
15V
1
SLP1.5
8
V+
6
7
3
TXAOUT
TXD1
TXD0
TX1IN
ARINC
Channel
HI-8586
2
TX0IN
TXBOUT
GND
V-
5
4
-15V
FIGURE 2 - APPLICATION DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HI-8588-10
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
Voltages referenced to Ground
Supply Voltages
VCC........................................5V
Supply voltages
VCC...................................................7V
5%
Temperature Range
ARINC input - pins 3 & 4
Voltage at either pin......+29V to -29V
Industrial Screening........-40°C to +85°C
Hi-Temp Screening.......-55°C to +125°C
Military Screening.........-55°C to +125°C
DC current per input pin................ 10mA
Power dissipation at 25°C
plastic DIP............0.7W
ceramic DIP..........0.5W
NOTE: Stresses above absolute maximum
ratings or outside recommended operating con-
ditions may cause permanent damage to the
device. These are stress ratings only. Opera-
tion at the limits is not recommended.
Solder Temperature ........275°C for 10 sec
Storage Temperature........-65°C to +150°C
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V UNLESS OTHERWISE STATED
OPERATING TEMPERATURE RANGE,
SYMBOL TEST CONDITIONS
MIN
TYP
MAX UNITS
PARAMETERS
ARINC input voltage
one or zero
V
V
V
diff. volt. thru 10KW, pins 3 & 4
6.5
10
-
13
2.5
5.0
volts
volts
volts
DIN
NIN
null
-
-
"
"
with respect to Ground
"
common mode
-
COM
logic input voltage
-
-
-
3.5
-
volts
volts
high
low
V
V
IH
IL
1.5
ARINC input resistance
RINA to RINB
supplies floating & series 10KW
30
19
R
R
75
40
Kohm
Kohm
-
-
DIFF
SUP
RINA or RINB to Gnd or VCC
"
"
"
logic input current
source
-
-
mA
mA
I
V
V
= 0 V
-
-
0.1
0.1
IH
IN
IN
sink
I
= 5 V
IL
logic output drive current
-
one
V
= 4.6V
= 0.4V
-1.6
5.6
-0.8
-
I
I
mA
mA
OH
OL
OH
zero
V
3.6
OL
Current drain
operating
-
I
pins 2, 8 = 0V; pins 3, 4 open
2.3
6.3
mA
CC1
HOLT INTEGRATED CIRCUITS
3
HI-8588-10
AC ELECTRICAL CHARACTERISTICS
VCC = 5.0V UNLESS OTHERWISE STATED
OPERATING TEMPERATURE RANGE,
PARAMETERS
SYMBOL TEST CONDITIONS
MIN
TYP
MAX UNITS
Receiver propagation delay
Output high to low
defined in Figure 3, C = 50pF
L
t
-
-
600
600
-
-
ns
ns
phlr
Output low to high
t
plhr
Receiver output transition times
Output high to low
t
fr
-
-
50
50
80
80
ns
ns
t
Output low to high
rr
Input capacitance (1)
ARINC differential
ARINC single ended to Ground
Logic
C
-
-
-
5
-
10
10
10
pF
pF
pF
AD
C
AS
C
-
IN
Notes: 1. Guaranteed but not tested
10V
V
DIFF
pin 4 - pin 3
0V
-10V
t
t
plhr
t
t
rr
rr
t
t
phlr
5V
0V
90%
10%
pin 6
pin 7
t
t
t
t
fr
plhr
t
t
phlr
5V
0V
FIGURE 3 - RECEIVER TIMING
ORDERING INFORMATION
HI - 8588 xx x x - 10
PART
NUMBER
LEAD
FINISH
Tin / Lead (Sn / Pb) Solder
100% Matte Tin (Pb-free, RoHS compliant)
Blank
F
PART
NUMBER
TEMPERATURE
RANGE
FLOW
BURN
IN
I
-40°C TO +85°C
-55°C TO +125°C
-55°C TO +125°C
I
NO
NO
T
M
T
M
YES
PART
NUMBER
PACKAGE
DESCRIPTION
PD
PS
CR
8 PIN PLASTIC DIP (not available with “M” flow)
8 PIN PLASTIC NARROW BODY SOIC
8 PIN CERDIP (not available Pb-free)
HOLT INTEGRATED CIRCUITS
4
HI-8588-10 PACKAGE DIMENSIONS
inches (millimeters)
8-PIN PLASTIC DIP
Package Type: 8P
.385 ±.015
(4.699 ±.381)
.250 .010
(6.350 ±.254)
.100 ±.010
(3.540 ±.254)
.300 ±.010
(7.620 ±.254)
7° TYP.
.025 ±.010
(.635 .254)
.135 ±.015
(3.429 ±.381)
.0115 ±.0035
(.292 ±.089)
.1375 ±.0125
(3.493 ±.318)
.055 ±.010
(1.397 ±.254)
.335 ±.035
(8.509 ±.889)
.019 ±.002
(.483 ±.102)
8-PIN PLASTIC SMALL OUTLINE (SOIC) - NB
(Narrow Body)
Package Type:
8HN
.1935 .0035
(4.915 .085)
.0086 .0012
(.2184 .0305)
.236 .008
(5.994 .203)
.1535 .0035
(3.90 .09)
PIN 1
.0165 .0035
(.4191 .0889)
Detail A
.055 .005
(1.397 .127)
0° to 8°
.0069 .0029
(.1753 .0737)
.050 .010
(1.27 .254)
.033 .017
(.8382 .4318)
Detail A
HOLT INTEGRATED CIRCUITS
5
HI-8588-10 PACKAGE DIMENSIONS
inches (millimeters)
8-PIN CERDIP
8D
Package Type:
.380 ±.004
(9.652 ±.102)
.005 MIN.
(.127 MIN.)
.248 ±.003
(6.299 ±.076)
.039 ±.006
(.991 ±.154)
.100 ±.008
(2.540 ±.203)
.015 MIN.
.314 ±.003
(7.976 ±.076)
(.381 MIN.)
.200 MAX.
(5.080 MAX.)
Base Plane
.010 ±.006
(.254 ±.152`)
Seating Plane
.163 ±.037
(4.140 ±.940)
.018 ±.006
(.457 ±.152)
.350 ±.030
(8.890 ±.762)
.056 ±.006
(1.422 ±.152)
HOLT INTEGRATED CIRCUITS
6
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