HI-8592CRI [HOLTIC]
Single-Rail ARINC 429 Differential Line Driver; 单轨ARINC 429差动线路驱动器
| 型号： | HI-8592CRI |
| 厂家： | 
HOLT INTEGRATED CIRCUITS |
| 描述： | Single-Rail ARINC 429 Differential Line Driver |
| 文件： | 总13页 (文件大小：976K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HI-8592, HI-8593, HI-8594
Single-Rail ARINC 429 Differential Line Driver
October, 2010
GENERAL DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
The HI-8592 bus interface product is a silicon gate
CMOS device designed as a line driver in accordance
with the ARINC 429 bus specifications. The part in-
cludes a negative voltage converter allowing it to oper-
ate from a single +5V supply using only two external ca-
pacitors. The part also features high-impedance outputs
(tri-state) when both data inputs are taken high, allowing
multiple line drivers to be connected to a common bus.
V+
SLP
1
2
3
4
5
6
7
14 AMPB
13 TXBOUT
12 AMPA
11 TXAOUT
10 V-
TX0IN
TX1IN
GND
CAP+
CAP-
9
8
GND
V+
The HI-8593 and HI-8594 are reduced pin count ver-
sions of HI-8592 which do not incorporate the negative
voltage converter. These devices are compatible with
Holt’s existing HI-8570 and HI-8571 respectively, with
the added advantage of the tri-state outputs. For even
smaller board footprint, versions are also available in
leadless, surface mount QFN-style packages.
HI-8592PS
14-PIN PLASTIC SMALL OUTLINE (ESOIC) NB
SLP
TX0IN
TX1IN
GND
1
2
3
4
8
V+
7
6
5
TXBOUT
TXAOUT
V-
Logic inputs feature built-in 2,000V minimum ESD input
protection as well as 5V or 3.3V logic level compatibility.
HI-8593PS
8-PIN PLASTIC SMALL OUTLINE (ESOIC) NB
Products with 5 Ohm or 37.5 Ohm resistors in series
with each ARINC output are available to allow the use of
external resistors for lightning protection.
SLP
TX0IN
TX1IN
GND
1
2
3
4
8
V+
The HI-859x series of line drivers are intended for use
where logic signals must be converted to ARINC 429
levels such as when using an FPGA or the HI-3584
ARINC 429 Serial Transmitter/Dual Receiver.
7
6
5
AMPB
AMPA
V-
The family of parts are available in Industrial -40oC to
+85oC, or Extended, -55oC to +125oC temperature rang-
es. Optional burn-in is available on the extended tem-
perature range.
HI-8594PS
8-PIN PLASTIC SMALL OUTLINE (ESOIC) NB
(See page 9 for additional package pin configurations)
FEATURES
Table 1. Function Table
• Single +5V supply
TX1IN TX0IN SLP TXAOUT TXBOUT SLOPE
• Negative voltage generated on-chip (HI-8592)
• Digitally selectable rise and fall times
• Tri-state Outputs
0
0
0
1
1
1
0
1
1
0
0
1
X
0
1
0
1
X
0V
-5V
-5V
5V
0V
5V
N/A
10μs
1.5μs
10μs
1.5μs
N/A
5V
-5V
-5V
Hi-Z
• Plastic 8 & 14-pin thermally enhanced SOIC
packages available
5V
Hi-Z
• 5 Ohm or 37.5 Ohm output resistance
• Industrial and Extended temperature ranges
• Burn-in available
HOLT INTEGRATED CIRCUITS
www.holtic.com
1
DS8592 Rev. B
10/10
HI-8592, HI-8593, HI-8594
BLOCK DIAGRAM
V+
5V
CSUPPLY
AMPA
SLP
5V
TXAOUT
ONE
“A” SIDE
TX0IN
CURRENT
CONTROL
ESD
PROTECTION
& VOLTAGE
5Ω 32.5Ω
NULL
TRANSLATION
ZERO
TX1IN
-5V
CONTROL
LOGIC
AMPB
5V
ONE
“B” SIDE
CURRENT
TXBOUT
CONTROL
NULL
5Ω 32.5Ω
ZERO
GND
-5V
CONTROL
LOGIC
V+
-5V
CAP+
CFLY
V-
Switched Capacitor
DC-DC Inverter
CAP-
COUT
Clock Generation
Figure 1. HI-8592 Block Diagram
HOLT INTEGRATED CIRCUITS
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HI-8592, HI-8593, HI-8594
PIN DESCRIPTIONS
Table 2. Pin Descriptions
Pin
Function Description
POWER +5V power supply
V+
Output slew rate control. High selects ARINC 429 high-speed. Low selects
ARINC 429 low-speed.
SLP
INPUT
TX0IN
TX1IN
GND
INPUT
INPUT
Data input zero
Data input one
POWER Ground supply
CAP+
CAP-
ANALOG Positive connection for external capacitor, CFLY
ANALOG Negative connection for external capacitor, CFLY
-5V supply, may be connected to supply or used with on-chip negative sup-
ply converter
V-
POWER
TXAOUT
AMPA
OUTPUT ARINC high output with 37.5 Ohms series resistance
OUTPUT ARINC high output with 5 Ohms series resistance
OUTPUT ARINC low output with 37.5 Ohms series resistance
OUTPUT ARINC low output with 5 Ohms series resistance
TXBOUT
AMPB
V+ = 5V
CSUPPLY = 68µF
HI-3584A
SLP
TX0IN
TXAOUT
TX1IN
TXBOUT
AMPA
AMPB
ARINC 429
Bus
HI-8592
CAP+
CAP-
CFLY = 4.7µF
-5V
GND
COUT = 47µF
Figure 2. Application Example
HOLT INTEGRATED CIRCUITS
3
HI-8592, HI-8593, HI-8594
slopes and differentially drives the ARINC line. Cur-
rent is limited by the series output resistors at each pin.
There are no fuses at the outputs of the HI-859x family.
FUNCTIONAL DESCRIPTION
Figure 1 is a block diagram of the line driver. The chip
requires a positive 5V supply at V+. The negative 5V
supply at V- may be from an external source or may be
provided using the on-chip negative rail generator by
The HI-8593 has 37.5 ohms in series with each TXOUT
output and the HI-8594 has 5 ohms in series with each
AMP output. The AMP outputs are for applications
where external series resistance is required, typically
for lightning protection devices. Both output types are
available on the HI-8592. Holt Application Note AN-300
describes suitable lightning protection schemes.
connecting the two external capacitors, CFLY and COUT
.
Currents for slope control are set by on-chip resistors.
The TX0IN and TX1IN inputs receive logic signals from
a
control transmitter chip such as the HI-3584. TX-
All devices feature tri-stateable outputs to allow multiple
line drivers to be connected to the same ARINC 429
bus. Setting TX1IN and TX0IN both to a logic “1” puts
the outputs in the high-impedance state.
AOUT and TXBOUT hold each side of the ARINC bus
at Ground until one of the inputs becomes a One. If for
example TX1IN goes high, a charging path is enabled to
5V on an “A” side internal capacitor while the “B” side is
enabled to -5V. The charging current is selected by the
SLP pin. If the SLP pin is high, the capacitor is nominally
charged from 10% to 90% in 1.5μs. If SLP is low, the
rise and fall times are 10μs.
The HI-8592 family of line drivers are built using high-
speed CMOS technology. Care should be taken to en-
sure the V+ and V- supplies are locally decoupled to re-
duce noise. An application example is shown in Figure
2.
The reduced pin-count HI-8593 and HI-8594 require an
external -5V supply.
A unity gain buffer receives the internally generated
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING
CONDITIONS
Supply Voltages
Supply Voltages
V+ ........................................................... +7V
V+ ................................... +4.85V to +5.25V
V- ........................................................... -7V
DC Current per input pin ................................... +10mA
Power Dissipation at 25oC
V- ................................... -5.25V to -4.85V
Temperature Range
plastic SOIC ........... 1.0W, derate 10mW/oC
Industrial Screening .............. -40oC to +85oC
Hi-Temp Screening .............. -55oC to +125oC
ceramic DIP ......... 0.5W, derate 7mW/oC
Solder Temperature ......................... 275oC for 10sec
Storage Temperature ....................... -65oC to +150oC
NOTE: Stresses above absolute maximum ratings or outside
recommended operating conditions may cause permanent
damage to the device. These are stress ratings only. Opera-
tion at the limits is not recommended.
Note: The HI-8592 family of drivers are available in small-foot-
print, thermally enhanced SOIC and QFN (chip-scale) pack-
ages. These packages include a metal heat sink located on
the bottom surface of the device. This heat sink should be
soldered down to the printed circuit board for optimum thermal
dissipation.
The heat sink is electrically isolated from the chip and can be
soldered to any ground or power plane.
HOLT INTEGRATED CIRCUITS
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HI-8592, HI-8593, HI-8594
ELECTRICAL CHARACTERISTICS
Table 3. DC Electrical Characteristics
V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated)
Parameters
Symbol
Test Conditions
Min
Typ
Max Units
Input Voltage (TX1IN, TX0IN, SLP)
High
Low
VIH
VIL
2.1
-
-
-
V+
V
V
0.5
Input Current (TX1IN, TX0IN, SLP)
Source
Sink
IIH
IIL
VIN = 0V
VIN = 5V
-
-
-
-
0.1
0.1
μA
μA
ARINC Output Voltage (Differential)
one
zero
null
VDIFF1
VDIFF0
VDIFFN
no load; TXAOUT - TXBOUT
no load; TXAOUT - TXBOUT
no load; TXAOUT - TXBOUT
9
10
-10
0
11
-9
V
V
V
-11
-0.5
0.5
ARINC Output Voltage (Ref. to GND)
one or zero
null
VDOUT
VNOUT
no load & magnitude at pin
no load
4.5
5.0
0
5.5
V
V
-0.25
0.25
Operating Supply Current
SLP = V+
V+
GND
V-
IDD
IGND
IEE
TX1IN & TX0IN = 0V: no load
TX1IN & TX0IN = 0V: no load
TX1IN & TX0IN = 0V: no load
-
-
22
10
28
16
-
mA
mA
mA
-16
-10
ARINC Output Impedance
TXOUT pins
ZOUT
37.5
5
Ohms
Ohms
AMP pins
V- < VOUT < V+, TA = 125oC
TX0IN = TX1IN = V+
ARINC Output Tri-State Current
IOZ
-1.0
0
+1.0
μA
HOLT INTEGRATED CIRCUITS
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HI-8592, HI-8593, HI-8594
Table 4. Converter Characteristics
V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated)
Parameters
Start-up transient (V+, V-)
Operating Switching Frequency
Symbol
tSTART
fsw
Test Conditions
Min
-
Typ
-
Max Units
10
ms
425
550
670
kHz
CFLY
COUT
COUT / CFLY >= 10
2.2
22
47
4.7
47
68
-
-
-
μF
μF
μF
Recommended Capacitors
CSUPPLY
CSUPPLY >= COUT (connect from
V+ to GND)
Table 5. AC Electrical Characteristics
V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated)
Parameters
Symbol
Test Conditions
Min
Typ
Max Units
Line Driver Propogation Delay
Output high to low
defined in Figure 2, no load
tphlx
tplhx
-
-
500
500
-
-
ns
ns
Output low to high
Line Driver Transition Times
High Speed
SLP = V+
pin 1 = logic 1
pin 1 = logic 1
SLP = V+
Output high to low
Output low to high
Low Speed
tfx
trx
1.0
1.0
1.5
1.5
2.0
2.0
μs
μs
Output high to low
Output low to high
tfx
trx
pin 1 = logic 0
pin 1 = logic 0
5.0
5.0
10.0 15.0
10.0 15.0
μs
μs
Input Capacitance (Logic)1
CIN
-
-
-
-
10
pF
pF
Output Capacitance (Tri-state)1
COUT
TX0IN = TX1IN = V+
1.5
Notes:
1. Guaranteed but not tested
HOLT INTEGRATED CIRCUITS
6
HI-8592, HI-8593, HI-8594
5V
0V
TX1IN
tphlx
tplhx
tplhx
5V
0V
TX0IN
tphlx
trx
trx
10V
0V
90%
VDIFF
(TXAOUT - TXBOUT)
10%
10%
90%
10%
-10V
tfx
tfx
Figure 3. Line Driver Timing
PACKAGE THERMAL CHARACTERISTICS
Maximum ARINC LOAD
Supply Current (mA)2
Junction Temp, Tj (oC)
ARINC 429
Data Rate
Package Style1
TA = 25oC TA = 85oC TA = 125oC TA = 25oC TA = 85oC TA = 125oC
Low Speed3
High Speed4
30
36
31
36
32
37
33
35
93
95
134
135
14-Lead Plastic
ESOIC5
TXAOUT and TXBOUT Shorted to Ground6,7,8
Supply Current (mA)2
Junction Temp, Tj (oC)
ARINC 429
Package Style1
TA = 25oC TA = 85oC TA = 125oC TA = 25oC TA = 85oC TA = 125oC
Data Rate
Low Speed3
High Speed4
89
87
82
81
77
77
53
52
111
111
149
149
14-Lead Plastic
ESOIC5
Notes:
1. All data taken in still air.
2. At 100% duty cycle, 5V power supplies.
3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF.
4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF as this is considered unrealistic for
high speed operation.
5. 14 Lead Plastic ESOIC (Thermally enhanced SOIC with built in heat sink). Heat sink not soldered.
6. Similar results would be obtained with TXAOUT shorted to TXBOUT.
7. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
8. Data will vary depending on air flow and the method of heat sinking employed.
HOLT INTEGRATED CIRCUITS
7
HI-8592, HI-8593, HI-8594
ORDERING INFORMATION
HI - 8592xx x x
PART NUMBER LEAD FINISH
Blank
F
Tin / Lead (Sn / Pb) Solder
100% Matte Tin (Pb-free, RoHS compliant)
PART NUMBER TEMPERATURE RANGE
FLOW BURN IN
I
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
I
No
No
T
M
T
M
Yes
PART NUMBER PACKAGE DESCRIPTION
PS
PC
CR
14 PIN PLASTIC SMALL OUTLINE - NB ESOIC (14HNE)
24 PIN PLASTIC QFN (24PCS)
14 PIN CERDIP (14D). NOTE: Not Available Pb-Free
HI - 859x xx x x
PART NUMBER LEAD FINISH
Blank
F
Tin / Lead (Sn / Pb) Solder
100% Matte Tin (Pb-free, RoHS compliant)
PART NUMBER TEMPERATURE RANGE
FLOW BURN IN
I
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
I
No
No
T
M
T
M
Yes
PART NUMBER PACKAGE DESCRIPTION
PS
CR
8 PIN PLASTIC SMALL OUTLINE - NB ESOIC (8HNE)
8 PIN CERDIP (8D). NOTE: Not Available Pb-Free
PART NUMBER OUTPUT RESISTANCE
8593
8594
37.5 Ohms
5 Ohms
Legend: ESOIC
NB
-
-
Thermally enhanced Small Outline Package (SOIC with built-in heat sink)
Narrow Body
HOLT INTEGRATED CIRCUITS
8
HI-8592, HI-8593, HI-8594
ADDITIONAL PIN CONFIGURATIONS
NOTE: All power and ground pins must be connected.
V+
SLP
1
2
3
4
5
6
7
14 AMPB
13 TXBOUT
12 AMPA
11 TXAOUT
10 V-
SLP
TX0IN
TX1IN
GND
1
2
3
4
8
V+
7
6
5
TXBOUT
TXAOUT
V-
TX0IN
TX1IN
GND
HI-8593CR
8-PIN CERDIP
CAP+
CAP-
9
8
GND
V+
HI-8592CR
14-PIN CERDIP
- 1
18 TXBOUT
SLP
1
2
3
4
8
V+
TX0IN 2
TX1IN 3
GND 4
GND 5
CAP+ 6
17 AMPA
16 TXAOUT
15 V-
TX0IN
TX1IN
GND
7
6
5
AMPB
AMPA
V-
14 V-
HI-8594CR
8-PIN CERDIP
13 GND
HI-8592PC
24-LEAD 5mm x 5mm QFN
HOLT INTEGRATED CIRCUITS
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HI-8592, HI-8593, HI-8594
REVISION HISTORY
Revision
Date
Description of Change
DS8592, Rev. NEW 6/21/10
Initial Release
Rev. A
Rev. B
7/1/10
Corrected typo in features (no “fixed” rise and fall time)
10/28/10 Rev. A had incorrect package drawing (SOIC-8). Replaced with correct ESOIC-8.
HOLT INTEGRATED CIRCUITS
10
HI-8592, HI-8593, HI-8594
PACKAGE DIMENSIONS
inches (millimeters)
14-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB
(Narrow Body, Thermally Enhanced)
Package TYPE: 14HNE
.0085 ± .001
(.220 ± .029)
.270
(6.86)
.341 ± .004
(8.65 ± .10)
typ
.236 ± .008
(6.00 ± .20)
.100
(2.54)
Bottom
View
.153 ± .003
(3.87 ± .06)
typ
Top View
See Detail A
.0165 ± .003
(.419 ± .089)
Electrically isolated heat sink
pad on bottom of package.
Connect to any ground or
power plane for optimum
thermal dissipation.
.055 ± .005
(1.397 ± .13)
.050
(1.27)
0o to 8o
BSC
.0025 ± .0015
(.0635 ± .04)
.033 ± .017
(.838 ± .43)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
Detail A
8-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB
inches (millimeters)
(Narrow Body, Thermally Enhanced)
Package Type: 8HNE
Top View
.194 ± .004
(4.92 ± .09)
Bottom
View
.0085 ± .0015
(.216 ± .038)
.140 ± .01
(3.56 ± .26)
.236 ± .008
(5.99 ± .21)
.154 ± .004
(3.90 ± .09)
.100 ± .01
(2.54 ± .25)
PIN 1
See Detail A
Electrically isolated heat sink
pad on bottom of package.
Connect to any ground or
power plane for optimum
thermal dissipation.
.0165 ± .003
(.419 ± .089)
.055 ± .005
(1.397 ± .127)
0o to 8o
.0025 ± .002
(.064 ± .038)
.033 ± .017
(.838 ± .432)
.050
(1.27)
BSC
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
Detail A
HOLT INTEGRATED CIRCUITS
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HI-8592, HI-8593, HI-8594
14-PIN CERDIP
inches (millimeters)
Package Type: 14D
.050 max
.767 max
(1.27 max)
(19.48 max)
.005 min
(.127 min)
.288 + .003
(7.32 + .08)
.100
BSC
.056 typ
(1.422 typ)
.310 + .010
(7.874 + .254)
(2.54)
.180 max
(4.572 max)
.200 max
.015 min
(5.080 max)
(.381 min)
0o to 15o
.010 + .002
(.254 + .051)
.018 + .003
(.457 + .760)
.125 min
(3.175 min)
8-PIN CERDIP
Package Type: 8D
.380 ± .004
(9.652 ± .102)
.005 MIN.
(.127 MIN.)
.248 ± .003
(6.299 ± .076)
.039 ± .006
(.991 ± .154)
.100 ± .008
(2.540 ± .203)
.015 MIN.
.314 ± .003
(7.976 ± .076)
(.381 MIN.)
.200 MAX.
(5.080 MAX.)
Base Plane
.010 ± .006
(.254 ± .152)
Seating Plane
.163 ± .037
(4.140 ± .940)
.018 ± .006
(.457 ± .152)
.350 ± .030
(8.890 ± .762)
.056 ± .006
(1.422 ± .152)
HOLT INTEGRATED CIRCUITS
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HI-8592, HI-8593, HI-8594
24-PIN PLASTIC CHIP-SCALE PACKAGE (QFN)
millimeters
Package Type: 24PCS
Heat sink pad on bottom of
package. Heat sink can float
or can be connected to V+.
DO NOT connect heat sink to
GND
5.00 + .05
Top View
3.65 + .15
0.65 BSC
5.00 + .05
Bottom
View
3.65 + .15
0.35 typ.
0.45 typ.
0.93 max
0.025 max
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
HOLT INTEGRATED CIRCUITS
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