HI-8784PSTF [HOLTIC]
ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out; ARINC接口设备的8位并行数据转换为429和561的串行数据输出
| 型号： | HI-8784PSTF |
| 厂家： | 
HOLT INTEGRATED CIRCUITS |
| 描述： | ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out |
| 文件： | 总9页 (文件大小：187K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HI-8783, HI-8784, HI-8785
ARINC INTERFACE DEVICE
8 bit parallel data converted to 429 & 561 serial data out
September 2006
PIN CONFIGURATIONS
DESCRIPTION
The HI-8783, HI-8784, and HI-8785 are system compo-
nents for interfacing 8 bit parallel data to an ARINC 429
bus. The HI-8783 is a logic device only and requires a sep-
arate line driver circuit, such as the HI-3182 or HI-8585.
The HI-8784 and HI-8785 combine logic and line driver on
one chip. The HI-8784 has an output resistance of 37.5
ohms, and the HI-8785 has an output resistance of 10
ohms to facilitate external lightning protection cicuitry. The
technology is analog/digital CMOS.
20
19
18
17
16
15
14
13
12
11
1
2
VCC
561 DATA
DATA ZERO
DATA ONE
PARITY ENB
XMT READY
XMIT CLK
RESET
561 SYNC
3
D0
D1
D2
D3
D4
D5
D6
D7
HI-8783PSI
&
HI-8783PST
4
5
6
The HI-8783 is available in a 22 pin DIP format as a second
source replacement for the Micrel / California Devices
DLS-111BV.
7
8
WRITE
The products offer high speed data bus data transactions
to a buffer register. After loading 4 bytes, data is automati-
cally transferred and transmitted. The data rate is equal to
the clock rate. Parity can be enabled in the 32nd bit. Reset
is used to initialize the logic upon startup. Word gaps are
transmitted automatically.
9
A0
GND
10
20-Pin Plastic SOIC - WB package
The HI-8784 and HI-8785 require +/- 10 volt supplies in ad-
dition to the 5 volt supply.
24
FEATURES
1
2
V+
VCC
23 561 DATA
22 TXBOUT
21 TXAOUT
561 SYNC
D0
l
Automatically converts 8 bit parallel data
toARINC 429 or 561 serial data
3
HI-8784PSI
HI-8784PST
HI-8785PSI
&
4
D1
l
High speed data bus interface
V-
20
19
18
17
16
15
5
D2
PARITY ENB
XMT READY
XMIT CLK
RESET
WRITE
SLP1.5
A0
6
D3
l
On-chip line driver option
HI-8785PST
7
D4
l
SOIC packages available
8
D5
9
D6
l
Military processing options
10
NC
14
13
11
12
D7
GND
24-Pin Plastic SOIC - WB package
(See page 7 for additional pin configurations)
HOLT INTEGRATED CIRCUITS
www.holtic.com
(DS8783 Rev.I)
09/06
HI-8783, HI-8784, HI-8785
PIN DESCRIPTIONS
PIN
HI-8783 HI-8783 HI-8784
(20-pin) (22-pin) HI-8785
PIN
PIN
SYMBOL FUNCTION
DESCRIPTION
1
2
22
1
1
2
VCC
power supply +5 volt rail,
561 SYNC digital output ARINC 561 Sync signal
3-10
11
12
-
2-8,10
11
12
-
3-9,11
12
13
14
15
16
17
18
19
20
-
Dn
digital inputs Parallel 8 bit Data Input
power supply Ground
GND
A0
digital input
digital input
digital input
digital input
Byte address, A0=1 for 1st byte, A0=0 for 2nd, 3rd & 4th bytes
SLP1.5
WRITE
RESET
Selects the slope of the line driver. High = 1.5us
Write strobe, loads data on rising edge
Registers and sequencing logic initialized when low
Clock input for the transmitter
13
14
15
16
17
-
14
15
16
17
18
-
XMIT CLK digital input
XMT RDY digital output Goes high if the buffer register is empty
PARITY ENB digital input When high the 32nd bit output is odd parity
V- power supply -10 volt rail
18
19
-
19
20
-
DATA ONE digital output Goes high for each ARINC bit output that is a “one”
DATA ZERO digital output Goes high for each ARINC bit output that is a “zero”
-
21
22
23
24
TXAOUT
TXBOUT
analog output Line driver ouptut - A side
analog output Line driver output - B side
-
-
20
-
21
-
561 DATA digital output Serial output for ARINC 561 data
V+ power supply +10 volt rail
FUNCTIONAL DESCRIPTION
The HI-8783 is a parallel to serial converter, which when Input data can be loaded when the XMT RDY signal is high,
loaded with four eight bit parallel bytes, outputs the data as a which indicates the input buffer register is empty. The first 8
32 bit serial word. Timing circuitry inserts a 4 bit gap at the bit byte is the label byte and is loaded with the A0 input high,
end of each 32 bit word. An input buffer register allows load which initializes the internal byte counter. The remaining
operations to take place while the previously loaded word is three bytes are loaded with A0 in the low state. Once A0 is
being transmitted.
set low, it must not go high until after the fourth byte is loaded.
Each 8 bit byte is loaded into the input buffer register by a low
If the PARITY ENB pin is high, the 32nd bit will be a parity bit, pulse on the WRITE input. After the fourth byte is loaded, the
inserted so as to make the 32 bit word have odd parity. If the XMTRDYoutput goes low.
PARITY ENB pin is low, the 32nd bit will be the D7 bit of the
4th byte.
The contents of the input buffer register are transferred to the
output register during the fourth bit period of the gap. If the
Outputs are provided for both ARINC 429/575 (DATA ONE fourth gap bit period of the previous word has already been
and DATA ZERO pins) and ARINC 561 (561 DATA and 561 transmitted, the contents of the input buffer register will be
SYNC pins) type data.
transferred to the output shift register during the first bit pe-
riod after the loading of the fourth byte, and the XMTRDYout-
A low signal applied to the RESET pin resets the HI-8783’s put goes high.
internal logic so that spurious transmission does not take
place during power-up. The registers are cleared so that a After the output shift register is loaded, the data is shifted out
continuous gap will be transmitted until the first word is to the output logic in the order shown in figure 2.
loaded into the transmitter.
The 561 SYNC output pulses low when the XMT CLK is low
during the 8th bit of the ARINC transmission.
The XMITCLK is the same as the data rate.
HOLT INTEGRATED CIRCUITS
2
HI-8783, HI-8784, HI-8785
XMIT CLK
XMT RDY
WRITE
A0
status &
control
logic
byte
counter
SLP1.5
TXAOUT
TXBOUT
line
driver
word gap
counter
HI-8784, HI8785
8 to 32 bit
mux
32 bit
buffer
register
32 bit
shift
register
DATA ONE
DATA
BUS
8
32
32
DATA ZERO
bit
counter
output
logic
HI-8783
561 SYNC
561 DATA
PARITY ENB
Figure 1. Block Diagram
FUNCTIONAL DESCRIPTION (Cont.)
A0
Byte Data Bus
ARINC Bits
The HI-8784 and HI-8785 have the same digital logic func-
tion as the HI-8783, but include an on-chip line driver de-
signed to directly drive the ARINC 429 bus. The two ARINC
outputs (TXAOUT and TXBOUT) provide a differential volt-
age to produce a +10 volt One, a -10 volt Zero, and a 0 volt
Null. The slope of the ARINC outputs is controlled by the
SLP1.5 pin. If SLP1.5 is high, the output rise and fall time is
nominally 1.5us. If SLP1.5 is set low, the rise and fall times
are 10us. DATA ONE and DATA ZERO outputs are not pro-
vided for the HI-8784 and HI-8785.
1
0
0
0
Byte 1
Byte 2
Byte 3
Byte 4
D0 - D7
ARINC 1 - ARINC 8
ARINC 9 - ARINC 16
ARINC 17 - ARINC 24
ARINC 25 - ARINC 32
D0 - D7
D0 - D7
D0 - D7
Figure 2. Order of transmitted bytes
POWER SUPPLY SEQUENCING
The power supplies must be controlled to prevent large
currents during supply turn-on and turn-off. The required
sequence is V+ followed by VDD, always ensuring that V+ is
the most positive supply. The V- supply is not critical and can
be asserted at any time.
The HI-8784 has 37.5 ohms in series with each line driver out-
put. The HI-8785 has 10.0 ohms in series. The HI-8785 is for
applications where external series resistance is needed, typi-
cally for lightning protection devices.
HOLT INTEGRATED CIRCUITS
3
HI-8783, HI-8784, HI-8785
TIMING DIAGRAMS
DATA TRANSMISSION - EXAMPLE PATTERN
GAP
GAP
34
32
33
34
35
36
1
2
3
4
31
32
33
35
36
1
2
XMIT CLK
WRITE
XMT RDY
DATA ONE (HI-8783 only)
DATA ZERO (HI-8783 only)
ARINC 429 DATA (HI-8784 & HI-8785 only)
(TXAOUT-TXBOUT)
561 DATA
561 SYNC
LOW DURING CLK 8
TRANSMITTER OPERATION
DATA BUS
WRITE
BYTE 1 VALID
tSET
tHLD
BYTE 2 VALID
BYTE 4 VALID
tWPW
tWPD
A0
tASW
tASW
t XD
tAH
XMT RDY
HOLT INTEGRATED CIRCUITS
4
HI-8783, HI-8784, HI-8785
LINE DRIVER OUTPUTS
XMT CLK
t
phlx
t
t
plhx
plhx
5V
0V
DATA ONE
t
phlx
5V
0V
DATA ZERO
t
rx
t
rx
10V
0V
90ꢀ
DIFFERENTIAL VOLTAGE
TXAOUT - TXBOUT
10ꢀ
10ꢀ
90ꢀ
10ꢀ
-10V
t
fx
t
fx
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS
Voltages referenced to Ground
Supply Voltages
V+.......................................+10V... 5ꢀ
V-........................................ -10V... 5ꢀ
VCC....................................... 5V... 5ꢀ
Supply voltages
V+.................................................12.5V
V-.................................................-12.5V
VCC.................................................. 7V
Temperature Range
DC current per input pin................ +10ma
Industrial Screening.........-40°C to +85°C
Hi-Temp Screening........-55°C to +125°C
Military Screening..........-55°C to +125°C
Power dissipation at 25°
plastic DIL............1.0W, derate 10mW/°C
ceramic DIL..........0.5W, derate 7mW/°C
NOTE:
Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to the
device. These are stress ratings only. Operation at
the limits is not recommended.
Solder Temperature ........275°C for 10 sec
Storage Temperature........-65°C to +150°C
DC ELECTRICAL CHARACTERISTICS (HI-8783, HI-8784 and HI-8785)
VCC = 5.0V, VSS = 0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
VCC
VIH
CONDITION
MIN
4.75
2.0
TYP
5
MAX
UNITS
Operating Voltage
Min. Input Voltage
Max. Input Voltage
Min. Input Current
Max. Input Current
Min. Output Voltage
5.25
V
V
(HI)
(LO)
(HI)
1.4
1.4
VIL
0.8
1
V
IIH
VIH = 4.9V
VIL = 0.1V
µA
µA
V
(LO)
(HI)
IIL
-1
VOH
VIH
IOUT = -1.6mA
IOUT = 1.6mA
f = 100khz
2.7
Max. Output Voltage (LO)
Operating Current Drain
Input Capacitance
0.4
2.8
20
V
ICC
0.8
mA
pF
CIN
Not tested
HOLT INTEGRATED CIRCUITS
5
HI-8783, HI-8784, HI-8785
DC ELECTRICAL CHARACTERISTICS (HI-8784 and HI-8785 only)
VCC = 5.0V, VSS = 0V, V+ = 10V, V- = -10V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
CONDITION
MIN
9.5
TYP
10
MAX
10.5
10.5
20
UNITS
V
Operating Voltage
Operating Voltage
V+
V-
-9.5
-10
6
V
Operating Current Drain (V+)
IDD
IEE
no load, f = 100khz
no load, f = 100khz
mA
mA
Operating Current Drain (V-)
-20
-6
Line Driver Output Levels (Ref. To GND)
ONE
no load, VCC = 5.0V
4.5
5.0
0
5.5
0.25
-4.5
V
V
V
NULL
“
“
-0.25
-5.55
ZERO
-5.0
Line Driver Output Levels (Differential)
ONE
no load, VCC = 5.0V
9.0
-0.5
-11.0
80
10.0
0
11.0
0.5
V
V
NULL
“
ZERO
“
-10.0
-9.0
V
Minimum Short Circuit Sink or Source Current
IOUT
momentary magnitude
mA
(HI-8783, HI-8784 and HI-8785)
AC ELECTRICAL CHARACTERISTICS
VCC = 5.0V, VSS = 0V, TA =Operating Temperature Range (unless otherwise specified).
PARAMETER SYMBOL
MIN
TYP
MAX
UNITS
DATA BUS TIMING
Setup Data Bus to WRITE
Hold WRITE to Data Bus
Hold A0 to WRITE
tSET
tHLD
tAH
20
30
0
ns
ns
ns
ns
ns
ns
ns
Pulse width WRITE
tWPW
tWPD
tASW
tXD
40
40
20
80
1 CLK
Delay between WRITE
Setup A0 to WRITE
Delay last WRITE to XMT RDY
AC ELECTRICAL CHARACTERISTICS
(HI-8784 and HI-8785 only)
V+ = 10V, V- = -10V, T = Operating Temperature Range (unless otherwise stated)
A
PARAMETERS
SYMBOL TEST CONDITIONS
MIN
TYP
MAX UNITS
Line Driver propagation delay
Output high to low
no load
t
-
-
500
500
-
-
ns
ns
phlx
Output low to high
t
plhx
Line Driver transition times
Output high to low
t
t
SLP1.5 = logic 1
SLP1.5 = logic 1
1.0
1.0
1.5
1.5
2.0
2.0
us
us
fx
rx
Output low to high
t
t
Output high to low
Output low to high
SLP1.5 = logic 0
SLP1.5 = logic 0
us
us
5
5
10
10
15
15
fx
rx
HOLT INTEGRATED CIRCUITS
6
HI-8783, HI-8784, HI-8785
ADDITIONAL HI-8783 PIN CONFIGURATION
1
2
22
21
20
19
18
17
16
15
14
13
12
561 SYNC
D0
VCC
561 DATA
DATA ZERO
DATA ONE
PARITY ENB
XMT READY
XMIT CLK
RESET
3
D1
HI-8783PDI
&
HI-8783PDT
4
D2
5
D3
6
D4
7
D5
8
D6
9
NC
WRITE
10
11
D7
NC
GND
A0
22 Pin Plastic DIP package
(See page 1 for additional pin configurations)
ORDERING INFORMATION
HI - 87XX xx x x
LEAD
PART
NUMBER
FINISH
Tin / Lead (Sn / Pb) Solder
Blank
F
100ꢀ Matte Tin (Pb-free, RoHS compliant)
PART
NUMBER
TEMPERATURE
RANGE
BURN
IN
FLOW
I
-40°C TO +85°C
-55°C TO +125°C
I
NO
NO
T
T
PACKAGE
DESCRIPTION
PART
NUMBER
PD
PS
22 PIN PLASTIC DIP (8783 ONLY)
20 PIN PLASTIC SOIC - WB (8783 ONLY)
24 PIN PLASTIC SOIC - WB (8784/8785 ONLY)
OUTPUT SERIES RESISTANCE
INCLUDES
PART
NUMBER
LINE DRIVER
BUILT-IN
REQUIRED EXTERNALLY
NO
External Line Driver Required
8783
8784
8785
YES
37.5 Ohms
10 Ohms
0
YES
27.5 Ohms
Legend: WB - Wide Body
HOLT INTEGRATED CIRCUITS
7
HI-8783, HI-8784, HI-8785 PACKAGE DIMENSIONS
inches (millimeters)
20-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
20HW
Package Type:
.5035 .0075
(12.789 .191)
.0105 .0015
(.2667 .0381)
.4065 .0125
(10.325 .318)
.296 .003
(7.518 .076)
SEE DETAIL A
.018
(.457)
TYP
.090 .010
(2.286 .254)
0° to 8°
.0075 .0035
(.191 .089)
.050
(1.27)
DETAIL A
.033 .017
(.838 .432)
TYP
22-PIN PLASTIC DIP
Package Type: 22P
1.105 .015
(28.067 .381)
.350 .010
(8.89 .254)
.400 .010
(10.160 .254)
.135 .015
(3.429 .381)
.025 .010
(.635 .254)
0 - 15o
.1375 .0125
(3.4925 .3175)
.019 .004
(.483 .102)
0.100
TYP.
.435 .035
(11.049 .889)
.053 .013
(1.346 .330)
HOLT INTEGRATED CIRCUITS
8
HI-8783, HI-8784, HI-8785 PACKAGE DIMENSIONS
inches (millimeters)
24-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
Package Type:
24HW
.606 .004
(15.392 .102)
.0105 .0015
(.2667 .0381)
.2955 .0035
(7.506 .089)
.4065 .0125
(10.325 .318)
SEE DETAIL A
.018
(.457)
TYP
.095 .005
(2.413 .127)
0° to 8°
.0075 .0035
(.191 .089)
.050
(1.27)
.033 .017
(.838 .432)
TYP
DETAIL A
HOLT INTEGRATED CIRCUITS
9
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