HFBR-5301 [HP]

Fibre Channel 133 MBd and Fibre Channel 133 MBd and Cost 1x9 Package Style; 光纤通道133兆位和光纤通道133兆位和成本1X9封装形式
HFBR-5301
型号: HFBR-5301
厂家: HEWLETT-PACKARD    HEWLETT-PACKARD
描述:

Fibre Channel 133 MBd and Fibre Channel 133 MBd and Cost 1x9 Package Style
光纤通道133兆位和光纤通道133兆位和成本1X9封装形式

光纤 电信集成电路
文件: 总12页 (文件大小:204K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Fibre Channel 133 MBd and  
266 MBd Transceivers in Low  
Cost 1x9 Package Style  
Technical Data  
HFBR-5301 133 MBd  
HFBR-5302 266 MBd  
Features  
The products are produced in the  
new industry standard 1x9 SIP  
package style with a duplex SC  
connector interface as defined in  
the Fiber Channel ANSI FC-PH  
standard document.  
• Full Compliance with ANSI  
X3T11 Fibre Channel  
Physical and Signaling  
Interface  
• Multisourced 1x9 Package  
Style with Duplex SC  
Connector  
• Wave Solder and Aqueous  
Wash Process Compatibility  
• Compatible with Various  
Manufacturers FC-0 and  
FC-1 Circuits  
The HFBR-5301 is a 1300 nm  
transceiver specified for use in  
133 MBd, 12.5 MB/s, 12-M6-LE-I  
Fibre Channel interfaces to either  
62.5/125 µm or 50/125 µm  
multimode fiber-optic cables.  
These are packaged in the optical  
subassembly portion of the  
receiver.  
The HFBR-5302 is a 1300 nm  
transceiver specified for use in  
266 MBd, 25 MB/s, 25-M6-LE-I  
Fibre Channel interfaces to either  
62.5/125 µm or 50/125 µm  
Applications  
• Fibre Channel 12.5 MB/s  
12-M6-LE-I Interfaces for  
1300 nm LED Links to  
1500 m  
• Fibre Channel 25 MB/s  
25-M6-LE-I Interfaces for  
1300 nm LED Links to  
1500 m  
These PIN/preamplifier combina-  
tions are coupled to a custom  
quantizer IC which provides the  
final pulse shaping for the logic  
output and the Signal Detect  
function. The Data output is  
differential. The Signal Detect  
output is single-ended. Both data  
and signal detect outputs are  
PECL compatible, ECL refer-  
enced (shifted) to a +5 volt  
power supply.  
multimode fiber-optic cables.  
Transmitter Sections  
The transmitter sections of the  
HFBR-5301 and HFBR-5302  
utilize 1300 nm InGaAsP LEDs.  
These LEDs are packaged in the  
optical subassembly portion of  
the transmitter section. They are  
driven by a custom silicon IC  
which converts PECL logic  
signals, into an analog LED drive  
current.  
Description  
The HFBR-5301 and HFBR-5302  
Fibre Channel Transceivers from  
Hewlett-Packard provide the  
system designer with products to  
implement Fibre Channel designs  
for use in multimode fiber (MMF)  
applications. These include the  
12.5 MB/sec 12-M6-LE-I interface  
and the 25 MB/sec 25-M6-LE-I  
interface for 1300 nm LED links.  
Package  
The overall package concept for  
the HP Fibre Channel trans-  
ceivers consists of three basic  
elements; the two optical  
subassemblies, an electrical  
subassembly and the housing  
with integral duplex SC connec-  
tor interface. This is illustrated in  
the block diagram in Figure 1.  
Receiver Sections  
The receiver sections of the  
HFBR-5301 and HFBR-5302  
utilize InGaAs PIN photo diodes  
coupled to a custom silicon  
transimpedance preamplifier IC.  
5963-5608E (3/95)  
215  
The electrical subassembly con-  
sists of a high volume multilayer  
printed circuit board to which the  
IC chips and various surface-  
mount passive circuit elements  
are attached.  
ELECTRICAL SUBASSEMBLY  
QUANTIZER IC  
DUPLEX SC  
RECEPTACLE  
DATA OUT  
PIN  
SIGNAL  
DETECT  
OUT  
PREAMP IC  
OPTICAL  
SUBASSEMBLIES  
The package includes internal  
shields for the electrical and  
optical subassemblies to insure  
high immunity to external EMI  
fields and low EMI emissions.  
LED  
DATA IN  
DRIVER IC  
TOP VIEW  
Figure 1. Block Diagram.  
The outer housing, including the  
duplex SC connector, is molded  
of filled non-conductive plastic to  
provide mechanical strength and  
electrical isolation. The solder  
posts are isolated from the circuit  
design of the transceiver, while  
they can be connected to a  
The package outline drawing and  
pin out are shown in Figures 2  
and 3. The details of this package  
outline and pin out are compliant  
with the multisource definition of  
the 1x9 single in-line package  
(SIP). The low profile of the  
Hewlett-Packard transceiver  
design complies with the  
maximum height allowed for the  
duplex SC connector over the  
entire length of the package.  
The optical subassemblies utilize  
a high volume assembly process  
together with low cost lens  
elements which result in a cost  
effective building block.  
ground plane on the circuit  
board, doing so will have no  
impact on circuit performance.  
The transceiver is attached to a  
printed circuit board with the  
nine signal pins and the two  
solder posts which exit the  
bottom of the housing. The two  
solder posts provide the primary  
mechanical strength to withstand  
the loads imposed on the trans-  
ceiver by mating with the duplex  
SC connectored fiber cables.  
39.12  
(1.540)  
12.70  
(0.500)  
MAX.  
AREA  
RESERVED  
FOR  
PROCESS  
25.40  
(1.000)  
12.70  
(0.500)  
MAX.  
PLUG  
HFBR-5XXX  
DATE CODE (YYWW)  
H
SINGAPORE  
+ 0.08  
- 0.05  
0.75  
3.30 ± 0.38  
(0.130 ± 0.015)  
+ 0.003  
- 0.002  
10.35  
(0.407)  
(0.030  
)
MAX.  
Application Information  
The Applications Engineering  
group in the Hewlett-Packard  
Optical Communication Division  
is available to assist with the  
technical understanding and  
design trade-offs associated with  
these transceivers. You can  
contact them through your local  
Hewlett-Packard sales  
2.92  
(0.115)  
18.52  
(0.729)  
4.14  
+ 0.25  
- 0.05  
+ 0.010  
- 0.002  
1.27  
0.46  
(0.018)  
)
ø
(9x)  
(0.050  
(0.163)  
NOTE 1  
NOTE 1  
23.55  
(0.927)  
20.32  
(0.800)  
16.70  
(0.657)  
17.32 20.32 23.32  
(0.682) (0.800) (0.918)  
[8x(2.54/.100)]  
0.87  
(0.034)  
23.24  
(0.915)  
15.88  
(0.625)  
representative.  
NOTE 1: THE SOLDER POSTS AND ELECTRICAL PINS ARE PHOSPHOR BRONZE WITH TIN LEAD OVER NICKEL PLATING.  
DIMENSIONS ARE IN MILLIMETERS (INCHES).  
The following information is  
provided to answer some of the  
most common questions about  
the use of these parts.  
Figure 2. Package Outline Drawing.  
216  
8
7
Generic Cabling for Customer  
Premises per DIS 11801  
document and the EIA/TIA-568-A  
Commercial Building Telecom-  
munications Cabling Standard  
per SP-2840.  
1 = V  
EE  
HFBR-5301, 62.5/125µm  
N/C  
2 = RD  
3 = RD  
4 = SD  
5 = V  
6
5
HFBR-5302, 62.5/125µm  
4
3
2
1
0
CC  
HFBR-5301,  
50/125µm  
6 = V  
CC  
7 = TD  
8 = TD  
Transceiver Signaling  
Operating Rate Range and  
BER Performance  
For purposes of definition, the  
symbol rate (Baud), also called  
signaling rate, is the reciprocal of  
the symbol time. Data rate (bits/  
sec) is the symbol rate divided by  
the encoding factor used to  
HFBR-5302, 50/125µm  
N/C  
9 = V  
EE  
TOP VIEW  
0
0.5  
1
1.5  
2
FIBER OPTIC CABLE LENGTH – km  
Figure 3. Pinout Diagram.  
Figure 4. Optical Power Budget vs.  
Fiber Optic Cable Length.  
Compatibility with Fibre  
Channel FC-0/1 Chip Sets  
represents the remaining OPB at  
any link length, which is available  
for overcoming non-fiber cable  
losses.  
encode the data (symbols/bit).  
The HFBR-5301 and HFBR-5302  
transceivers are compatible with  
various manufacturers FC-0 and  
FC-1 integrated circuits. Evalua-  
tion boards, which include the  
Hewlett-Packard transceivers, are  
available from these manufactur-  
ers. The Applications Engineering  
group in the Hewlett- Packard  
Optical Communication Division  
is available to assist you with  
implementation details.  
The specifications in this data  
sheet have all been measured  
using the standard Fibre Channel  
symbol rates of 133 Mbd or  
266 MBd.  
Hewlett-Packard LED technology  
has produced 1300 nm LED  
devices with lower aging charac-  
teristics than normally associated  
with these technologies in the  
industry. The industry convention  
is 1.5 dB aging for 1300 nm  
LEDs. The HP LEDs will experi-  
ence less than 1 dB of aging over  
normal commercial equipment  
mission life periods. Contact your  
Hewlett-Packard sales represen-  
tative for additional details.  
The transceivers may be used for  
other applications at signaling  
rates different than specified in  
this data sheet. Depending on the  
actual signaling rate, there may  
be some differences in optical  
Transceiver Optical Power  
Budget vs. Link Length  
-2  
1 x 10  
Optical Power Budget (OPB) is  
the available optical power for a  
fiber optic link to accommodate  
fiber cable losses plus losses due  
to in-line connectors, splices,  
optical switches, and to provide  
margin for link aging and  
-3  
1 x 10  
Figure 4 was generated with a  
Hewlett-Packard fiber optic link  
model containing the current  
industry conventions for fiber  
cable specifications and the Fibre  
Channel optical parameters.  
These parameters are reflected in  
the specified performance of the  
transceiver in this data sheet.  
This same model has been used  
extensively in the ANSI and IEEE  
committees, including the ANSI  
X3T9.5 committee, to establish  
the optical performance require-  
ments for various fiber-optic  
interface standards. The cable  
parameters used come from the  
ISO/IEC JTC1/SC 25/WG3  
-4  
1 x 10  
-5  
1 x 10  
-6  
1 x 10  
-7  
1 x 10  
-8  
1 x 10  
-9  
1 x 10  
unplanned losses due to cable  
plant reconfiguration or repair.  
-10  
1 x 10  
1 x 10  
1 x 10  
-11  
-12  
-6  
-4  
-2  
0
2
Figure 4 illustrates the predicted  
OPB associated with the two  
transceivers specified in this data  
sheet at the Beginning of Life  
(BOL). These curves represent  
the attenuation and chromatic  
plus modal dispersion losses  
associated with the 62.5/125 µm  
and 50/125 µm fiber cables only.  
The area under the curves  
RELATIVE INPUT OPTICAL POWER – dB  
CONDITIONS:  
1. 133 & 266 MBd  
7
2. PRBS 2 -1  
3. CENTER OF SYMBOL SAMPLING  
4. T = 25 °C  
A
CC  
5. V  
= 5 V  
DC  
6. INPUT OPTICAL RISE/FALL TIMES =  
1.0/1.9 ns  
Figure 5. HFBR-5301/5302 Bit Error  
Rate vs. Relative Receiver Input  
Optical Power.  
217  
power budget to do this. This is  
primarily caused by a change of  
receiver sensitivity.  
may be induced by electrostatic  
discharge (ESD). These trans-  
ceivers are certified as MIL-STD-  
883C Method 3015.4 Class 2  
devices.  
These transceivers are compat-  
ible with industry standard wave  
and hand solder processes.  
These transceivers can also be  
used for applications which  
require different Bit Error Rate  
(BER) performance. Figure 5  
illustrates the typical trade-off  
between link BER and the  
receivers input optical power  
level.  
Shipping Container  
The transceiver is packaged in a  
shipping container designed to  
protect it from mechanical and  
ESD damage during shipment or  
storage.  
Care should be used to avoid  
shorting the receiver data or  
signal detect outputs directly to  
ground.  
Solder and Wash Process  
Compatibility  
Board Layout – Decoupling  
Circuit and Ground Planes  
Transceiver Jitter  
Performance  
The transceivers are delivered  
with a protective process plug  
inserted into the duplex SC  
connector receptacle. This  
process plug protects the optical  
subassemblies during wave solder  
and aqueous wash processing and  
acts as a dust cover during  
shipping.  
You should take care in the layout  
of your circuit board to achieve  
optimum performance from these  
transceivers. Figure 6 provides a  
good example of a schematic for  
a power supply decoupling circuit  
that works well with these parts.  
Hewlett-Packard further recom-  
mends that a contiguous ground  
The Hewlett-Packard 1300 nm  
transceivers are designed to  
operate per the system jitter  
allocations stated in FC-PH  
Annex A.4.3 and A.4.4.  
The HP 1300 nm transmitters will  
tolerate the worst case input  
electrical jitter allowed, without  
violating the worst case output  
optical jitter requirements.  
NO INTERNAL CONNECTION  
NO INTERNAL CONNECTION  
The HP 1300 nm receivers will  
tolerate the worst case input  
optical jitter allowed without  
violating the worst case output  
electrical jitter allowed.  
HFBR-530X  
TOP VIEW  
Rx  
Rx  
Tx  
Tx  
V
RD  
2
RD  
3
SD  
4
V
V
TD  
7
TD  
8
V
EE  
1
CC  
CC  
6
EE  
9
5
The jitter specifications stated in  
the following tables are derived  
from the values in FC-PH Annex  
A.4.3 and A.4.4. They represent  
the worst case jitter contribution  
that the transceivers are allowed  
to make to the overall system  
jitter without violating the  
C1  
C2  
V
CC  
R2  
R3  
C5  
L1  
C3  
L2  
C4  
TERMINATION  
AT PHY  
DEVICE  
R1  
R4  
V
CC  
INPUTS  
R5  
R7  
V
CC  
AT V  
TRANSCEIVER  
FILTER  
PINS  
CC  
TERMINATION  
AT TRANSCEIVER  
INPUTS  
allowed allocation. In practice,  
the typical contribution of the HP  
transceivers is below these  
C6  
R9  
R10  
R6  
R8  
maximum allowed amounts.  
RD  
RD  
SD  
V
TD  
TD  
CC  
NOTES:  
Recommended Handling  
Precautions  
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT  
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT  
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.  
R1 = R4 = R6 = R8 = R10 = 130 ohms.  
R2 = R3 = R5 = R7 = R9 = 82 ohms.  
C1 = C2 = C3 = C5 = C6 = 0.1 µF.  
C4 = 10 µF.  
Hewlett-Packard recommends  
that normal static precautions be  
taken in handling and assembly  
of these transceivers to prevent  
damage and/or degradation which  
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.  
Figure 6. Recommended Decoupling and Termination Circuits.  
218  
Regulatory Compliance  
The first case is during handling  
of the transceiver prior to mount-  
ing it on the circuit board. You  
should use normal ESD handling  
precautions for ESD sensitive  
devices. These precautions  
include using grounded wrist  
straps, work benches, and floor  
mats in ESD controlled areas.  
plane be provided in the circuit  
board directly under the  
transceiver to provide a low  
inductance ground for signal  
return current. This recommen-  
dation is in keeping with good  
high frequency board layout  
practices.  
These transceiver products are  
intended to enable system  
designers to develop equipment  
that complies with the various  
international regulations govern-  
ing certification of Information  
Technology Equipment. See the  
Regulatory Compliance Table for  
details.  
Board Layout - Hole Pattern  
The second case to consider is  
static discharges to the exterior  
of the equipment chassis contain-  
ing the transceiver parts. To the  
extent that the transceiver duplex  
SC connector is exposed to the  
outside of the equipment chassis,  
it may be subject to whatever  
ESD system level test criteria that  
the equipment is intended to  
meet.  
The Hewlett-Packard transceiver  
complies with the circuit board  
“Common Transceiver Footprint”  
hole pattern defined in the  
original multisource announce-  
ment for the 1x9 pin package  
style. This drawing is reproduced  
in Figure 7 with the addition of  
ANSI Y14.5M compliant dimen-  
sioning to be used as a guide in  
the mechanical layout of your  
circuit board.  
Electromagnetic Interference  
(EMI)  
Most equipment designs utilizing  
these high-speed transceivers  
from Hewlett-Packard will need  
to meet the requirements of the  
FCC in the United States,  
CENELEC EN55022 (CISPR 22)  
in Europe and VCCI in Japan.  
The HFBR-5301 and HFBR-5302  
are suitable for use in designs  
ranging from a single transceiver  
in a desktop computer to large  
quantities of transceivers in a  
hub, switch or concentrator.  
Immunity  
Equipment utilizing these trans-  
ceivers will be subject to radio-  
frequency electromagnetic fields  
in some environments. These  
transceivers have a high immunity  
to such fields (see AN1075,  
“Testing and Measuring Electro-  
magnetic Compatibility Perfor-  
mance of the HFBR-510X/520X  
Fiber-Optic Transceivers,” 5963-  
3358E).  
Board Layout – Art Work  
The Applications Engineering  
group has developed Gerber file  
art work for a multilayer printed  
circuit board layout incorporating  
the recommendations above.  
Contact your local Hewlett-  
Packard sales representative for  
details.  
Electrostatic Discharge (ESD)  
There are two design cases in  
which immunity to ESD damage  
is important.  
1.9 ± 0.1  
.075 ± .004  
ø
(2X)  
–A–  
Transceiver Reliability and  
Performance Qualification  
Data  
20.32  
.800  
Ø0.000  
M
A
The 1x9 transceivers have passed  
Hewlett-Packard reliability and  
performance qualification testing  
and are undergoing ongoing  
quality monitoring. Details are  
available from your Hewlett-  
Packard sales representative.  
0.8 ± 0.1  
.032 ± .004  
ø
(9X)  
20.32  
.800  
Ø0.000  
M
A
These transceivers are manu-  
factured at the Hewlett-Packard  
Singapore location which is an  
ISO 9002 certified facility.  
2.54  
(8X)  
.100  
TOP VIEW  
Figure 7. Recommended Board Layout Hole Pattern.  
219  
Regulatory Compliance Table  
Feature  
Test Method  
Performance  
Electrostatic Discharge  
(ESD) to the Electrical  
Pins  
Mil-STD-883C  
Method 3015.4  
Class 2 (2000 to 3999 Volts) Withstand up to  
2200 V applied between electrical pins.  
Electrostatic Discharge  
(ESD) to the Duplex  
SC Receptacle  
Variation of  
IEC 801-2  
Typically withstand at least 25 kV without damage  
when the Duplex SC Connector Receptacle is  
contacted by a Human Body Model Probe.  
Electromagnetic  
Interference (EMI)  
FCC Class B  
CENELEC EN55022  
Transceivers typically provide a 13 dB margin at  
133 MBd, and a 7 dB margin at 266 MBd to the  
Class B (CISPR 22B) noted standard limits when tested at a certified test  
VCCI Class 2  
range with the transceiver mounted to a circuit  
card without a chassis enclosure.  
Immunity  
Variation of  
IEC 801-3  
Typically show no measurable effect from a 10 V/m  
field swept from 10 to 450 MHz applied to the  
transceiver when mounted to a circuit card without  
a chassis enclosure.  
220  
4
3
200  
180  
160  
140  
120  
t = 1.8 ns  
r
t = 1.9 ns  
r
t = 2.0 ns  
r
2
1
t = 2.1 ns  
r
t = 2.2 ns  
r
TRANSMITTER  
100  
OUTPUT OPTICAL  
RISE TIMES – ns  
0
80  
60  
-1  
1280 1300 1320 1340 1360 1380  
-3  
-2  
-1  
1
2
3
0
λc – TRANSMITTER OUTPUT OPTICAL  
EYE SAMPLING TIME POSITION – ns  
CENTER WAVELENGTH – nm  
CONDITIONS:  
1. T = 25 °C  
A
CC  
2. V  
= 5 V  
DC  
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/1.9 ns  
4. INPUT OPTICAL POWER IS NORMALIZED  
TO CENTER OF DATA SYMBOL  
HFBR-5302 Typical Transmitter  
test results of λc, λ and tr are  
correlated and comply with the  
allowed spectral width as a  
function of center wavelength for  
various rise and fall times.  
5. NOTES 11a AND 12a APPLY  
Figure 9. HFBR-5301, Relative Input  
Optical Power vs. Eye Sampling Time  
Position.  
Figure 8. Typical Transmitter Output  
Optical Spectral Width (FWHM) vs.  
Transmitter Output Optical Center  
Wavelength and Rise/Fall Times.  
220  
5
4
3
2
1
Ordering Information  
Accessory Duplex SC  
Connectored Cable  
Assemblies  
The HFBR-5301 and HFBR-5302  
1300 nm products are available  
for production orders through the  
Hewlett-Packard Component  
Sales Offices and Authorized  
Distributors world wide.  
Hewlett-Packard also offers two  
compatible Duplex SC connec-  
tored jumper cable assemblies to  
assist you in the evaluation of  
these transceiver products. These  
cables may be purchased from  
HP with the following part  
numbers. They are available  
through the Hewlett-Packard  
Component Field Sales Offices  
and Authorized Distributors world  
wide.  
Applications Support  
Materials  
Contact your local Hewlett-  
Packard Component Field Sales  
Office for information on how to  
obtain PCB layouts and Test  
fixtures for the 1x9 transceivers.  
0
-1.5  
-1  
-0.5  
0
0.5  
1
1.5  
EYE SAMPLING TIME POSITION – ns  
CONDITIONS:  
1. T = 25 °C  
A
CC  
2. V  
= 5 V  
DC  
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/1.9 ns  
4. INPUT OPTICAL POWER IS NORMALIZED  
TO CENTER OF DATA SYMBOL  
5. NOTES 11 AND 12 APPLY  
1. HFBR-BKD001  
A duplex cable 1 meter long  
assembled with 62.5/125 µm  
fiber and Duplex SC connector  
plugs on both ends.  
Figure 10. HFBR-5302, Relative Input  
Optical Power vs. Eye Sampling Time  
Position.  
2. HFBR-BKD010  
A duplex cable 10 meters long  
assembled with 62.5/125 µm  
fiber and Duplex SC connector  
plugs on both ends.  
221  
HFBR-5301, -5302  
Absolute Maximum Ratings  
Parameter  
Storage Temperature  
Lead Soldering Temperature  
Lead Soldering Time  
Supply Voltage  
Data Input Voltage  
Differential Input Voltage  
Output Current  
Symbol  
TS  
TSOLD  
tSOLD  
VCC  
Min.  
-40  
Typ. Max.  
Unit  
°C  
°C  
sec.  
V
V
Reference  
100  
260  
10  
7.0  
VCC  
1.4  
50  
-0.5  
-0.5  
VI  
VD  
IO  
V
mA  
Note 1  
HFBR-5301, -5302  
Recommended Operating Conditions  
Parameter  
Operating Temperature - Ambient  
Supply Voltage  
Data Input Voltage - Low  
Data Input Voltage - High  
Data and Signal Detect Output Load  
Symbol  
Min.  
0
4.75  
-1.810  
-1.165  
Typ. Max.  
70  
Unit  
°C  
V
V
V
Reference  
TA  
VCC  
5.25  
VIL - VCC  
V - V  
-1.475  
-0.880  
50  
IH  
CC  
RL  
Note 3  
HFBR-5301, -5302  
Transmitter Electrical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Supply Current  
Power Dissipation  
Data Input Current - Low  
Data Input Current - High  
Symbol  
ICC  
PDISS  
IIL  
Min.  
Typ. Max.  
Unit  
mA  
W
µA  
µA  
Reference  
Note 4  
Note 4  
165  
0.86  
0
205  
1.1  
-350  
IIH  
14  
350  
HFBR-5301, -5302  
Receiver Electrical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Supply Current  
Power Dissipation  
Data Output Voltage - Low  
Data Output Voltage - High  
Data Output Rise Time  
Symbol  
ICC  
PDISS  
VOL - VCC  
VOH - VCC  
tr  
Min.  
Typ. Max.  
Unit  
mA  
W
V
Reference  
Note 15  
Note 16  
Note 17  
Note 17  
Note 18  
Note 18  
Note 17  
Note 17  
Note 18  
Note 18  
Note 19  
Note 20  
100  
0.3  
165  
0.5  
-1.840  
-1.045  
0.35  
0.35  
-1.840  
-1.045  
0.35  
0.35  
0
-1.620  
-0.880  
2.2  
V
ns  
ns  
V
Data Output Fall Time  
tf  
2.2  
Signal Detect Output Voltage - Low  
Signal Detect Output Voltage - High  
Signal Detect Output Rise Time  
Signal Detect Output Fall Time  
Signal Detect Assert Time (off to on)  
VOL - VCC  
VOH - VCC  
tr  
-1.620  
-0.880  
2.2  
V
ns  
ns  
µs  
µs  
tf  
2.2  
AS_Max  
55  
100  
Signal Detect Deassert Time (on to off) ANS_Max  
0
110  
350  
222  
HFBR-5301  
Transmitter Optical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Symbol  
Min.  
Typ. Max.  
Unit  
Reference  
Output Optical Power  
62.5/125 µm, NA = 0.275 Fiber  
PO, BOL  
PO, EOL  
-21  
-22  
-14  
-14  
dBm avg. Note 5  
dBm avg.  
Output Optical Power  
PO, BOL  
-24.5  
-14  
dBm avg. Note 5  
50/125 µm, NA = 0.20 Fiber  
Optical Extinction Ratio  
0.001 0.03  
%
Note 6  
-50  
-35  
dB  
Center Wavelength  
Spectral Width - FWHM  
Optical Rise Time  
Optical Fall Time  
Deterministic Jitter Contribution  
of Transmitter  
λC  
∆λ  
tr  
tf  
DJC  
1270  
1308 1380  
nm  
nm  
ns  
137  
250  
4
Note 8a  
Note 8a  
Note 9  
4
ns  
0.16T  
1.20  
0.09T  
0.68  
ns p-p  
ns p-p  
Random Jitter Contribution of  
Transmitter  
RJC  
Note 10  
HFBR-5301  
Receiver Optical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Symbol  
Min.  
Typ. Max.  
Unit  
Reference  
Input Optical Power  
Minimum at Window Edge  
PIN Min. (W)  
-28  
dBm avg. Note 11a  
Figure 9  
Input Optical Power  
Minimum at Eye Center  
PIN Min. (C)  
-29  
dBm avg. Note 12a  
Figure 9  
Input Optical Power Maximum  
Operating Wavelength  
Signal Detect – Asserted  
Signal Detect – Deasserted  
Signal Detect – Hysteresis  
P
-14  
1260  
PD + 1.5 dB  
-45  
dBm avg. Note 11a  
IN Max.  
λ
PA  
PD  
1360  
-31  
nm  
dBm avg. Note 13, 19  
dBm avg. Note 14, 20  
dB  
PA - PD  
1.5  
2.4  
HFBR-5301  
Receiver Electrical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Deterministic Jitter Contributed by  
the Receiver  
Random Jitter Contributed by the  
Receiver  
Symbol  
Min.  
Typ. Max.  
Unit  
ns p-p  
ns p-p  
Reference  
Note 9, 11a  
DJC  
0.19T  
1.43  
0.35T  
2.64  
RJC  
Note 10,  
11a  
223  
HFBR-5302  
Transmitter Optical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Symbol  
Min.  
Typ. Max.  
Unit  
Reference  
Output Optical Power  
62.5/125 µm, NA = 0.275 Fiber  
PO, BOL  
PO, EOL  
-19  
-20  
-14 dBm avg. Note 5  
-14 dBm avg.  
Output Optical Power  
PO, BOL  
-22.5  
-14 dBm avg. Note 5  
50/125 µm, NA = 0.20 Fiber  
Optical Extinction Ratio  
Center Wavelength  
Spectral Width - FWHM  
Optical Rise Time  
0.03  
-35  
1308 1380  
%
dB  
Note 6  
λC  
∆λ  
tr  
1280  
nm  
nm  
ns  
Note 7  
Figure 8  
Note 7  
Figure 8  
Note 8  
Figure 8  
Note 8  
137  
2.0  
2.2  
0.6  
0.6  
Optical Fall Time  
tf  
ns  
Figure 8  
Deterministic Jitter Contribution  
of Transmitter  
Random Jitter Contribution of  
Transmitter  
DJC  
RJC  
0.08T  
0.30  
0.03T  
0.11  
Note 9  
ns p-p  
ns p-p  
Note 10  
HFBR-5302  
Receiver Optical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Symbol  
Min.  
Typ. Max.  
Unit  
Reference  
Input Optical Power  
Minimum at Window Edge  
PIN Min. (W)  
-26 dBm avg. Note 11  
Figure 10  
Input Optical Power  
Minimum at Eye Center  
PIN Min. (C)  
-28 dBm avg. Note 12  
Figure 10  
Input Optical Power Maximum  
Operating Wavelength  
Signal Detect – Asserted  
Signal Detect – Deasserted  
Signal Detect – Hysteresis  
P
-14  
1270  
PD + 1.5 dB  
-45  
dBm avg. Note 11  
IN Max.  
λ
PA  
PD  
1380  
nm  
-27 dBm avg. Note 13, 19  
dBm avg. Note 14, 20  
dB  
PA - PD  
1.5  
2.4  
HFBR-5302  
Receiver Electrical Characteristics  
(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)  
Parameter  
Deterministic Jitter Contributed by  
the Receiver  
Random Jitter Contributed by the  
Receiver  
Symbol  
Min.  
Typ. Max.  
Unit  
ns p-p  
ns p-p  
Reference  
Note 9, 11  
DJC  
0.24T  
0.90  
0.26T  
0.97  
RJC  
Note 10, 11  
224  
Notes:  
extinction ratio is the ratio of the  
optical power at the “0” level com-  
pared to the optical power at the “1”  
level expressed as a percentage or in  
decibels.  
window time width is calculated to  
simulate the effect of worst case  
input jitter per FC-PH Annex J  
and clock recovery sampling  
position in order to insure good  
operation with the various FC-0  
receiver circuits.  
• The integral transmitter is operat-  
ing with a 266 MBd, 133 MHz  
square-wave, input signal to simu-  
late any cross-talk present  
1. This is the maximum voltage that  
can be applied across the  
Differential Transmitter Data Inputs  
to prevent damage to the input ESD  
protection circuit.  
7. This parameter complies with the  
requirements for the tradeoffs  
between center wave-length, spectral  
width, and rise/fall times shown in  
Figure 8.  
8. The optical rise and fall times are  
measured from 10% to 90% when  
the transmitter is driven by a 25  
MBd (12.5 MHz square-wave) input  
signal. This parameter complies with  
the requirements for the tradeoffs  
between center wavelength, spectral  
width, and rise/fall times shown in  
Figure 8.  
2. When component testing these  
products do not short the receiver  
data or signal detect outputs directly  
to ground to avoid damage to the  
part.  
3. The outputs are terminated with 50  
connected to VCC - 2 V.  
between the transmitter and  
receiver sections of the  
transceiver.  
4. The power supply current needed to  
operate the transmitter is provided  
to differential ECL circuitry. This  
circuitry maintains a nearly constant  
current flow from the power supply.  
Constant current operation helps to  
prevent unwanted electrical noise  
from being generated and conducted  
or emitted to neighboring circuitry.  
5. These optical power values are  
measured as follows:  
• The maximum total jitter added by  
the receiver and the maximum  
total jitter presented to the clock  
recovery circuit comply with the  
maximum limits listed in Annex J,  
but the allocations of the Rx  
added jitter between deterministic  
jitter and random jitter are  
8.a. The optical rise and fall times are  
measured from 10% to 90% when  
the transmitter is driven by a 25  
MBd (12.5 MHz square-wave) input  
signal.  
different than in Annex J.  
11a. Same as Note 11 except:  
• The receiver input signal is a 133  
MBd, 27 - 1 psuedorandom data  
patter.  
• The Beginning of Life (BOL) to  
the End of Life (EOL) optical  
power degradation is typically 1.5  
dB per the industry convention for  
long wavelength LEDs. The actual  
degradation observed in Hewlett-  
Packard’s 1300 nm LED products  
is < 1 dB as specified in this data  
sheet.  
• Over the specified operating  
voltage and temperature ranges.  
• With 25 MBd (12.5 MHz square-  
wave) input signal.  
• At the end of one meter of noted  
optical fiber with cladding modes  
removed.  
The average power value can be  
converted to a peak power value by  
adding 3 dB. Higher output optical  
power transmitters are available on  
special request.  
9. Deterministic Jitter is defined as the  
combination of Duty Cycle  
Distortion and Data Dependent  
Jitter. Deterministic Jitter is  
measured with a test pattern  
consisting of repeating K28.5  
(00111110101100000101) data  
bytes and evaluated per the method  
in FC-PH Annex A.4.3.  
• The integral transmitter is operat-  
ing with a 133 MBd, 66.5 MHz  
square wave.  
• The receiver data window width  
is ± 1.73 ns.  
• The receiver added jitter maxi-  
mums and allocations are  
identical to the limits listed in  
Annex J.  
10. Random Jitter is specified with a  
sequence of K28.7 (square wave of  
alternating 5 ones and 5 zeros) data  
bytes and evaluated at a Bit Error  
Ratio (BER) of 1 x 10-12 per the  
method in FC-PH Annex A.4.4.  
11. This specification is intended to  
indicate the performance of the  
receiver section of the transceiver  
when Input Optical Power signal  
characteristics are present per the  
following definitions. The Input  
Optical Power dynamic range from  
the minimum level (with a window  
time-width) to the maximum level is  
the range over which the receiver is  
specified to provide output data with  
a Bit Error Rate (BER) better than  
12. All conditions of Note 11 apply  
except that the measurement is  
made at the center of the symbol  
with no window time-width.  
12a. All conditions of Note 11a apply  
except that the measurement is  
made at the center of the symbol  
with no window time-width.  
13. This value is measured during the  
transition from low to high levels of  
input optical power.  
14. This value is measured during the  
transition from high to low levels of  
input optical power.  
15. These values are measured with the  
outputs terminated into 50 Ω  
connected to VCC - 2 V and an input  
optical power level of -14 dBm  
average.  
6. The Extinction Ratio is a measure of  
the modulation depth of the optical  
signal. The data “0” output optical  
power is compared to the data “1”  
peak output optical power and  
expressed as a percentage. With the  
transmitter driven by a 12.5 MHz  
square-wave signal, the average  
optical power is measured. The data  
“1” peak power is then calculated by  
adding 3dB to the measured average  
optical power. The data “0” output  
optical power is found by measuring  
the optical power when the transmit-  
ter is driven by a logic “0” input. The  
or equal to 1 x 10-12  
.
• At the Beginning of Life (BOL)  
• Over the specified operating tem-  
perature and voltage ranges.  
• Input is a 266 MBd, 27 - 1  
psuedorandom data pattern.  
• Receiver data window time-width  
is ± 0.94 ns or greater and  
centered at mid-symbol. This data  
16. The power dissipation value is the  
power dissipated in the receiver  
itself. Power dissipation is calculated  
as the sum of the products of supply  
voltage and supply current, minus  
225  
the sum of the products of the output  
voltages and currents.  
17. These values are measured with  
respect to VCC with the output  
terminated into 50 connected to  
VCC - 2 V.  
18. The output rise and fall times are  
measured between 20% and 80%  
levels with the output connected to  
VCC - 2 V through 50 .  
19. The Signal Detect output shall be  
asserted within 100 µs after a step  
increase of the Input Optical Power.  
20. Signal detect output shall be de-  
asserted within 350 µs after a step  
decrease in the Input Optical Power.  
226  

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