HMMC-3128 [HP]

DC-12 GHz Packaged High Efficiency Divide-by-8 Prescaler; DC- 12 GHz的封装高效率分频- 8分频器
HMMC-3128
型号: HMMC-3128
厂家: HEWLETT-PACKARD    HEWLETT-PACKARD
描述:

DC-12 GHz Packaged High Efficiency Divide-by-8 Prescaler
DC- 12 GHz的封装高效率分频- 8分频器

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Agilent HMMC-3128  
DC-12 GHz Packaged High  
Efficiency Divide-by-8 Prescaler  
1GC1-8208-TR1-7" diameter reel/500 each  
1GC1-8208-BLK-bubble strip/10 each  
Data Sheet  
Features  
• Wide Frequency Range:  
0.2-12 GHz  
• High Input Power Sensitivity:  
On-chip pre- and post-amps  
-15 to +10 dBm (1- 8 GHz)  
-10 to +8 dBm (8-10 GHz)  
-5 to +2 dBm (10-12 GHz)  
Package Type:  
8-lead SOIC Plastic  
4.9 x 3.9 mm typ.  
1.55 mm typ.  
1.25 mm nom.  
0.42 mm nom.  
• P : 0 dBm (0.5 V  
)
Package Dimensions:  
Package Thickness:  
Lead Pitch:  
p–p  
out  
• Low Phase Noise:  
-153 dBc/Hz @ 100 kHz Offset  
• (+) or (-) Single Supply Bias  
Lead Width:  
Operation  
• Wide Bias Supply Range:  
4.5 to 6.5 volt operating range  
1
Absolute Maximum Ratings  
• Differential I/0 with on-chip  
(@ T = 25°C, unless otherwise indicated)  
A
50 Ω matching  
Symbol  
Parameters/Conditions  
Bias supply voltage  
Bias supply voltage  
Bias supply delta  
Min.  
Max.  
Units  
volts  
volts  
volts  
volts  
dBm  
Description  
V
V
V
+7  
CC  
EE  
CC  
The HMMC-3128 is a packaged GaAs  
HBT MMIC pre-scaler which offers  
dc to 12 GHz frequency translation  
for use in communications and EW  
systems incorporating high-frequency  
PLL oscillator circuits and signal-  
path down conversion applications.  
The prescaler provides a large input  
power sensitivity window and low  
phase noise.  
-7  
0
- V  
+7  
EE  
VLogic  
P
Logic threshold voltage  
CW RF input power  
DC input voltage  
V
-1.5  
V
-1.2  
CC  
CC  
+10  
in(CW)  
RFin  
V
(@ RF or RF ports)  
V 0.5 volts  
CC  
in  
in  
2
T
Backside operating temperature -40  
+85  
+165  
310  
°C  
°C  
°C  
BS  
st  
T
T
Storage temperature  
-65  
Maximum assembly temperature  
(60 s max.)  
max  
Notes  
1. Operation in excess of any parameter limit (except T ) may cause permanent damage to the device.  
BS  
6
2. MTTF > 1 x 10 hours @ T ≤ 85°C. Operation in excess of maximum operating temperature (T ) will degrade MTTF.  
BS  
BS  
DC Specifications/Physical Properties  
(T = 25°C, V – V = 5.0 volts, unless otherwise listed)  
A
CC  
EE  
Symbol  
Parameters/Conditions  
Operating bias supply difference1  
Min.  
4.5  
Typ.  
5.0  
44  
Max.  
6.5  
Units  
volts  
mA  
V
– V  
CC  
EE  
|I | or |I  
CC  
|
Bias supply current  
37  
51  
EE  
V
V
Quiescent dc voltage appearing at all RF ports  
V
volts  
CC  
RFin(q)  
RFout(q)  
V
Nominal ECL Logic Level  
Logic  
(V  
contact self-bias voltage, generated on-chip)  
V
-1.45  
V
-1.32  
V
-1.25  
volts  
CC  
CC  
CC  
Logic  
Notes  
1. Prescaler will operate over full specified supply voltage range, V or V not to exceed limits specified in Absolute Maximum Ratings section.  
CC  
EE  
RF Specifications  
(T = 25°C, Z = 50 Ω, V – V = 5.0 volts)  
A
0
CC  
EE  
Symbol  
Parameters/Conditions  
Min.  
Typ.  
14  
Max.  
Units  
GHz  
ƒ
ƒ
Maximum input frequency of operation  
Minimum input frequency of operation1  
12  
in(max)  
in(min)  
0.2  
0.5  
GHz  
(P = -10 dBm)  
in  
ƒ
Output Self-Oscillation Frequency2  
@ dc, (Square-wave input)  
3.4  
GHz  
Self-Osc.  
P
-15  
-15  
-15  
-10  
-5  
> -25  
> -20  
> -20  
> -15  
> -10  
15  
+10  
+10  
+10  
+5  
dBm  
dBm  
dBm  
dBm  
dBm  
dB  
in  
@ ƒ = 500 MHz, (Sine-wave input)  
in  
ƒ
ƒ
ƒ
= 1 to 8 GHz  
= 8 to 10 GHz  
= 10 to 12 GHz  
in  
in  
in  
-1  
RL  
Small-Signal Input/Output Return Loss (@ ƒ < 10 GHz)  
in  
S
Small-Signal Reverse Isolation (@ ƒ < 10 GHz)  
30  
dB  
12  
in  
φ
SSB Phase noise (@ P = 0 dBm, 100 kHz offset from a  
-153  
dBc/Hz  
N
in  
ƒ
= 1.2 GHz Carrier)  
out  
Jitter  
Input signal time variation @ zero-crossing  
(ƒ = 10 GHz, P = -10 dBm)  
1
ps  
ps  
in  
in  
T or T  
r
Output transition time (10% to 90% rise/fall time)  
70  
f
Notes  
1. For sine-wave input signal. Prescaler will operate down to dc for square-wave input signal. Minimum divide frequency limited by input slew-rate.  
2. Prescaler may exhibit this output signal under bias in the absence of an RF input signal. This condition may be eliminated by use of the Input dc offset technique described on page 4.  
2
RF Specifications (Continued)  
(T = 25°C, Z = 50 Ω, V – V = 5.0 volts)  
A
0
CC  
EE  
Symbol  
Parameters/Conditions  
@ ƒ < 1 GHz  
Min.  
-2  
Typ.  
0
Max.  
Units  
dBm  
dBm  
dBm  
volts  
volts  
volts  
dBm  
3
P
out  
out  
@ ƒ = 2.5 GHz  
-3.5  
-4.5  
-1.5  
-2.5  
0.5  
out  
@ ƒ = 3.0 GHz  
out  
4
|V  
P
|
@ ƒ < 1 GHz  
out  
out(p–p)  
@ ƒ = 2.5 GHz  
0.42  
0.37  
-50  
out  
@ ƒ = 3.0 GHz  
out  
ƒ
power level appearing at RF or RF  
in  
in  
in  
out  
Spitback  
(@ ƒ 10 GHz, unused RF or RF unterminated)  
out  
out  
ƒ
power level appearing at RF or RF  
-55  
-30  
dBm  
dBc  
in  
in  
out  
(@ ƒ = 10 GHz, both RF & RF terminated)  
in  
out  
out  
P
Power level of ƒ appearing at RF or RF  
out out  
in  
feedthru  
(@ ƒ = 12 GHz, P = 0 dBm, referred to P (ƒ ))  
in  
in  
in in  
H
Second harmonic distortion output level  
(@ ƒ = 3.0 GHz, referred to P (ƒ ))  
2
-25  
dBc  
out  
out out  
Notes  
3. Fundamental of output square wave's Fourier Series.  
4. Square wave amplitude calculated from P  
.
out  
Due to the presence of an off-chip  
AC-Coupling and DC-Blocking  
Applications  
RF-bypass capacitor inside the package  
All RF ports are dc connected on-chip  
The HMMC-3128 is designed for use in  
high frequency communications, micro-  
wave instrumentation, and EW radar  
systems where low phase-noise PLL  
control circuitry or broad-band frequency  
translation is required.  
(connected to the V contact on the  
CC  
to the V contact through on-chip 50  
CC  
device), and the unique design of the  
device itself, the component may be  
biased from either a single positive  
or single negative supply bias. The  
backside of the package is not dc  
connected to any dc bias point on the  
device.  
ꢀ resistors. Under any bias condi-  
tions where V is not dc grounded  
CC  
the RF ports should be ac coupled via  
series capacitors mounted on the PC  
board at each RF port. Only under bias  
conditions where V is dc grounded  
Operation  
CC  
(as is typical for negative bias supply  
operation) may the RF ports be direct  
coupled to adjacent circuitry or in  
some cases, such as level shifting  
to subsequent stages. In the latter  
case the package heat sink may be  
“floated” and bias applied as the dif-  
The device is designed to operate  
when driven with either a single-ended  
or differential sinusoidal input signal  
over a 200 MHz to 12 GHz bandwidth.  
Below 200 MHz the prescaler input  
is “slew-rate” limited, requiring fast  
rising and falling edge speeds to  
properly divide. The device will operate  
at frequencies down to dc when driven  
with a square-wave.  
For positive supply operation, V pins  
CC  
are nominally biased at any voltage in  
the +4.5 to +6.5 volt range with pin 8  
(V ) grounded. For negative bias op-  
EE  
eration V pins are typically grounded  
CC  
and a negative voltage between -4.5 to  
ference between V and V .  
CC  
EE  
-6.5 volts is applied to pin 8 (V ).  
EE  
3
Input DC Offset  
If an RF signal with sufficient signal  
to noise ratio is present at the RF  
input lead, the prescaler will operate  
and provide a divided output equal the  
input frequency divided by the divide  
modulus. Under certain "ideal" condi-  
tions where the input is well matched  
at the right input frequency, the com-  
ponent may “self-oscillate”, especially  
under small signal input powers or  
with only noise present at the input.  
This “self-oscillation” will produce a  
undesired output signal also known  
as a false trigger. To prevent false  
triggers or self-oscillation conditions,  
apply a 20 to 100 mV dc offset voltage  
between the RF and RF ports. This  
in  
in  
prevents noise or spurious low level  
signals from triggering the divider.  
Figure 1. Simplified Schematic  
Adding a 10 kꢀ resistor between the  
unused RF input to a contact point  
MMIC ESD precautions, handling  
considerations, die attach and bond-  
ing methods are critical factors in suc-  
cessful GaAs MMIC performance and  
reliability.  
unused RF output lead should be ter-  
minated into 50 ꢀ to a contact point  
at the V potential will result in an  
EE  
offset of ≈ 25 mV between the RF  
inputs. Note however, that the input  
sensitivity will be reduced slightly due  
to the presence of this offset.  
at the V potential or to RF ground  
CC  
through a dc blocking capacitor.  
A minimum RF and thermal PC board  
contact area equal to or greater than  
2.67 × 1.65 mm (0.105" × 0.065") with  
eight 0.020" diameter plated-wall  
thermal vias is recommended.  
Agilent application note #54, “GaAs  
MMIC ESD, Die Attach and Bonding  
Guidelines” provides basic information  
on these subjects.  
Assembly Notes  
Independent of the bias applied to the  
package, the backside of the package  
should always be connected to both  
a good RF ground plane and a good  
thermal heat sinking region on the  
PC board to optimize performance.  
For single-ended output operation the  
Moisture Sensitivity Classification:  
Class 1, per JESD22-A112-A.  
Additional References:  
PN #18, "HBT Prescaler Evaluation  
Board."  
4
Symbol  
A
Min.  
1.35  
0.0  
Max.  
1.75  
.25  
A1  
B
0.33  
0.19  
4.80  
3.80  
1.27 BSC  
5.80  
0.40  
0°  
0.51  
.025  
5.00  
4.00  
1.27 BSC  
6.20  
1.27  
8°  
C
D
E
e
H
L
a
Notes:  
All dimensions in millimeters.  
Refer to JEDEC Outline MS-012 for additional tolerances.  
Exposed heat slug area on package bottom = 2.67 x 1.65.  
Exposed heat sink on package bottom must be soldered to  
PCB RF ground plane.  
Figure 2. Package and dimensions  
Figure 3. Assembly diagram (Single-supply, positive-bias configuration shown)  
5
Figure 4. Typical input sensitivity window  
Figure 5. Typical supply current & V  
vs. supply voltage  
Logic  
Figure 7. Typical output power vs. output frequency, ƒ (GHz)  
Figure 6. Typical phase noise performance  
out  
Figure 8. Typical “Spitback” power P(ƒ ) appearing at  
out  
RF input port  
6
Device Orientation  
Tape Dimensions and Product Orientation  
Notes:  
1. 10 sprocket hole pitch cumulative tolerance: 0.2 mm.  
2. Camber not to exceed 1 mm in 100 mm.  
3. Material: Black Conductive Advantek Polystyrene.  
4. Ao and Bo measured on a plane 0.3 mm above the bottom of the pocket.  
5. Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier.  
6. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole.  
7
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This data sheet contains a variety of  
typical and guaranteed performance  
data. The information supplied should  
not be interpreted as a complete list  
of circuit specifi cations. Customers  
considering the use of this, or other  
Agilent GaAs ICs, for their design  
should obtain the current production  
specifi cations from Agilent. In this  
data sheet the term typical refers to  
the 50th percentile performance.  
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Revised: May 7, 2007  
Product specifications and descriptions  
in this document subject to change  
without notice.  
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© Agilent Technologies, Inc. 2007  
Printed in USA, November 26, 2007  
5989-7354EN  

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