LM3842A [HTC]

CURRENT MODE PWM CONTROLLER; 电流模式PWM控制器
LM3842A
型号: LM3842A
厂家: HTC KOREA TAEJIN TECHNOLOGY CO.    HTC KOREA TAEJIN TECHNOLOGY CO.
描述:

CURRENT MODE PWM CONTROLLER
电流模式PWM控制器

控制器
文件: 总7页 (文件大小:356K)
中文:  中文翻译
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LM3842A/3A/4A/5A  
CURRENT MODE PWM CONTROLLER  
FEATURES  
8 SOP/ 8 DIP PIN Configulation  
Compen  
sation  
VREF  
8
7
6
5
● Automatic feed forward compensation  
● Optimized for offline converter  
● Double pulse suppression  
1
2
Voltage  
Feedback  
Vcc  
Current  
Sense  
● Current mode operation to 500 KHz  
● High gain totem pole output  
OUTPUT  
3
4
RT/CT  
GND  
● Internally trimmed bandgap reference  
● Undervoltage lockout with hysteresis  
● Low start up current :< 0.3 mA  
ORDERING INFORMATION  
Device  
Package  
8 SOP  
8 DIP  
LM3842A/3A/4A/5A D  
LM3842A/3A/4A/5A N  
DESCRIPTION  
The LM3842A is fixed frequency current-mode PWM controller. It is specially designed for Off-Line and  
DC-to-DC converter applications with minimal external components.  
This integrated circuit features a trimmed oscillator for precise duty cycle control, a temperature  
compensated reference, high gain error amplifier, current sensing comparator, and a high current  
totempole output ideally suited for driving a power MOSFET.  
Protection circuitry includes built in under-voltage lockout and current limiting.  
SIMPLIFIED BLOCK DIAGRAM  
Vcc  
5V  
Undervoltage  
VREF  
Reference  
Lockout  
R
R
VREF  
Undervoltage  
Lockout  
Vcc  
Oscillator  
RT/CT ④  
VFB ②  
Output  
Ground  
Latching  
PWM  
+
-
Error  
Amplifie  
r
Current  
Sense  
COMP ①  
Input  
ABSOLUTE MAXIMUM RATINGS (TA= 25℃)  
Characteristic  
Power Supply Voltage  
Output Current  
Symbol  
Value  
Unit  
V
Vcc  
I
30  
± 1  
A
VIN  
ISINK  
PD  
Analog Inputes Voltage  
Error Amp Output Sink Current  
-0.3 to 5.5V  
10  
V
mA  
Power Dissipation  
1
W
Storage Temperature Range  
Lead Temperature (soldering 5 sec)  
Tstg  
T
-65 to 150  
260  
HTC  
1
LM3842A/3A/4A/5A  
CURRENT MODE PWM CONTROLLER  
ELECTRICAL CHARACTERISTIC  
(Vcc=15V(Note 1), RT = 10kΩ, CT=3.3nF 0 ≤ TA ≤ 70℃ ; unless otherwise specified)  
Characteristic  
REFERENCE SECTION  
Reference Output Voltage  
Line Regulation  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
VREF  
Vo  
Tj = 25℃, IO=1 mA  
12V ≤ Vcc ≤ 25V  
1mA ≤ Io ≤ 20mA  
TA = 25℃  
4.90 5.00 5.10  
V
2
3
20  
mV  
mV  
Load Regulation  
Vo  
2.5  
Output Short Circuit Current  
OSCILLATOR SECTION  
Normal Frequency  
Isc  
-85 -180 mA  
FOSC  
Sv  
Tj = 25℃  
47  
52  
0.2  
1.6  
57  
1
kHz  
%
Voltage Stability  
12V ≤ Vcc ≤ 25V  
Amplitude  
Vosc  
Vp-p  
ERROR AMPLIFIER SECTION  
Input B Current  
IIB  
-0.1  
-2  
μA  
V
VFB  
Feedback Input Voltage  
Open Loop Voltage Gain  
Power Supplier Rejection Ratio  
Output Sink Current  
Output source Current  
Output Voltage High  
Output Voltage Low  
CURRENT SENSE SECTION  
Input Voltage Gain  
Vo=2.5V  
2.42 2.50 2.58  
AVOL  
PSRREA  
ISI  
2V≤ Vo ≤ 4V  
65  
60  
2
90  
70  
7
dB  
dB  
mA  
mA  
V
12V ≤ Vcc ≤ 25V  
VFB=2.7V, Vo - 1.1V  
V = 2.3V, Vo=5V  
ISO  
-0.5 -1.0  
VOH  
VOL  
VFB=2.7V, RL=15kΩ to GND  
VFB=2.7V, RL=15kΩ to VRGR  
5
6
0.8  
1.1  
V
Av  
(Note 2 & 3)  
Vo=5V (Note 2)  
12V ≤ Vcc ≤ 25V  
2.85  
0.9  
3
1
3.15  
1.1  
V/V  
V
VMAX  
PSRRSC  
IIB  
Maximum Input Signal  
Power Supply Rejection Ratio  
Input Bias Current  
70  
-2  
dB  
μA  
-1.0  
OUTPUT SECTION  
VOL  
VOH  
Isink = 20mA  
Isink = 20mA  
Output Voltage Low  
0.1  
1.5  
13.5  
13.0  
45  
0.4  
2.2  
V
V
Isource = 20mA  
Isource = 20mA  
Tj = 25℃, CL=1nF  
Tj = 25℃, CL=1nF  
Output Voltage High  
13  
12  
V
V
T
T
Rise Time  
150  
150  
nS  
nS  
Fail Time  
35  
UNDERVOLTAGE LOCKOUT SECTION  
Start-up Threshold  
3842A / 3844A  
3843A / 3845A  
3842A / 3844A  
3843A / 3845A  
14.5  
7.8  
8.5  
7.0  
16  
8.4  
10  
17.5  
9
V
V
V
V
Vth  
Minimum Operating Voltage  
(After Turn-On )  
11.5  
8.2  
VCC(MIN)  
7.6  
TOTAL STANDBY CURRENT  
Start-up Current  
Ist  
ICC  
V
0.17  
13  
0.3  
17  
mA  
mA  
V
Vcc=14V  
Operating Supply Current  
Zener Voltage  
38  
Icc = 25mA  
30  
Note: 1. Adjust Vcc above the start threshould before setting at 15V.  
2. Parameter measured at trip point of latch with VFB - 0.  
ΔV Output Compensation(pin FB)  
ΔV Current Sanseinput(pin CS)  
V
A
=
;
3. Comparator Gain defined as:  
HTC  
2
LM3842A/3A/4A/5A  
CURRENT MODE PWM CONTROLLER  
Fig.1 Open Loop Test Circuit  
VREF  
RT  
2N  
A
4.7K  
2222  
V1  
8
7
6
5
COMP  
VFB  
VREF  
1
2
3
4
100K  
0.1  
1K  
E/A  
VC  
1K/1W  
ADJUST  
LM3842A  
0.1  
5K  
ISENSE  
ISENSE  
OUTPUT  
GND  
ADJUST  
OUTPUT  
4.7K  
RT/C  
T
C
T
High peak currents associated with capacitive loads necessitate careful grounding techniques  
Timing and bypass capacitors should be connected close to pin 5 in a single point ground.  
The transistor and 5KΩ potentiometer are used to sample the oscillator waveform and apply an  
adjustable ramp to pin 3.  
Fig.2 Under Voltage Lockout  
ON/OFF COMMAND  
TO REST OF IC  
7
ICC  
LM3842A  
16V  
LM3843A/5A  
8.4V  
< 15mA  
< 1mA  
VON  
VOFF  
10V  
7.6V  
VCC  
VOFF VON  
During Under-Voltage Lock-Out, the output driver is biased to a high impedance state.  
Pin 6 should be shunted to ground with a bleeder resistor to prevent activating the power switch  
with output leakage current.  
Fig.3 Error Amp Configuration  
2.5V  
0.5mA  
+
VFB  
2
1
Zi  
-
Zf  
COMP  
Error amp can source or sink up to 0.5mA  
HTC  
3
LM3842A/3A/4A/5A  
CURRENT MODE PWM CONTROLLER  
Fig.4 Current Sense Circuit  
ERROR  
AMP  
2R  
IS  
R
1V  
CURRENT  
SENSE  
COMP  
1
CURRENT  
COMPARATOR  
SENSE  
R
3
C
RS  
GND  
5
Peak current (IS) is determined by the formula:  
1.0V  
RS  
IS(MAX)  
~
~
A small RC filter may be required to suppress switch transients.  
Fig.5 Oscillator Waveforms and Maximum Duty Cycle  
LARGE RT  
V4  
SMALL CT  
VREF  
8
4
5
RT  
INTERNAL CLOCK  
RT/CT  
LARGE RT  
SMALL CT  
CT  
V4  
GND  
INTERNAL CLOCK  
Oscillator timing capacitor, CT, is charged by VREF through RT, and discharged by an internal  
current source. During the discharge time, the internal clock signal blanks the output to the  
low state. Selection of RT and CT therefore determines both oscillator frequency and maximum  
duty cycle. Charge and discharge times are determined by the formulas:  
tc 0.55 R C  
~
T
T
~
0.0063 RT - 2.7  
0.0063 RT - 4  
td R C ∫n(  
~
)
T
T
Frequency, then, is: f = (tc + td) -1  
1.8  
RT CT  
~
For R >5KΩ, f  
T
~
HTC  
4
LM3842A/3A/4A/5A  
CURRENT MODE PWM CONTROLLER  
Fig.6 Shutdown Techniques  
1K  
VREF  
8
COMP  
1
ISENSE  
3
330Ω  
SHUTDOWN  
500Ω  
SHUTDOWN  
TO CURRENT  
SENSE-RESISTOR  
Shutdown of the LM3842A can be accomplished by two methods; either raise pin 3 above 1V or  
pull pin 1 below a voltage two diode drops above ground. Either method causes the output of the  
PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that  
the output will remain low until the next clock cycle after the shoutdown condition at pins 1 and/or 3  
is removed. In one example, an externally latched shutdown may be accomplished by adding an  
SCR which will be reset by cycling VCC below the lower UVLO threshold. At this point the  
reference turns off, allowing the SCR to reset.  
Fig.7 Slope Compensation  
VREF  
8
0.1μF  
RT  
RT/CT  
4
3
LM3842A  
CT  
R1  
ISENSE  
R2  
ISENSE  
RSENCE  
C
A fraction of the oscillator ramp can be resistively summed with the current sense signal to  
provide slope compensation for converters requiring duty cycles over 50%.  
Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes.  
HTC  
5
LM3842A/3A/4A/5A  
CURRENT MODE PWM CONTROLLER  
Fig.1 Output Dead Time  
Fig.2 Timing Resistor vs Frequency  
100  
30  
10  
3
80  
C =100nF  
T
C =200pF  
T
50  
C =10nF  
T
C =100pF  
T
C =47nF  
T
C =5.0nF  
T
C =2.0nF  
T
20  
C =22nF  
T
C =1.0nF  
T
C =10nF  
T
C =500pF  
T
8.0  
5.0  
C =4.7nF  
T
C =2.2nF  
T
2.0  
0.8  
C =10nF  
T
10k  
20k  
50k100k  
200k  
500k  
1.0M  
fosc, Frequency (kHz)  
100 1k  
10k  
100k  
1M  
fosc, Frequency(Hz)  
Fig.3 Output Saturation Characteristics  
Fig.4 Error Amplifier Open Loop  
Gain and Phase Frequency  
80  
60  
40  
20  
0
0
4
Gain  
VCC=15V  
-45  
-90  
-135  
-180  
TA=25℃  
3
Phase  
2
SOURCE (V -VOH  
CC  
)
1
0
SINK (V )  
OL  
-3  
10  
-1  
2
4
6
8
2
4
6 8  
10  
Io, Output Load Current (A)  
10  
100  
1K  
10K 100K  
1M  
10M  
Fosc, Frequency (Hz)  
PIN FUNCTION DESCRIPTION  
Pin No.  
1
Function  
Description  
Compensation This pin is the Error Amplifier output and is made available for loop  
compensation.  
2
3
4
Voltage  
Feedback  
This is the inverting input of the Error Amplitier. It is normally connected  
to the switching power supply output through a resister divider.  
Current Sense A voltage proportional to inductor current is connected to this input.  
The PWM uses this information to terminate the output switch conduction.  
The Oscillator frequency and maximum Output duty cycle are  
programmed by connecting resistor RT to VREF and capacitor CT  
RT/CT  
to ground. Operation to 500kHz is possible.  
5
6
GND  
Output  
This pin is the combined control circuitry and power ground.  
This output directly drives the gate of a power MOSFET. Peak currents  
up to 1.0A are sourced and sunk by this pin.  
7
8
Vcc  
VREF  
This pin is the positive supply of the control IC.  
This is the reference output. It provides charging current for capacitor  
CT through resistor RT.  
HTC  
6

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