GM76U256CLEFW-12

更新时间:2024-09-18 03:10:23
品牌:HYNIX
描述:x8 SRAM

GM76U256CLEFW-12 概述

x8 SRAM X8 SRAM\n SRAM

GM76U256CLEFW-12 规格参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP28,.5针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.84
Is Samacsys:N最长访问时间:120 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G28
长度:18.3895 mm内存密度:262144 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-25 °C组织:32KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP28,.5
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3 V认证状态:Not Qualified
座面最大高度:2.794 mm最小待机电流:2 V
子类别:SRAMs最大压摆率:0.03 mA
最大供电电压 (Vsup):3.3 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.6865 mmBase Number Matches:1

GM76U256CLEFW-12 数据手册

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GM76U256C Series  
32Kx8bit CMOS SRAM  
Document Title  
32K x8 bit 3.0V Low Power CMOS slow SRAM  
Revision History  
Revision No History  
Draft Date  
Remark  
Final  
00  
Revision History Insert  
Revised  
Jul.08.2000  
-
-
-
Datasheet format change  
PDIP package type insert  
Pin configuration change  
01  
02  
Marking Information Add  
Revised  
Dec.04.2000  
Apr.30.2001  
Final  
Final  
-
AC Test Condition Add : 5pF Test Load  
Changed Logo  
-
HYUNDAI -> hynix  
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility  
for use of circuits described. No patent licenses are implied.  
Rev 02 / Apr. 2001  
Hynix Semiconductor  
GM76U256C Series  
DESCRIPTION  
FEATURES  
The GM76U256C is a high-speed, low power and  
32,786 X 8-bits CMOS Static Random Access  
·
·
·
·
Fully static operation and Tri-state output  
TTL compatible inputs and outputs  
Low power consumption  
Battery backup(L/LL-part)  
- 2.0V(min.) data retention  
Standard pin configuration  
- 28 pin 600mil PDIP  
- 28 pin 330mil SOP  
- 28 pin 8x13.4 mm TSOP-I  
(Standard)  
Memory fabricated using  
Hynix's high  
performance CMOS process technology. It is  
suitable for use in low voltage operation and  
battery back-up application. This device has a  
data retention mode that guarantees data to  
remain valid at the minimum power supply  
voltage of 2.0 volt.  
·
Product  
No.  
GM76U256C  
GM76U256CE  
Voltage  
(V)  
Speed  
(ns)  
100/120  
100/120  
Operation  
Current(mA)  
Standby Current(uA)  
Temperature  
(°C)  
0~70(Normal)  
-25~85(Extended)  
L
LL  
10  
15  
3.3  
3.3  
2
2
20  
30  
Note 1. Current value is max.  
PIN CONNECTION  
Vcc  
A14  
A12  
A7  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A14  
A12  
A7  
Vcc  
/WE  
A13  
A8  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
/WE  
A13  
A8  
/OE  
A11  
A9  
A10  
3
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
3
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
Vss  
I/O3  
I/O2  
I/O1  
A0  
A6  
4
A6  
4
3
A5  
A9  
5
A5  
A9  
5
A8  
4
A4  
A11  
/OE  
A10  
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
6
A11  
/OE  
A10  
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
A4  
6
A13  
/WE  
Vcc  
A14  
A12  
A7  
5
A3  
7
A3  
7
6
A2  
8
A2  
7
8
A1  
8
9
A1  
9
9
A0  
A0  
10  
11  
12  
13  
14  
10  
11  
12  
13  
14  
10  
11  
12  
13  
14  
I/O1  
I/O2  
I/O3  
Vss  
I/O1  
I/O2  
I/O3  
Vss  
A6  
A5  
A4  
A1  
A3  
A2  
PDIP  
SOP  
TSOP-I(Standard)  
PIN DESCRIPTION  
BLOCK DIAGRAM  
ROW DECODER  
I/O1  
A0  
Pin Name  
Pin Function  
Chip Select  
Write Enable  
/CS  
/WE  
MEMORY ARRAY  
512x512  
/OE  
Output Enable  
Address Inputs  
Data Input/Output  
Power(+5.0V)  
Ground  
A0 ~ A14  
I/O1 ~ I/O8  
Vcc  
A14  
I/O8  
/CS  
Vss  
/OE  
/WE  
Rev 02 / Apr. 2001  
2
GM76U256C Series  
ORDERING INFORMATION  
Part No.  
GM76U256CL  
GM76U256CLL  
Speed  
100/120  
100/120  
100/120  
100/120  
100/120  
100/120  
100/120  
100/120  
100/120  
100/120  
100/120  
100/120  
Power  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
Temp  
Package  
PDIP  
PDIP  
PDIP  
PDIP  
SOP  
SOP  
SOP  
SOP  
0 to 70°C  
0 to 70°C  
-25 to 85°C  
-25 to 85°C  
0 to 70°C  
0 to 70°C  
-25 to 85°C  
-25 to 85°C  
0 to 70°C  
0 to 70°C  
-25 to 85°C  
-25 to 85°C  
GM76U256CLE  
GM76U256CLLE  
GM76U256CLFW  
GM76U256CLLFW  
GM76U256CLEFW  
GM76U256CLLEFW  
GM76U256CLT  
GM76U256CLLT  
GM76U256CLET  
GM76U256CLLET  
TSOP-I Standard  
TSOP-I Standard  
TSOP-I Standard  
TSOP-I Standard  
LL-part  
ABSOLUTE MAXIMUM RATING (1)  
Symbol  
Vcc, VIN, VOUT  
TA  
Parameter  
Power Supply, Input/Output Voltage  
Rating  
-0.3 to 4.6  
0 to 70  
-25 to 85  
-65 to 150  
1.0  
Unit  
V
°C  
°C  
°C  
Operating Temperature  
GM76U256C  
GM76U256CE  
TSTG  
PD  
Storage Temperature  
Power Dissipation  
W
IOUT  
TSOLDER  
Data Output Current  
Lead Soldering Temperature & Time  
50  
260 ·10  
mA  
°C·sec  
Note  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent  
damage to the device. This is stress rating only and the functional operation of the device under these or  
any other conditions above those indicated in the operation of this specification is not implied.  
Exposure to the absolute maximum rating conditions for extended period may affect reliability.  
RECOMMENDED DC OPERATING CONDITIONS  
Symbol  
Vcc  
Vss  
VIH  
VIL  
Parameter  
Power Supply Voltage  
Ground  
Input High Voltage  
Input Low Voltage  
Min.  
2.7  
0
2.2  
-0.3(1)  
Typ.  
3.0  
0
-
-
Max.  
3.3  
0
Vcc+0.3  
0.4  
Unit  
V
V
V
V
Note  
1. VIL = -3.0V for pulse width less than 50ns  
TRUTH TABLE  
/CS  
H
L
L
L
/WE /OE  
Mode  
Standby  
Output Disabled High-Z  
I/O Operation  
High-Z  
X
H
H
L
X
H
L
Read  
Write  
Data Out  
Data In  
X
Note  
1. H=VIH, L=VIL, X=Don't Care  
Rev 02 / Apr. 2001  
2
GM76U256C Series  
DC CHARACTERISTICS  
Vcc = 3.0V ±10%, TA = 0°C to 70°C (Normal)/-25°C to 85°C (Extended), unless otherwise specified.  
Symbol  
ILI  
ILO  
Parameter  
Input Leakage Current  
Output Leakage Current  
Test Condition  
Vss < VIN < Vcc  
Vss < VOUT < Vcc, /CS = VIH or  
/OE = VIH or /WE = VIL  
/CS = VIL,  
VIN = VIH or VIL, II/O = 0mA  
/CS = VIL, VIN = VIH or VIL,  
Min. Duty Cycle = 100%, II/O = 0mA  
/CS = VIL, VIN = VIH or VIL,  
Cycle = 1us , II/O = 0mA  
/CS= VIH,  
Min. Typ. Max. Unit  
-1  
-1  
-
-
1
1
uA  
uA  
Icc  
Operating Power Supply  
Current  
Average Operating Current  
-
-
-
-
-
-
-
-
2
30  
5
mA  
mA  
mA  
mA  
ICC1  
ICC2  
ISB  
Average Operating Current  
TTL Standby Current  
(TTL Inputs)  
0.3  
VIN = VIH or VIL  
ISB1  
CMOS Standby Current  
(CMOS Inputs)  
/CS > Vcc - 0.2V  
VIN > Vcc - 0.2V or  
VIN < Vss + 0.2V  
L
-
-
-
-
-
-
-
-
-
-
-
20  
10  
30  
15  
0.4  
-
uA  
uA  
uA  
uA  
V
LL  
LE  
LLE  
VOL  
VOH  
Output Low Voltage  
Output High Voltage  
IOL = 2.1mA  
IOH = -1.0mA  
2.4  
V
Note : Typical values are at Vcc =3.0V, TA = 25°C  
AC CHARACTERISTICS(I)  
Vcc = 3.0V ±10%, TA = 0°C to 70°C (Normal) / -25°C to 85°C (Extended) unless otherwise specified.  
-10  
Max. Min  
-12  
Max.  
Unit  
#
Symbol  
Parameter  
Min.  
READ CYCLE  
1
2
3
4
5
6
7
8
9
tRC  
tAA  
tACS  
tOE  
tCLZ  
tOLZ  
tCHZ  
tOHZ  
tOH  
Read Cycle Time  
Address Access Time  
Chip Select Access Time  
Output Enable to Output Valid  
Chip Select to Output in Low Z  
Output Enable to Output in Low Z  
Chip Disable to Output in High Z  
Out Disable to Output in High Z  
Output Hold from Address Change  
100  
-
-
-
10  
5
0
0
15  
-
100  
100  
50  
-
120  
-
-
-
10  
5
0
0
15  
-
120  
120  
60  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
-
-
35  
35  
-
40  
40  
-
WRITE CYCLE  
10 tWC  
11 tCW  
12 tAW  
13 tAS  
14 tWP  
15 tWR  
16 tWHZ  
17 tDW  
18 tDH  
19 tOW  
Write Cycle Time  
100  
80  
80  
0
70  
0
0
40  
0
-
-
-
-
-
-
30  
-
-
-
120  
100  
100  
0
85  
0
0
50  
0
-
-
-
-
-
-
40  
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Selection to End of Write  
Address Valid to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Write to Output in High Z  
Data to Write Time Overlap  
Data Hold from Write Time  
Output Active from End of Write  
10  
10  
Rev 02 / Apr. 2001  
3
GM76U256C Series  
AC TEST CONDITIONS  
TA = 0°C to 70°C (Normal) / -25°C to 85°C (Extended) unless otherwise specified.  
Parameter  
Value  
Input Pulse Level  
Input Rise and Fall Time  
0.4V to 2.2V  
5ns  
Input and Output Timing Reference Level  
1.5V  
Output Load  
tCLZ,tOLZ,tCHZ,tOHZ,tWHZ,tOW  
Others  
CL = 5pF + 1TTL Load  
CL = 100pF + 1TTL Load  
AC TEST LOADS  
TTL  
CL(1)  
Note : Including jig and scope capacitance  
CAPACITANCE  
TA = 25°C, f = 1.0MHz  
Symbol  
CIN  
CI/O  
Parameter  
Input Capacitance  
Input /Output Capacitance  
Condition  
VIN = 0V  
VI/O = 0V  
Max.  
6
8
Unit  
pF  
pF  
Note : These parameters are sampled and not 100% tested  
Rev 02 / Apr. 2001  
4
GM76U256C Series  
TIMING DIAGRAM  
READ CYCLE 1  
tRC  
ADDR  
OE  
tAA  
tOE  
tOH  
tOLZ  
CS  
tACS  
tCLZ  
tOHZ  
tCHZ  
High-Z  
Data  
Out  
Data Valid  
Note(READ CYCLE):  
1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and arenot  
referenced to output voltage levels.  
2. At any given temperature and voltage condition, tCHZ max. is less than tCLZ min. both for a given device  
and from device to device.  
3. /WE is high for the read cycle.  
READ CYCLE 2  
tRC  
ADDR  
tAA  
tOH  
tOH  
Data  
Out  
Previous Data  
Data Valid  
Note(READ CYCLE):  
1. /WE is high for the read cycle.  
2. Device is continuously selected /CS= VIL.  
3. /OE =VIL.  
Rev 02 / Apr. 2001  
5
GM76U256C Series  
WRITE CYCLE 1(/OE Clocked)  
tWC  
ADDR  
OE  
tAW  
tCW  
CS  
tAS  
tWR  
tWP  
WE  
tDW  
tDH  
Data Valid  
Data In  
tOHZ  
Data  
Out  
WRITE CYCLE 2 (/OE Low Fixed)  
tWC  
ADDR  
tAW  
tCW  
tWR  
CS  
tAS  
tWP  
WE  
tDW  
tDH  
Data Valid  
tOW  
Data In  
tWHZ  
(8)  
(7)  
Data  
Out  
Rev 02 / Apr. 2001  
6
GM76U256C Series  
Notes(WRITE CYCLE):  
1. A write occurs during the overlap of a low /CS and a low /WE. A write begins at the latest transition  
among /CS going low and /WE going low: A write ends at the earliest transition among /CS going high  
and /WE going high. tWP is measured from the beginning of write to the end of write.  
2. tCW is measured from the later of /CS going low to the end of write .  
3. tAS is measured from the address valid to the beginning of write.  
4. tWR is measured from the end of write to the address change. tWR is applied in case a write ends as /CS,  
or /WE going high.  
5. If /OE and /WE are in the read mode during this period, and the I/O pins are in the output low-Z state,  
input of opposite phase of the output must not be applied because bus contention can occur.  
6. If /CS goes low simultaneously with /WE going low, or after /WE going low, the outputs remain in high  
impedance state.  
7. DOUT is the same phase of the latest written data in this write cycle.  
8. DOUT is the read data of the new address.  
DATA RETENTION CHARACTERISTIC  
TA=0°C to 70°C (Normal)  
Symbol  
VDR  
Parameter  
Vcc for Data Retention  
Test Condition  
CS>Vcc-0.2V,  
VIN>Vcc-0.2V or VIN<Vss+0.2V  
Min  
2.0  
Typ Max Unit  
-
-
V
ICCDR  
Data Retention Current  
Vcc=3.0V,  
L
-
-
-
-
0
1
0.5  
1
0.5  
-
15  
7
20  
10  
-
uA  
uA  
uA  
uA  
ns  
/CS>Vcc - 0.2V,  
VIN>Vcc - 0.2V or  
VIN< Vss + 0.2V  
See Data Retention  
LL  
LE  
LLE  
tCDR  
Chip Deselect to Data  
Retention Time  
tR  
Operating Recovery Time  
Timing Diagram  
tRC(2)  
-
-
ns  
Notes  
1. Typical values are under the condition of TA = 25°C.  
2. tRC is read cycle time.  
DATA RETENTION TIMING DIAGRAM  
DATA RETENTION MODE  
VCC  
2.7V  
tCDR  
tR  
2.2V  
VDR  
CS>VCC-0.2V  
CS  
VSS  
Rev 02 / Apr. 2001  
7
GM76U256C Series  
PACKAGE INFORMATION  
28pin 600mil Dual In-Line Package(Blank)  
MAX.  
UNIT : INCH(mm)  
MIN.  
1.467(37.262)  
1.447(36.754)  
0.600(15.240)BSC  
0.065(1.650)  
0.050(1.270)  
0.090(2.286)  
0.070(1.778)  
0.550(13.970)  
0.530(13.462)  
0.155(3.937)  
0.145(3.683)  
0.035(0.889)  
0.020(0.508)  
0.140(3.556)  
3 deg  
11 deg  
0.014(0.356)  
0.021(0.533)  
0.015(0.381)  
0.120(3.048)  
0.100(2.54)BSC  
0.008(0.200)  
28pin 330mil Small Outline Package(FW)  
MAX  
MIN.  
UNIT : INCH(mm)  
0.346(8.788)  
0.338(8.585)  
0.480(12.192)  
0.460(11.684)  
0.110(2.794)  
0.094(2.388)  
0.728(18.491)  
0.720(18.288)  
0.012(0.305)  
0.008(0.203)  
0.014(0.356)  
0.002(0.051)  
0.050(1.270)  
0.030(0.762)  
0.050(1.270)BSC  
0.020(0.508)  
0.014(0.356)  
Rev 02 / Apr. 2001  
8
GM76U256C Series  
28pin 8x13.4mm Thin Small Outline Package Standard(T)  
MAX.  
MIN.  
UNIT : INCH(mm)  
0.468(11.9)  
0.460(11.7)  
0.536(13.6)  
0.520(13.2)  
0.319(8.1)  
0.311(7.9)  
0.040(1.02)  
0.036(0.91)  
0.008(0.20)  
0.002(0.05)  
0.008(0.2)  
0.027(0.7)  
0.022(0.55 BSC)  
0.004(0.1)  
0.012(0.3)  
Rev 02 / Apr. 2001  
9
GM76U256C Series  
MARKING INFORMATION  
Package  
Marking Example  
H
Y
M
y
U
7
N
6
D
U
A
2
I
G
5
6
C
c
c
-
s
s
t
PDIP  
y
w
w
K
O
R
E
A
H
Y
M
y
U
7
N
6
D
U
A
2
I
G
5
6
C
E
c
c
F
W
s
s
t
SOP  
y
w
w
K
O
R
A
H
Y
M
y
U
7
N
6
D
U
A
2
I
G
5
6
C
E
c
c
T
s
s
t
TSOP-I  
y
w
w
K
O
R
A
Index  
HYUNDAI  
KOREA  
GM76U256C  
cc  
: Hynix Logo  
: Origin Country  
: Part Name  
: Power Consumption  
- L  
- LL  
: Low Power  
: Low Low Power  
Blank / FW / T  
: Package Type  
- Blank  
- FW  
: DIP  
: SOP  
: TSOP-I  
- T  
ss  
: Speed  
- 10  
: 100ns  
: 150ns  
- 12  
t  
: Temperature  
- Blank  
- E  
: Commercial ( 0 ~ 70 °C )  
: Extended ( -25 ~ 85 °C )  
yy  
ww  
: Year ( ex : 00 = year 2000, 01 = year 2001 )  
: Work Week ( ex : 12 = ww12 )  
Note  
- Capital Letter  
: Fixed Item  
- Small Letter  
: Non-fixed Item  
Rev 02 / Apr. 2001  
10  

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GM76U256CLET-85 ETC x8 SRAM 获取价格
GM76U256CLFW HYNIX 32K x8 bit 3.0V Low Power CMOS slow SRAM 获取价格
GM76U256CLFW-10 HYNIX x8 SRAM 获取价格
GM76U256CLFW-12 HYNIX x8 SRAM 获取价格
GM76U256CLFW-85 ETC x8 SRAM 获取价格
GM76U256CLL HYNIX 32K x8 bit 3.0V Low Power CMOS slow SRAM 获取价格

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