HY62SF16201ALLM-15 [HYNIX]
Standard SRAM, 128KX16, 150ns, CMOS, PBGA48, MICRO, CSP, BGA-48;
| 型号： | HY62SF16201ALLM-15 |
| 厂家： | 
HYNIX SEMICONDUCTOR |
| 描述： | Standard SRAM, 128KX16, 150ns, CMOS, PBGA48, MICRO, CSP, BGA-48 静态存储器 |
| 文件： | 总13页 (文件大小：204K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HY62UF16201A/ HY62QF16201A/ HY62EF16201A/
HY62SF16201A Series 128Kx16bit full CMOS SRAM
PRELIMINARY
FEATURES
DESCRIPTION
The HY62UF16201A
/
HY62QF16201A
/
·
·
·
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup(LL/SL-part)
- 1.5V(min) data retention
Standard pin configuration
- 48ball CSP
HY62EF16201A / HY62SF16201A is a high
speed, super low power and 2Mbit full CMOS
SRAM organized as 131,072 words by 16bits. The
HY62UF16201A
/
HY62QF16201A
/
·
HY62EF16201A / HY62SF16201A uses high
performance full CMOS process technology and
is designed for high speed and low power circuit
technology. It is particularly well-suited for the
high density low power system application. This
device has a data retention mode that guarantees
data to remain valid at a minimum power supply
voltage of 1.5V.
Product
No.
Voltage
(V)
Speed
(ns)
55/70/85
Operation
Current(mA)
Standby Current(uA)
Temperature
(°C)
LL
10
10
10
10
10
10
10
10
SL
2
2
2
2
2
2
2
2
HY62UF16201A
HY62UF16201A-I
HY62QF16201A
HY62QF16201A-I
HY62EF16201A
HY62EF16201A-I
HY62SF16201A
HY62SF16201A-I
3.0
3.0
2.5
2.5
2.0
2.0
1.8
1.8
15
15
10
10
10
10
10
10
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
55/70/85
70/85/100
70/85/100
85/100/120
85/100/120
100/120/150
100/120/150
Note 1. E.T. : Extended Temperature, Normal : Normal Temperature
2. Current value is max.
PIN CONNECTION (Top View )
BLOCK DIAGRAM
A1,A2
ROW
DECODER
A4, A6~A7
I/O1
A9
A12
A15~A16
A8
/LB /OE A0 A1 A2 NC
IO9 /UB A3 A4 /CS IO1
IO10 IO11 A5 A6 IO2 IO3
Vss IO12 NC A7 IO4 Vcc
Vcc IO13 NC A16 IO5 Vss
IO15 IO14 A14 A15 IO6 IO7
IO16 NC A12 A13 /WE IO8
NC A8 A9 A10 A11 NC
I/O8
I/O9
A10
MEMORY ARRAY
512x128x32
A13
A14
A0
A3
I/O16
A5
A11
/CS
/OE
/LB
/UB
/WE
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
Pin Funtion
Chip Select
Write Enable
Output Enable
Lower Byte Control(I/O1~I/O8)
Pin Name
Pin Funtion
Data Input/Output
Address Input
Power(3.0V/2.5V/2.0V/1.8V)
Ground
I/O1~I/O16
A0~A16
Vcc
Vss
/UB
Upper Byte Control(I/O9~I/O16) NC
No Connection
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.01 /Feb. 99
Hyundai Semiconductor
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
ORDERING INFORMATION
Part No.
HY62UF16201ALLM
HY62UF16201ASLM
HY62UF16201ALLM-I 55/70/85
HY62UF16201ASLM-I 55/70/85
HY62QF16201ALLM
HY62QF16201ASLM
HY62QF16201ALLM-I 70/85/100
HY62QF16201ASLM-I 70/85/100
HY62EF16201ALLM
HY62EF16201ASLM
HY62EF16201ALLM-I 85/100/120
HY62EF16201ASLM-I 85/100/120
HY62SF16201ALLM
HY62SF16201ASLM
Speed
55/70/85
55/70/85
Power
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
Temp.
Package
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
CSP
E.T.
E.T.
70/85/100
70/85/100
E.T.
E.T.
85/100/120
85/100/120
E.T.
E.T.
100/120/150
100/120/150
HY62SF16201ALLM-I 100/120/150
HY62SF16201ASLM-I 100/120/150
E.T.
E.T.
Note 1. E.T. : Extended Temperature, Blank : Normal Temperature
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
VIN, VOUT
Vcc
Parameter
Input/Output Voltage
Power Supply
Rating
-0.2 to 3.6
-0.2 to 4.6
0 to 70
Unit
V
V
Remark
TA
Operating Temperature
HY62UF16201A
HY62QF16201A
HY62EF16201A
HY62SF16201A
HY62UF16201A-I
HY62QF16201A-I
HY62EF16201A-I
HY62SF16201A-I
°C
-40 to 85
°C
TSTG
PD
Storage Temperature
Power Dissipation
-55 to 150
1.0
°C
W
TSOLDER
Ball Soldering Temperature & Time
260 · 10
°C·sec
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
Rev.01 / Feb. 99
2
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
RECOMMENDED DC OPERATING CONDITION
Symbol
Vcc
Parameter
Supply Voltage
Product
Min.
2.7
2.2
1.8
1.6
0
Typ.
3.0
2.5
2.0
1.8
0
Max.
3.6
2.8
2.2
2.0
0
Unit
V
V
HY62UF16201A-(I)
HY62QF16201A-(I)
HY62EF16201A-(I)
HY62SF16201A-(I)
HY62UF16201A-(I)
HY62QF16201A-(I)
HY62EF16201A-(I)
HY62SF16201A-(I)
V
Vss
VIH
Ground
V
Input High Voltage HY62UF16201A-(I)
HY62QF16201A-(I)
2.2
2.0
1.6
1.4
-0.3(1)
-
-
-
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
0.4
V
V
V
V
V
HY62EF16201A-(I)
HY62SF16201A-(I)
VIL
Input Low Voltage HY62UF16201A-(I)
HY62QF16201A-(I)
-
HY62EF16201A-(I)
HY62SF16201A-(I)
Note : 1. VIL = -1.5V for pulse width less than 30ns
TRUTH TABLE
I/O Pin
Supply Current
Mode
/LB
/CS /WE
/OE
/UB
I/O1~I/O8
Hi-Z
I/O9~I/O16
Hi-Z
H
L
L
L
X
H
X
H
X
H
X
L
X
X
H
L
H
L
L
H
L
X
X
H
H
L
L
H
L
Not Selected
Output Disabled
Not Selected
Read
ISB, ISB1
Icc
ISB, ISB1
Hi-Z
Hi-Z
DOUT
Hi-Z
DOUT
DIN
Hi-Z
Hi-Z
Hi-Z
DOUT
DOUT
Hi-Z
DIN
DIN
Icc1
Icc1
L
L
X
Write
Hi-Z
DIN
L
Note:
1. H=VIH, L=VIL, X=don't care
2. UB, LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8.
When UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16.
Rev.01 / Feb. 99
3
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
DC ELECTRICAL CHARACTERISTICS
Vcc = 2.7V~3.6V/2.5V±10%/2.0V±10%/1.8V±10%, TA = 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.)
Sym
ILI
ILO
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
Vss < VIN < Vcc
Vss < VOUT < Vcc, /CS = VIH or
/OE = VIH or /WE = VIL
Min Typ Max Unit
-1
-1
-
-
1
1
uA
uA
/UB = VIH or /LB = VIH
Icc
Operating HY62UF16201A-(I) /CS = VIL,
Vcc = 3.0V
-
-
8
5
15
10
mA
mA
Power
HY62QF16201A-(I) VIN = VIH or VIL Vcc = 2.5V/2V/
Supply
Current
Average
HY62EF16201A-(I) II/O = 0mA
HY62SF16201A-(I)
HY62UF16201A-(I) /CS = VIL, Min Duty Cycle = 100%
1.8V
ICC1
ISB
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
80
60
40
35
1
0.5
0.5
0.5
2
mA
mA
mA
mA
mA
mA
mA
mA
uA
Operating HY62QF16201A-(I) II/O = 0mA
Current
HY62EF16201A-(I)
HY62SF16201A-(I)
HY62UF16201A-(I) /CS = VIH or /CS = VIL,
HY62QF16201A-(I) /UB, /LB = VIH
HY62EF16201A-(I)
TTL
Standby
Current
(TTL Input)
HY62SF16201A-(I)
ISB1
VOL
Standby Current
(CMOS Input)
Output
Low
/CS > Vcc - 0.2V or /CS < Vss
+ 0.2V, /UB, /LB > Vcc - 0.2V
IOL = 2.1mA
SL
LL
10
0.4
uA
V
HY62UF16201A-(I) Vcc = 3.0V
HY62QF16201A-(I) Vcc = 2.5V
IOL = 0.5mA
IOL = 0.33mA
IOL = 0.26mA
IOH = -1.0mA
IOH = -0.5mA
IOH = -0.44mA
IOH = -0.44mA
Voltage
HY62EF16201A-(I) Vcc = 2.0V
HY62SF16201A-(I) Vcc = 1.8V
HY62UF16201A-(I) Vcc = 3.0V
HY62QF16201A-(I) Vcc = 2.5V
HY62EF16201A-(I) Vcc = 2.0V
HY62SF16201A-(I) Vcc = 1.8V
VOH
Output
High
Voltage
2.2
2.0
1.6
1.4
-
-
-
-
-
-
-
-
V
V
V
V
Note : Typical values are at Vcc = 3.0V/2.5V/2.0V/1.8V, TA = 25°C
Rev.01 / Feb. 99
4
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
AC CHARACTERISTICS
Vcc = 2.7V~3.6V, TA = 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-55
Max. Min.
-70
Max. Min
-85
Max.
#
Symbol
Parameter
Unit
Min.
READ CYCLE
1
2
3
4
5
6
7
8
9
tRC
tAA
tACS
tOE
tBA
tCLZ
tOLZ
tBLZ
tCHZ
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/LB, /UB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/LB, /UB Enable to Output in Low Z
Chip Deselection to Output in High Z
Out Disable to Output in High Z
/LB, /UB Disable to Output in High Z
Output Hold from Address Change
55
-
-
-
-
10
5
5
0
0
-
70
-
-
-
-
10
5
5
0
0
-
85
-
-
-
-
10
5
5
0
0
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
55
55
35
55
-
-
-
30
30
30
-
70
70
40
70
-
-
-
30
30
30
-
85
85
45
85
-
-
-
30
30
30
-
10 tOHZ
11 tBHZ
12 tOH
0
10
0
10
0
10
WRITE CYCLE
13 tWC
14 tCW
15 tAW
16 tBW
17 tAS
18 tWP
19 tWR
20 tWHZ
21 tDW
22 tDH
23 tOW
Write Cycle Time
55
50
50
50
0
45
0
0
-
-
-
-
-
-
-
20
-
-
70
60
60
60
0
50
0
0
-
-
-
-
-
-
-
25
-
-
85
70
70
70
0
55
0
0
-
-
-
-
-
-
-
30
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Selection to End of Write
Address Valid to End of Write
/LB, /UB Valid to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
25
0
5
30
0
5
35
0
5
-
-
-
Rev.01 / Feb. 99
5
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
Vcc = 2.5V±10%, TA = 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-70
Max. Min.
-85
Max. Min
-10
Max.
#
Symbol
Parameter
Unit
Min.
READ CYCLE
1
2
3
4
5
6
7
8
9
tRC
tAA
tACS
tOE
tBA
tCLZ
tOLZ
tBLZ
tCHZ
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/LB, /UB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/LB, /UB Enable to Output in Low Z
Chip Deselection to Output in High Z
Out Disable to Output in High Z
/LB, /UB Disable to Output in High Z
Output Hold from Address Change
70
-
-
-
-
10
5
5
0
0
-
85
-
-
-
-
10
5
5
0
0
-
100
-
-
-
-
20
5
5
0
0
-
100
100
50
100
-
-
-
30
30
30
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
70
70
40
70
-
-
-
30
30
30
-
85
85
45
85
-
-
-
30
30
30
-
10 tOHZ
11 tBHZ
12 tOH
0
10
0
10
0
15
WRITE CYCLE
13 tWC
14 tCW
15 tAW
16 tBW
17 tAS
18 tWP
19 tWR
20 tWHZ
21 tDW
22 tDH
23 tOW
Write Cycle Time
70
60
60
60
0
50
0
0
-
-
-
-
-
-
-
25
-
-
85
70
70
70
0
55
0
0
-
-
-
-
-
-
-
30
-
-
100
80
80
80
0
75
0
0
-
-
-
-
-
-
-
35
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Selection to End of Write
Address Valid to End of Write
/LB, /UB Valid to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
30
0
5
35
0
5
45
0
10
-
-
-
Rev.01 / Feb. 99
6
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
Vcc = 2.0V±10%, TA = 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-85
Max. Min.
-10
Max. Min
-12
Max.
#
Symbol
Parameter
Unit
Min.
READ CYCLE
1
2
3
4
5
6
7
8
9
tRC
tAA
tACS
tOE
tBA
tCLZ
tOLZ
tBLZ
tCHZ
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/LB, /UB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/LB, /UB Enable to Output in Low Z
Chip Deselection to Output in High Z
Out Disable to Output in High Z
/LB, /UB Disable to Output in High Z
Output Hold from Address Change
85
-
-
-
-
10
5
5
0
0
-
100
-
-
-
-
20
5
5
0
0
-
100
100
50
100
-
-
-
30
30
30
-
120
-
-
-
-
20
10
10
0
0
0
-
120
120
60
120
-
-
-
40
40
40
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
85
85
45
85
-
-
-
30
30
30
-
10 tOHZ
11 tBHZ
12 tOH
0
10
0
15
15
WRITE CYCLE
13 tWC
14 tCW
15 tAW
16 tBW
17 tAS
18 tWP
19 tWR
20 tWHZ
21 tDW
22 tDH
23 tOW
Write Cycle Time
85
70
70
70
0
55
0
0
-
-
-
-
-
-
-
30
-
-
100
80
80
80
0
75
0
0
-
-
-
-
-
-
-
35
-
-
120
100
100
100
0
85
0
0
-
-
-
-
-
-
-
40
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Selection to End of Write
Address Valid to End of Write
/LB, /UB Valid to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
35
0
5
45
0
10
50
0
10
-
-
-
Rev.01 / Feb. 99
7
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
Vcc = 1.8V±10%, TA = 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-10
Max. Min.
-12
Max. Min
-15
Max.
#
Symbol
Parameter
Unit
Min.
READ CYCLE
1
2
3
4
5
6
7
8
9
tRC
tAA
tACS
tOE
tBA
tCLZ
tOLZ
tBLZ
tCHZ
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/LB, /UB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/LB, /UB Enable to Output in Low Z
Chip Deselection to Output in High Z
Out Disable to Output in High Z
/LB, /UB Disable to Output in High Z
Output Hold from Address Change
100
-
-
-
-
20
5
5
0
0
-
100
100
50
100
-
-
-
30
30
30
-
120
-
-
-
-
20
10
10
0
0
0
-
120
120
60
120
-
-
-
40
40
40
-
150
-
-
-
-
20
10
10
0
0
0
-
150
150
75
150
-
-
-
50
50
50
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10 tOHZ
11 tBHZ
12 tOH
0
15
15
15
WRITE CYCLE
13 tWC
14 tCW
15 tAW
16 tBW
17 tAS
18 tWP
19 tWR
20 tWHZ
21 tDW
22 tDH
23 tOW
Write Cycle Time
100
80
80
80
0
75
0
0
-
-
-
-
-
-
-
35
-
-
120
100
100
100
0
85
0
0
-
-
-
-
-
-
-
40
-
-
150
120
120
120
0
100
0
0
-
-
-
-
-
-
-
50
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Selection to End of Write
Address Valid to End of Write
/LB, /UB Valid to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
45
0
10
50
0
10
60
0
10
-
-
-
AC TEST CONDITIONS
TA = 0°C to 70°C (Normal) / -40°C to 85°C (E.T.), unless otherwise specified
PARAMETER Value
0.4V to 2.2V
Input Pulse Level
HY62UF16201A-(I)
HY62QF16201A-(I)
HY62EF16201A-(I)
HY62SF16201A-(I)
0.4V to 2.2V
0.4V to 1.8V
0.4V to 1.6V
Input Rise and Fall Time
Input and Output
Timing Reference
Level
5ns
1.5V
1.1V
0.9V
HY62UF16201A-(I)
HY62QF16201A-(I)
HY62EF16201A-(I)
HY62SF16201A-(I)
0.8V
Output Load
CL = 100pF + 1TTL Load
Rev.01 / Feb. 99
8
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
AC TEST LOADS
VTM(2)
3070 Ohm
DOUT
CL(1)
3150 Ohm
Note
1. Including jig and scope capacitance
2. VTM = 2.8V for Vcc = 3.0V : HY62UF16201A-(I)
VTM = 2.3V for Vcc = 2.5V : HY62QF16201A-(I)
VTM = 1.8V for Vcc = 2.0V : HY62EF16201A-(I)
VTM = 1.6V for Vcc = 1.8V : HY62SF16201A-(I)
CAPACITANCE
(Temp = 25°C, f= 1.0MHz)
Symbol
CIN
COUT
Parameter
Input Capacitance(Add, /CS, /WE, /OE)
Output Capacitance(I/O)
Condition
VIN = 0V
VI/O = 0V
Max.
8
10
Unit
pF
pF
Note : These parameters are sampled and not 100% tested
TIMING DIAGRAM
READ CYCLE 1(Note 1)
tRC
ADDR
tAA
OE
tOE
tOH
tOLZ(5)
BC1
BC2
tOHZ(5)
tACS, tBA
tCLZ, tBLZ(5)
tCHZ, tBHZ(5)
High-Z
Data
Out
Data Valid
Rev.01 / Feb. 99
9
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
READ CYCLE 2(Note 1,2,4)
tRC
ADDR
tAA
tOH
tOH
Data
Out
Previous Data
Data Valid
READ CYCLE 3(Note 1,3,4)
BC1
BC2
tACS
tCLZ(5)
tCHZ(5)
Data
Out
Data Valid
Notes:
1. Read Cycle occurs whenever a high on the /WE and /OE is low, while /UB and/or /LB and /CS are in
active status.
2. /OE = VIL
3. Transition is measured + 200mV from steady state voltage.
This parameter is sampled and not 100% tested.
4. BC1 in high for the standby, low for active
BC2 in high for the standby, low for active
WRITE CYCLE 1
tWC
ADDR
tWR(2)
tCW
BC1
BC2
tAS
tAW
tWP(1)
tAS
WE
tDW
tDH
Data Valid
Data In
tOHZ(3,9)
Data
Out
Rev.01 / Feb. 99
10
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
WRITE CYCLE 2 (Note 5)
tWC
ADDR
tAW
tCW
tWR
BC1
BC2
tAS
tWP
WE
tDW
tDH
Data Valid
tWHZ
Data In
tWHZ
(7)
(6)
Data
Out
Notes:
1. A write occurs whenever a low on the /WE and /OE is low while /UB and/or /LB and /CS are in active
state.
2. tWR is measured from the earlier of /CS, /LB, /UB, or /WE going high to the end of write cycle.
3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the
output must not be applied.
4. If the /CS, /LB and /UB low transition occur simultaneously with the /WE low transition or after the /WE
transition, outputs remain in a high impedance state.
5. /OE is continuously low(/OE=VIL)
6. Q(data out) is the same phase with the write data of this write cycle.
7. Q(data out) is the read data of the next address.
8. Transition is measured +200mV from steady state.
This parameter is sampled and not 100% tested.
9. BC1 in high for the standby, low for active
BC2 in high for the standby, low for active
Rev.01 / Feb. 99
11
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
DATA RETENTION ELECTRIC CHARACTERISTIC
TA=0°C to 70°C (Normal)/-40°C to 85°C (E.T.)
Symbol
VDR
ICCDR
Parameter
Vcc for Data Retention
Data Retention Current
Test Condition
/CS > Vcc - 0.2V
Vcc=2.0V, /CS > Vcc - 0.2V,
Vss < VIN < Vcc
Min
1.5
-
-
0
Typ
Max
3.6
10
2
Unit
V
uA
uA
ns
-
-
-
-
LL
SL
TCDR
Tr
Chip Deselect to Data
Retention Time
Operating Recovery Time
See Data Retention Timing Diagram
-
tRC(2)
-
-
ns
Notes:
1. Typical values are under the condition of TA = 25°C.
2. tRC is read cycle time.
DATA RETENTION TIMING DIAGRAM
DATA RETENTION MODE
VCC
2.2V/
1.8/1.6V
tCDR
tR
VIH
VDR
CS>VCC-0.2V
CS
VSS
Note :
1. 2.2V : HY62UF16201A and HY62UF16201A-I
2.2V : HY62QF16201A and HY62QF16201A-I
1.8V : HY62EF16201A and HY62EF16201A-I
1.6V : HY62SF16201A and HY62SF16201A-I
RELIABILITY SPEC.
TEST MODE
HBM
TEST SPEC.
> 2000V
ESD
MM
> 250V
LATCH - UP
< -100mA
> 100mA
Rev.01 / Feb. 99
12
HY62UF16201A/HY62QF16201A/HY62EF16201A/HY62SF16201A Series
PACKAGE INFORMATION
48ball Micro Ball Grid Array Package(M)
B
A
A1 CORNER
INDEX AREA
6
5
4
3
2
1
A
A
B
C
D
C
C1
E
3.0 X 5.0 MIN
FLAT AREA
F
G
H
C1/2
B1/2
B1
BUMP VIEW
TOP VIEW
6
E1
E2
C
E
SEATING PLANE
4
A
r
3
D(DIAMETER)
SIDE VIEW
Note
Symbol
Min.
-
-
Typ.
0.75
3.75
Max.
-
-
A
B
B1
C
C1
D
E
E1
E2
R
1. DIMENSIONING AND TOLERANCING PER ASME Y14. 5M-1994.
2. ALL DIMENSIONS ARE MILLIMETERS.
-
5.25
0.35
-
3. DIMENSION “ D” IS MEASURED AT THE MAXIMUM SOLDER
BALL DIAMETER IN A PLANE PARALLEL TO DATUM C.
0.3
0.4
4. PRIMARY DATUM C(SEATING PLANE) IS DEFINED BY THE
CROWN OF THE SOLDER BALLS.
5. SOLDER BALL ARRAY MAY BE DEPOPULATED BY OMISSION
BALLS FROM A FULL MATRIX. NO SHIFTING OF MATRIX
PATTERN IS ALLOWED.
6. THIS IS A CONTROLLING DIMENSION.
Rev.01 / Feb. 99
13
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