181MI01L [ICSI]
Low EMI Clock Generator; 低EMI时钟发生器
| 型号： | 181MI01L |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | Low EMI Clock Generator |
| 文件： | 总7页 (文件大小：100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS181-01
Low EMI Clock Generator
Description
Features
The ICS181-01 generates a low EMI output clock from
a clock or crystal input. The device uses ICS’
proprietary mix of analog and digital Phase-Locked
Loop (PLL) technology to spread the frequency
spectrum of the output, thereby reducing the frequency
amplitude peaks by several dB.
• Pin and function compatible to Cypress W181-01
• Packaged in 8-pin SOIC
• Provides a spread spectrum output clock
• Accepts a clock input and provides same frequency
dithered output
• Input frequency of 28 to 75 MHz for Clock input
The ICS181-01 offers down spread selection of -1.25%
and -3.75%. Refer to the MK1714-01/02 for the widest
selection of input frequencies and multipliers.
• Peak reduction by 7dB - 14dB typical on 3rd - 19th
odd harmonics
• Spread percentage selection for -1.25% and -3.75%
• Operating voltage of 3.3 V and 5 V
ICS offers a complete line of EMI reducing clock
generators. Consult us when you need to remove
crystals and oscillators from your board.
• Available in Pb (lead) free package
• Industrial temperature range available
• Advanced, low-power CMOS process
Block Diagram
VDD
FS2:1
SS%
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
CLK
X1/CLKIN
Clock Buffer/
Crystal
Oscillator
X2
GND
MDS 181-01 B
1
Revision 050405
Integrated Circuit Systemsl525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
ICS181-01
LOW EMI CLOCK GENERATOR
Pin Assignment
Spread Spectrum Select Table
SS%
(Pin 4)
Spread
Direction
Spread
Percentage (%)
X1/CLKIN
X2
1
2
3
4
8
7
6
5
FS2
FS1
0
1
Down
Down
-1.25%
-3.75%
GND
VDD
SS%
CLKOUT
0 = connect to GND
1 = connect directly to VDD
8-pin (150 mil) SOIC
Note: SS% pin has an internal pull-up resistor
Frequency Range Selection Table
FS2
(Pin 8) (Pin 7)
FS1
Frequency Range Selection
(MHz)
0
0
1
1
0
1
0
1
28-38
38-48
46-60
58-75
Pin Descriptions
Pin
Pin
Pin Type
Pin Description
Number
Name
1
2
3
4
5
6
7
8
X1/CLKIN
X2
Input
Crystal or Clock input.
Output Crystal output. Float for a clock input.
GND
Power
Input
Connect to ground.
SS%
Select pin for spread amount. See table above. Internal pull-up resistor.
CLKOUT
VDD
Output Spread spectrum clock output per table above.
Power
Input
Input
Connect to 3.3 V or 5 V.
FS1
Select pin for input frequency. See table above. Internal pull-up resistor.
Select pin for input frequency. See table above. Internal pull-up resistor.
FS2
MDS 181-01 B
2
Revision 050405
Integrated Circuit Systemsl 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201l www.icst.com
ICS181-01
LOW EMI CLOCK GENERATOR
External Components
The ICS181-01 requires a minimum number of external
components for proper operation.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 6 and 3, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
the decoupling capacitor and VDD pin. The PCB trace
to VDD pin should be kept as short as possible, as
should the PCB trace to the ground via.
Series Termination Resistor
2) To minimize EMI, the 33Ω series termination resistor
(if needed) should be placed close to the clock output.
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50Ω trace (a commonly used
trace impedance) place a 33Ω resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the ICS181-01. This includes signal traces
just underneath the device, or on layers adjacent to the
ground plane layer used by the device.
value of these capacitors is given by the following
equation:
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS181-01. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +70°C
-40 to +85°C
-65 to +150°C
125°C
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Storage Temperature
Junction Temperature
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+85
Units
°C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
-40
+3.135
+5.5
V
MDS 181-01 B
3
Revision 050405
Integrated Circuit Systemsl 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201l www.icst.com
ICS181-01
LOW EMI CLOCK GENERATOR
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ± 5%, Ambient Temperature -40 to +85°C
Parameter
Operating Voltage
Supply Current
Symbol
VDD
Conditions
Min.
Typ.
Max.
3.465
32
Units
V
3.135
IDD
No load, at 3.3 V
18
mA
V
Input High Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
Output Low Voltage
Input Capacitance
V
2.4
IH
V
0.8
V
IL
V
V
I
I
I
= -4 mA
= -15 mA
= 15 mA
VDD-0.4
2.4
V
OH
OH
OH
OH
OL
V
V
0.4
7
V
OL
C
All pins except CLKIN
CLKIN pin only
5
6
pF
pF
ohms
KΩ
ms
IN
10
Output Impedance
Input Pull-up Resistor
Power-up Time
Rout
25
500
First locked clock
cycle after steady
power
5
Unless stated otherwise, VDD = 5 V, ±10%, Ambient Temperature -40 to +85°C
Parameter
Operating Voltage
Supply Current
Symbol
VDD
Conditions
Min.
Typ.
5
Max.
5.5
Units
V
4.5
IDD
No load, at 3.3 V
30
50
mA
V
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output Impedance
Input Capacitance
V
0.7VDD
2.4
IH
V
0.15VDD
0.4
V
IL
V
I
I
= -24 mA
= 24 mA
V
OH
OH
V
V
OL
OL
Rout
20
5
ohms
pF
pF
KΩ
ms
C
All pins except CLKIN
CLKIN pin only
7
IN
6
10
Input Pull-up Resistor
Power-up Time
500
First locked clock
cycle after steady
power
5
MDS 181-01 B
4
Revision 050405
Integrated Circuit Systemsl 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201l www.icst.com
ICS181-01
LOW EMI CLOCK GENERATOR
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 5% or 5 V 10%, Ambient Temperature -40 to +85°C, C =15 pf
L
Parameter
Input/Output Clock Frequency
Input Crystal Frequency
Input Clock Duty Cycle
Output Clock Duty Cycle
Output Rise Time
Symbol
Conditions
Min.
28
Typ. Max. Units
75
40
60
60
5
MHz
MHz
%
28
Time above VDD/2
Note 1
40
40
50
2
%
t
0.8 to 2.4 V, note 1
2.4 to 0.8 V, note 1
Cycle-to-cycle
ns
OR
Output Fall Time
t
2
5
ns
OF
Jitter
250
300
ps
Note 1: Measured with 15 pF load
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
150
140
120
40
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
MDS 181-01 B
5
Revision 050405
Integrated Circuit Systemsl 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201l www.icst.com
ICS181-01
LOW EMI CLOCK GENERATOR
Marking Diagram (ICS181M-01)
Marking Diagram (ICS181M-01LF)
8
5
8
5
181M01LF
######
YYWW
181M-01
######
YYWW
1
4
1
4
Marking Diagram (ICS181MI-01)
Marking Diagram (ICS181MI-01LF)
8
5
8
5
181MI-01
######
181MI01L
######
YYWW$$
YYWW
1
4
1
4
Notes:
1. ###### is the lot number.
2. YYWW is the last two digits of the year and week that the part was assembled.
3. “LF” denotes Pb (lead) free package.
4. “I” denotes industrial temperature range.
5. Bottom marking: country of origin.
MDS 181-01 B
6
Revision 050405
Integrated Circuit Systemsl 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201l www.icst.com
ICS181-01
LOW EMI CLOCK GENERATOR
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
8
Symbol
A
Min
Max
1.75
0.25
0.51
0.25
5.00
4.00
Min
Max
1.35
0.10
0.33
0.19
4.80
3.80
.0532
.0040
.013
.0688
.0098
.020
A1
E
H
B
C
D
E
e
INDEX
AREA
.0075
.1890
.1497
.0098
.1968
.1574
1
2
1.27 BASIC
0.050 BASIC
H
h
5.80
0.25
0.40
0°
6.20
.2284
.010
.016
0°
.2440
.020
.050
8°
D
0.50
1.27
8°
L
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
ICS181M-01
Marking
Shipping Packaging
Tubes
Package
Temperature
0 to +70° C
0 to +70° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
ICS181M-01T
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
see page 6
see page 6
ICS181M-01LF
ICS181M-01LFT
ICS181MI-01
ICS181MI-01T
ICS181MI-01LF
ICS181MI-01LFT
Parts that are ordered with a “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 181-01 B
7
Revision 050405
Integrated Circuit Systemsl 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201l www.icst.com
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