3021A [ICSI]
FEMTOCLOCKS-TM CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR; FEMTOCLOCKS -TM CRYSTAL - TO- 3.3V LVPECL时钟发生器
| 型号： | 3021A |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | FEMTOCLOCKS-TM CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR |
| 文件： | 总13页 (文件大小：188K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
GENERAL DESCRIPTION
FEATURES
The ICS843021 is a Gigabit Ethernet Clock • 1 differential 3.3V LVPECL output
ICS
Generator and a member of the HiPerClocksTM
family of high performance devices from ICS.The
ICS843021 uses a 25MHz crystal to synthesize
125MHz.The ICS843021 has excellent phase jitter
• Crystal oscillator interface designed for 22.4MHz - 28MHz,
18pF parallel resonant crystal
HiPerClockS™
• Output frequency range: 112MHz - 140MHz
• VCO range: 560MHz to 700MHz
• Output duty cycle range: 49% - 51%
performance, over the 1.875MHz – 20MHz integration range.
The ICS843021 is packaged in a small 8-pin TSSOP, making it
ideal for use in systems with limited board space.
• RMS phase jitter @ 125MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.37ps (typical)
• RMS phase noise at 125MHz (typical)
Offset
Noise Power
100Hz ............... -94.2 dBc/Hz
1KHz ..............-122.8 dBc/Hz
10KHz ..............-132.2 dBc/Hz
100KHz ..............-131.3 dBc/Hz
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
• Lead-Free package fully RoHS compliant
FREQUENCY TABLE - TYPICAL APPLICATIONS
Inputs
Output Frequency (MHz)
Crystal Frequency (MHz)
25
125
133
26.6
BLOCK DIAGRAM
PIN ASSIGNMENT
VCCA
VEE
VCC
Q0
1
2
3
4
8
7
6
5
25MHz
XTAL_IN
nQ0
Q0
XTAL_OUT
XTAL_IN
nQ0
nc
Phase
Detector
÷5
OSC
VCO
XTAL_OUT
ICS843021
÷25
(fixed)
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
TopView
843021AG
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REV. C MARCH 31, 2005
1
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TABLE 1. PIN DESCRIPTIONS
Number
Name
VCCA
VEE
Type
Description
1
2
Power
Power
Analog supply pin.
Negative supply pin.
XTAL_OUT,
XTAL_IN
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
3, 4
Input
5
6, 7
8
nc
nQ0, Q0
VCC
Unused
Output
Power
No connect.
Differential clock outputs. LVPECL interface levels.
Core supply pin.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum Units
CIN
Input Capacitance
4
pF
843021AG
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REV. C MARCH 31, 2005
2
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
CC
Inputs, V
-0.5V to VCC + 0.5V
I
Outputs, IO
Continuous Current
Surge Current
50mA
100mA
PackageThermal Impedance, θ
101.7°C/W (0 mps)
-65°C to 150°C
JA
StorageTemperature, T
STG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V 10%, TA=0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
2.97
Typical
3.3
Maximum Units
VCC
VCCA
IEE
Core Supply Voltage
3.63
3.63
85
V
V
Analog Supply Voltage
Power Supply Current
2.97
3.3
mA
TABLE 3B. LVPECL DC CHARACTERISTICS, VCC = 3.3V 10%, TA=0°C TO 70°C
Symbol
VOH
Parameter
Test Conditions
Minimum
Typical
Maximum Units
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
VCC - 1.4
VCC - 2.0
0.6
VCC - 0.9
VCC - 1.7
1.0
V
V
V
VOL
VSWING
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Typical Maximum Units
Fundamental
Mode of Oscillation
Frequency; NOTE 1
Equivalent Series Resistance (ESR)
Shunt Capacitance
14
40
50
7
MHz
Ω
pF
NOTE 1: Input frequency is limited to a range of 22.4MHz - 28MHz due to VCO range.
TABLE 5. AC CHARACTERISTICS, VCC = 3.3V 10%, TA=0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fOUT
Output Frequency
112
140
MHz
RMS Phase Jitter,
(Random); NOTE 1
125MHz
tjit(Ø)
0.37
ps
(Intergration Range: 1.875MHz to 20MHz)
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
250
49
550
51
ps
%
NOTE 1: Please refer to the Phase Noise Plot.
843021AG
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REV. C MARCH 31, 2005
3
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TYPICAL PHASE NOISE AT 125MHZ
0
-10
-20
-30
-40
-50
-60
10 Gb Ethernet Filter
125MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.37ps (typical)
-70
-80
-90
-100
-110
-120
-130
-140
Raw Phase Noise Data
-150
-160
-170
-180
-190
Phase Noise Result by adding
a 10 Gb Ethernet Filter to raw data
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
843021AG
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REV. C MARCH 31, 2005
4
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
PARAMETER MEASUREMENT INFORMATION
2V
Phase Noise Plot
SCOPE
VCC
Qx
LVPECL
VEE
Phase Noise Mask
nQx
Offset Frequency
f1
f2
-1.3V 0.33V
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
nQ0
80%
tF
80%
tR
Q0
VSWING
20%
Pulse Width
tPERIOD
Clock
Outputs
20%
tPW
odc =
tPERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
843021AG
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REV. C MARCH 31, 2005
5
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise.The ICS843021 provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL.VCC, and VCCA should
be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin.
3.3V
VCC
.01μF
.01μF
10Ω
VCCA
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843021 has been characterized with 18pF parallel resonant crystal and were chosen to minimize the ppm error.
resonant crystals. The capacitor values, C1 and C2, shown in The optimum C1 and C2 values can be slightly adjusted for
Figure 2 below were determined using a 25MHz, 18pF parallel different board layouts.
XTAL_OUT
C1
33p
X1
18pF Parallel Crystal
XTAL_IN
C2
27p
Figure 2. CRYSTAL INPUt INTERFACE
843021AG
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REV. C MARCH 31, 2005
6
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
APPLICATION SCHEMATIC
Figure 3A shows a schematic example of the ICS843021. An output frequency. The C1 = 27pF and C2 = 33pF are recom-
example of LVEPCL termination is shown in this schematic. mended for frequency accuracy. For different board layout, the
C1 and C2 values may be slightly adjusted for optimizing fre-
Additional LVPECL termination approaches are shown in the
LVPECLTermination Application Note.In this example, an 18pF quency accuracy.
parallel resonant 25MHz crystal is used for generating 125MHz
VCC
VCCA
VCC
R2
10
C3
10uF
C4
0.01u
R3
R5
133
133
U1
Zo = 50 Ohm
Zo = 50 Ohm
Q
VCC
1
8
7
6
5
VCCA
VEE
XTAL_OUT
XTAL_IN
VCC
Q0
nQ0
NC
+
-
2
3
4
25MHz
18pF
nQ
C2
33pF
X1
ICISC8S48340320111
R4
82.5
R6
82.5
C5
0.1u
C1
27pF
VCC=3.3V
FIGURE 3A. ICS843021 SCHEMATIC EXAMPLE
PC BOARD LAYOUT EXAMPLE
Figure 3B shows an example of ICS843021 P.C. board layout.
The crystal X1 footprint shown in this example allows installa-
tion of either surface mount HC49S or through-hole HC49 pack-
age.The footprints of other components in this example are listed
in the Table 6. There should be at least one decoupling capacitor
per power pin.The decoupling capacitors should be located as
close as possible to the power pins. The layout assumes that
the board has clean analog power ground plane.
TABLE 6. FOOTPRINT TABLE
Reference
C1, C2
C3
Size
0402
0805
0603
0603
C4, C5
R2
NOTE: Table 6, lists component
sizes shown in this layout example.
FIGURE 3B. ICS843021 PC BOARD LAYOUT EXAMPLE
843021AG
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REV. C MARCH 31, 2005
7
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843021.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843021 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 10% = 3.63V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
•
•
Power (core)MAX = VCC_MAX * IEE_MAX = 3.63V * 85mA = 308.6mW
Power (outputs)MAX = 30mW/Loaded Output pair
Total Power_MAX (3.63V, with all outputs switching) = 308.6mW + 30mW = 338.6mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device.The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = JunctionTemperature
θJA = Junction-to-AmbientThermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = AmbientTemperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W perTable 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.339W * 90.5°C/W = 100.7°C. This is well below the limit of 125°C.
This calculation is only an example.Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θJA FOR 8-PIN TSSOP, FORCED CONVECTION
θJA byVelocity (Meters per Second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
89.8°C/W
NOTE: Most modern PCB designs use multi-layered boards.
843021AG
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REV. C MARCH 31, 2005
8
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 3.
VCC
Q1
VOUT
RL
50
VCC - 2V
FIGURE 3. LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage ofV - 2V.
CC
•
•
For logic high, VOUT = V
= V
– 0.9V
OH_MAX
CC_MAX
)
= 0.9V
OH_MAX
(V
- V
CCO_MAX
For logic low, VOUT = V
= V
– 1.7V
OL_MAX
CC_MAX
)
= 1.7V
OL_MAX
(V
- V
CCO_MAX
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
))
Pd_H = [(V
– (V
- 2V))/R ] * (V
- V
) = [(2V - (V
- V
/R ] * (V
- V
) =
OH_MAX
CC_MAX
CC_MAX
OH_MAX
_MAX
OH_MAX
CC_MAX
OH_MAX
CC
L
[(2V - 0.9V)/50Ω] * 0.9V = 19.8mW L
))
Pd_L = [(V
– (V
- 2V))/R ] * (V
- V
) = [(2V - (V
- V
/R ] * (V
- V
) =
OL_MAX
CC_MAX
CC_MAX
OL_MAX
_MAX
OL_MAX
CC_MAX
OL_MAX
L
CC
L
[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
843021AG
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REV. C MARCH 31, 2005
9
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
RELIABILITY INFORMATION
TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θJA byVelocity (Meters per Second)
0
1
2.5
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
TRANSISTOR COUNT
The transistor count for ICS843021 is: 1928
843021AG
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REV. C MARCH 31, 2005
10
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX FOR 8 LEAD TSSOP
TABLE 8. PACKAGE DIMENSIONS
Millimeters
SYMBOL
Minimum
Maximum
N
A
8
--
1.20
0.15
1.05
0.30
0.20
3.10
A1
A2
b
0.05
0.80
0.19
0.09
2.90
c
D
E
6.40 BASIC
0.65 BASIC
E1
e
4.30
4.50
L
0.45
0°
0.75
8°
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
843021AG
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REV. C MARCH 31, 2005
11
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TABLE 9. ORDERING INFORMATION
Part/Order Number
ICS843021AG
Marking
3021A
3021A
021AL
021AL
Package
Shipping Packaging Temperature
8 lead TSSOP
tube
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
ICS843021AGT
ICS843021AGLF
ICS843021AGLFT
8 lead TSSOP
2500 tape & reel
tube
8 lead "Lead-Free" TSSOP
8 lead "Lead-Free" TSSOP
2500 tape & reel
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
843021AG
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REV. C MARCH 31, 2005
12
ICS843021
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
REVISION HISTORY SHEET
Description of Change
Rev
Table
Page
Date
1
Added Function Table.
Features section - updated Crystal, Output Frequency & VCO range bullets.
T4
T5
3
3
Crystal Characteristics Table - changed Frequency from 25MHz typical to
14MHz min. and 40MHz max. Added Note 1.
B
10/6/04
AC Characteristics Table - changed Output Frequency from 125MHz typical to
112MHz min. and 140MHz max.
B
C
T9
12
3
Ordering Information Table - corrected count from 154 per tube to 100
10/15/04
11/3/04
T3A
Power Supply Table - increased VCC to 3.3V 10% from 5% and is reflected
throughout the datasheet.
3
8
10
12
1
Absolute Maximum Ratings - corrected Package Thermal Impedance air flow.
Thermal Resistance Table - corrected air flow.
Corrected air flow in table.
Ordering Information Table - corrected marking.
Features Section - added Lead-Free bullet.
T6
T7
T9
C
C
11/30/04
3/31/05
T9
12
Ordering Information Table - added Lead-Free part number.
843021AG
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REV. C MARCH 31, 2005
13
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