ICS2309M-1HT [ICSI]
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER; 3.3伏零延迟，低偏移缓冲器
| 型号： | ICS2309M-1HT |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER |
| 文件： | 总9页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Description
Features
The ICS2309 is a low phase noise, high-speed PLL
based, low-skew zero delay buffer. Based on ICS’
proprietary low jitter Phase Locked Loop (PLL)
techniques, the device provides eight low skew outputs
at speeds up to 133 MHz at 3.3 V. The outputs can be
generated from the PLL (for zero delay), or directly
from the input (for testing), and can be set to tri-state
mode or to stop at a low level. The PLL feedback is
on-chip and is obtained from the CLKOUT pad.
• Clock outputs from 10 to 133 MHz
• Zero input-output delay
• Eight low skew (<250 ps) outputs
• Device-to-device skew <700 ps
• Full CMOS outputs with 25 mA output drive
capability at TTL levels
• 5 V tolerant CLKIN
• Tri-state mode for board-level testing
• Advanced, low power, sub-micron CMOS process
• Operating voltage of 3.3 V
The ICS2309 is available in two different versions. The
ICS2309-1 is the base part. The ICS2309-1H is a high
drive version with faster rise and fall times.
• Industrial temperature range available
• Packaged in 16-pin SOIC and TSSOP (-1H version
only)
• Pb (lead) free package available for -1H version
(16-pin TSSOP only)
Block Diagram
VDD
2
PLL
0
1
CLKIN
CLKOUT
CLKA1
CLKA2
CLKA3
CLKA4
Control
Logic
2
S2, S1
CLKB1
CLKB2
CLKB3
CLKB4
2
GND
MDS 2309 D
1
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Pin Assignment
CLKIN
CLKA1
CLKA2
VDD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CLKOUT
CLKA4
CLKA3
VDD
GND
GND
CLKB1
CLKB2
S2
CLKB4
CLKB3
S1
16 pin narrow (150 mil) SOIC
Output Clock Mode Select Table
S2
0
S1
0
CLKA1:A4
Tri-state (note 1)
Running
CLKB1:B4
Tri-state (note 1)
Tri-state (note 1)
Running
A & B Source
PLL
PLL Status
OFF
0
1
PLL
ON
1
0
Running
CLKIN (note 2)
PLL
OFF
1
1
Running
Running
ON
Note 1. Outputs are in high impedance state
Note 2. Buffer mode only; not zero delay between input and output
Pin Descriptions
Pin
Pin
Pin Type
Pin Description
Number
Name
1
2 - 3
4
CLKIN
CLKA1:A4
VDD
Input
Clock input (5 V tolerant).
Output Clock outputs A1:A4. See table above.
Power
Power
Power supply. Connect to 3.3 V.
Connect to ground.
5
GND
6 - 7
8
CLKB1:B4
S2
Output Clock outputs B1:B4. See table above.
Input
Input
Select input 2. See table above. Internal pull-up.
Select input 1. See table above. Internal pull-up.
9
S1
10 - 11
12
CLKB1:B4
GND
Output Clock outputs B1:B4. See table above.
Power
Power
Connect to ground.
13
VDD
Power supply. Connect to 3.3 V.
14 - 15
16
CLKA1:A4
CLKOUT
Output Clock outputs A1:A4. See table above.
Input Buffered output. Internall feedback on this pin.
MDS 2309 D
2
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
External Components
The ICS2309 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01 mF should be connected between VDD and GND on pins 4 and 5, and VDD and GND
on pins 13 and 12, as close to the device as possible. A series termination resistor of 33Ω may be used to
each clock output pin to reduce reflections.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS2309. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
CLKIN and FBIN inputs
7 V
-0.5 V to VDD+0.5 V
-0.5 V to 5.5 V
2000 V
Electrostatic Discharge (HBM)
Ambient Operating Temperature (Commercial)
Ambient Operating Temperature (Industrial)
Storage Temperature
0 to +70°C
-40 to +85°C
-65 to +150°C
150°C
Junction Temperature
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+85
Units
°C
Ambient Operating Temperature (Industrial)
Ambient Operating Temperature (Commercial)
Power Supply Voltage (measured in respect to GND)
-40
0
+70
°C
+3.0
+3.6
V
MDS 2309 D
3
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
DC Electrical Characteristics
ICS2309M-1, VDD = 3.3 V ±10%, Ambient Temperature -40 to +85°C(Industrial), (0-70°C Commercial)
Parameter
Operating Voltage
Input High Voltage
Input Low Voltage
Input Low Current
Input High Current
Output High Voltage
Output Low Voltage
Operating Supply Current
Symbol
Conditions
Min.
3.0
2
Typ.
Max. Units
VDD
3.6
V
V
V
IH
V
I
0.8
50
V
IL
VIN = 0V
VIN = VDD
µA
µA
V
IL
I
100
IH
V
I
I
= -12 mA
= 12 mA
2.4
OH
OH
OL
V
0.4
32
12
V
OL
IDD
No Load
mA
µA
Power Down Supply
Current
CLKIN = 0, Note 1
Short Circuit Current
Input Capacitance
I
Each output
±50
5
mA
pF
OS
C
S2, S1, CLKIN
IN
Note 1: When there is no clock signal present at CLKIN, the ICS2309 will enter power down mode. The
PLL is stopped and the outputs are tri-state.
AC Electrical Characteristics
ICS2309M-1, VDD=3.3 V ±10%, Ambient temperature -40 to +85°C(Industrial), (0-70°C Commercial),
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Output Clock Frequency
Output Clock Frequency
Output Rise Time
f
10 pF load, See table on page 2
30 pF load, See table on page 2
0.8 to 2.0 V, outputs loaded
2.0 to 0.8 V, outputs loaded
10
10
133
100
2.5
2.5
60
MHz
MHz
ns
IN
t
OR
Output Fall Time
t
ns
OF
DC
Output Clock Duty Cycle
t
measured at 1.4V, Fout=66.67
MHz
40
45
50
50
%
Output Clock Duty Cycle
t
measured at 1.4V, Fout=50
MHz
55
%
DC
Device to Device Skew
Output to Output Skew
Input to Output Skew
Input to Output Skew
rising edges at VDD/2
rising edges at VDD/2
rising edges at VDD/2
700
250
±350
8.7
ps
ps
ns
ns
rising edges at VDD/2, S2= 1,
S1 = 0
1
5
Cycle to Cycle Jitter
PLL Lock Time
measured at 66.67M, outputs
loaded
200
1.0
ps
Note 2
ms
Note 2: With VDD at a steady rate and valid input at CLKIN
MDS 2309 D
4
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
ICS2309M-1H, VDD=3.3 V ±10%, Ambient temperature -40 to +85°C(Industrial), (0-70°C Commercial),
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Output Clock Frequency
Output Clock Frequency
Output Rise Time
f
10 pF load, See table on page 2
30 pF load, See table on page 2
0.8 to 2.0 V, outputs loaded
2.0 to 0.8 V, outputs loaded
10
10
133
100
1.5
1.5
60
MHz
MHz
ns
IN
t
OR
Output Fall Time
t
ns
OF
Output Clock Duty Cycle
t
measured at 1.4V, Fout=66.67
MHz
40
45
50
50
%
DC
Output Clock Duty Cycle
t
measured at 1.4V, Fout=50
MHz
55
%
DC
Device to Device Skew
Output to Output Skew
Input to Output Skew
Input to Output Skew
rising edges at VDD/2
rising edges at VDD/2
rising edges at VDD/2
700
250
±350
8.7
ps
ps
ps
ns
rising edges at VDD/2, S2= 1,
S1 = 0
1
5
Cycle to Cycle Jitter
PLL Lock Time
measured at 66.67M, outputs
loaded
200
1.0
ps
Note 3
ms
Note 3: With VDD at a steady rate and valid input at CLKIN
MDS 2309 D
5
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Min Max
Inches
Max
16
Symbol
Min
--
A
A1
A2
b
C
D
--
1.20
0.15
1.05
0.30
0.20
5.1
0.047
0.006
0.041
0.012
0.05
0.80
0.19
0.09
4.90
0.002
0.032
0.007
E1
E
INDEX
AREA
0.0035 0.008
0.193 0.201
0.252 BASIC
0.169 0.177
0.0256 Basic
E
E1
e
6.40 BASIC
4.30 4.50
0.65 Basic
1 2
D
L
0.45
0.75
0.018
0.030
α
0°
8°
0°
8°
A
2
A
A
1
c
- C -
e
SEATING
PLANE
b
L
.10 (.004)
C
Thermal Characteristics for 16TSSOP
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
78
70
68
37
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
MDS 2309 D
6
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
16
Symbol
Min
Max
1.75
0.25
0.51
0.25
10.00
4.00
Min
Max
A
A1
B
C
D
E
e
1.35
0.10
0.33
0.19
9.80
3.80
.0532
.0040
.013
.0075
.3859
.1497
.0688
.0098
.020
.0098
.3937
.1574
E
H
INDEX
AREA
1.27 BASIC
0.050 BASIC
1
2
H
h
L
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
.2284
.010
.016
0°
.2440
.020
.050
8°
D
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
Thermal Characteristics for 16SOIC
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
120
115
105
58
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
MDS 2309 D
7
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Tubes
Package
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
Temperature
-40 to +85° C
-40 to +85° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
0 to +70° C
ICS2309MI-1
ICS2309MI-1T
ICS2309M-1
ICS2309MI-1
ICS2309MI-1
ICS2309M-1
ICS2309M-1
ICS2309MI-1H
ICS2309MI-1H
ICS2309M-1H
ICS2309M-1H
2309GI1H
Tape and Reel
Tubes
ICS2309M-1T
Tape and Reel
Tubes
ICS2309MI-1H
ICS2309MI-1HT
ICS2309M-1H
ICS2309M-1HT
ICS2309GI-1H
ICS2309GI-1HT
ICS2309GI-1HLF
ICS2309GI-1HLFT
ICS2309G-1H
Tape and Reel
Tubes
Tape and Reel
Tubes
0 to +70° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
0 to +70° C
0 to +70° C
0 to +70° C
2309GI1H
Tape and Reel
Tubes
309GI1HL
309GI1HL
Tape and Reel
Tubes
2309G-1H
ICS2309G-1HT
ICS2309G-1HLF
ICS2309G-1HLFT
2309G-1H
Tape and Reel
Tubes
2309G1HL
2309G1HL
Tape and Reel
0 to +70° C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no
responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other
circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as
those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without
additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant
any ICS product for use in life support devices or critical medical instruments.
MDS 2309 D
8
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Revision History
Rev. Originator
Date
Description of Change
A
B
P. Griffith
P. Griffith
12/01/04 New device/datasheet; Prelminary.
12/27/04 Add TSSOP package. Made corrections to IDD, IDDP, input capacitance and duty cycle
specs/test conditions. Removed jitter specs for CL=15 pF. Added I/O skew spec for
bypass mode and duty cycle spec for Fout=50 MHz.
C
D
P. Griffith
P. Griffith
1/25/05 Made corrections to test conditions for output rise time, fall time, duty cycle and
cycle-to-cycle jitter. Moved from Preliminary to Final.
5/24/05 Added LF ordering info to 16-pin TSSOP (-1H version only); added Thermal Chars for
16-pin TSSOP package
MDS 2309 D
9
Revision 052405
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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