ICS503 [ICSI]

LOCO⑩ PLL Clock Multiplier; LOCO ™ PLL时钟乘法器
ICS503
型号: ICS503
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

LOCO⑩ PLL Clock Multiplier
LOCO ™ PLL时钟乘法器

时钟
文件: 总4页 (文件大小:64K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PRELIMINARY INFORMATION  
PRELIMINARY INFORMATION  
ICS503  
LOCO™ PLL Clock Multiplier  
Description  
Features  
• Packaged as 8 pin SOIC or die  
The ICS503 is a member of the LOCO™ family,  
the most cost effective way to generate a high  
quality, high frequency clock output from a low  
frequency crystal or clock input. The name LOCO  
stands for LOw Cost Oscillator, as it is designed  
to replace crystals and crystal oscillators in most  
electronic systems. Using Phase-Locked-Loop  
(PLL) techniques, the device uses a standard  
fundamental mode, inexpensive crystal to produce  
output clocks up to 160 MHz.  
• ICS’ lowest cost PLL clock family  
• Generates 16.9344 MHz for stereo codecs from  
the 14.31818 MHz motherboard clock  
• Can be cost effective in replacing a single  
surface-mount crystal  
• Can be driven by other 5xx series  
• Input crystal frequency of 5 - 27 MHz  
• Input clock frequency of 2 - 50 MHz  
• Output clock frequencies up to 160 MHz  
• Low jitter - 50 ps one sigma  
Stored in the chips ROM is the ability to generate  
9 different multiplication factors, allowing one  
chip to be used in two or three different  
applications (see page 2).  
• Duty cycle of 45/55 up to 160 MHz  
• Operating voltages of 3.0 to 5.5V  
• Full CMOS level outputs with 25mA drive  
capability at TTL levels  
• Advanced, low power CMOS process  
Block Diagram  
VDD GND  
S0  
S1  
PLL  
Clock Multiplier  
Circuitry  
and  
Output  
Buffer  
Crystal or  
clock input  
CLK  
X1/ICLK  
Crystal  
Oscillator  
ROM  
X2  
Optional crystal capacitors  
MDS 503 A  
1
Revision 111000  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com  
PRELIMINARY INFORMATION  
PRELIMINARY INFORMATION  
ICS503  
LOCO™ PLL Clock Multiplier  
Pin Assignment  
1
2
3
4
8
7
6
5
X1/ICLK  
VDD  
GND  
NC  
X2  
S1  
S0  
CLK  
Clock Decoding Table (MHz)  
S1  
0
S0 Multiplier Typical Input (MHz) CLK (MHz) Input Range (MHz) at 5V Input Range (MHz) at 3.3V  
0
M
1
10  
10  
100  
160  
2 £ Input £ 16  
2 £ Input £ 10  
20 £ Input £ 50  
10 £ Input £ 50  
10 £ Input £ 50  
10 £ Input £ 50  
14 £ Input £ 28  
14 £ Input £ 30  
5 £ Input £ 38  
2 £ Input £ 10  
2 £ Input £ 6  
0
16  
10  
0
1.1111  
2.4444  
2.4164  
2.4  
27  
30.00  
35.00  
34.60  
34.36  
80.00  
16.934  
60.00  
20 £ Input £ 40  
10 £ Input £ 40  
10 £ Input £ 40  
10 £ Input £ 40  
14 £ Input £ 18  
14 £ Input £ 30  
5 £ Input £ 24  
M
M
M
1
0
14.31818  
14.31818  
14.31818  
14.31818  
14.31818  
14.31818  
M
1
0
5.5873  
1.1827  
4.1905  
1
M
1
1
0 = connect directly to ground, 1 = connect directly to VDD, M = leave unconnected (floating).  
Pin Descriptions  
Number  
Name  
X1/ICLK  
VDD  
GND  
NC  
Type Description  
1
2
3
4
5
6
7
8
I
P
Crystal connection or clock input.  
Connect to +3.3V or +5V.  
P
Connect to ground.  
-
Nothing is connected to this pin.  
CLK  
S0  
O
TI  
TI  
O
Clock output per Table above. Output frequency equals input frequency times multiplier.  
Select 0 for output clock. Connect to GND or VDD or float.  
Select 1 for output clock. Connect to GND or VDD or float.  
Crystal connection. Leave unconnected for clock input.  
S1  
X2  
Key: I = Input, TI = Tri-Level Input, O = output, P = power supply connection  
MDS 503 A  
2
Revision 111000  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com  
PRELIMINARY INFORMATION  
PRELIMINARY INFORMATION  
ICS503  
LOCO™ PLL Clock Multiplier  
Electrical Specifications  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)  
Supply Voltage, VDD  
Inputs  
Referenced to GND  
Referenced to GND  
Referenced to GND  
7
VDD+0.5  
VDD+0.5  
70  
V
V
-0.5  
-0.5  
0
Clock Output  
V
Ambient Operating Temperature  
Soldering Temperature  
Storage temperature  
°C  
°C  
°C  
Max of 10 seconds  
260  
-65  
150  
DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted)  
Operating Voltage, VDD  
3
5.5  
(VDD/2)-1  
0.5  
V
V
Input High Voltage, VIH, ICLK only  
Input Low Voltage, VIL, ICLK only  
Input High Voltage, VIH  
ICLK (Pin 1)  
ICLK (Pin 1)  
S1, S0  
(VDD/2)+1  
VDD/2  
VDD/2  
V
VDD-0.5  
V
Input Low Voltage, VIL  
S1, S0  
V
Output High Voltage, VOH, CMOS high  
Output High Voltage, VOH  
IOH=-4mA  
IOH=-25mA  
IOL=25mA  
VDD-0.4  
2.4  
V
V
Output Low Voltage, VOL  
0.4  
V
IDD Operating Supply Current, 14 MHz crystal No Load, 80MHz  
16  
±70  
4
mA  
mA  
pF  
Short Circuit Current  
CLK output  
Pins 6, 7  
Input Capacitance, S1, S0  
AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted)  
Input Frequency, crystal input  
Input Frequency, clock input  
Output Frequency  
See table on page 2  
See table on page 2  
VDD = 4.5 to 5.5V  
VDD = 3.0 to 3.6V  
0.8 to 2.0V  
5
27  
50  
MH z  
MH z  
MH z  
MH z  
ns  
2
14  
14  
160  
100  
Output Frequency  
Output Clock Rise Time  
Output Clock Fall Time  
Output Clock Duty Cycle  
Absolute Clock Period Jitter  
One Sigma Clock Period Jitter  
1
1
2.0 to 0.8V  
ns  
at VDD/2  
45  
49 to 51  
±120  
50  
55  
%
Deviation from mean  
ps  
ps  
MDS 503 A  
3
Revision 111000  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com  
PRELIMINARY INFORMATION  
PRELIMINARY INFORMATION  
ICS503  
LOCO™ PLL Clock Multiplier  
External Components / Crystal Selection  
The ICS503 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be  
connected close to the ICS503 to minimize lead inductance. No external power supply filtering is required  
for this device. A 33Wterminating resistor can be used next to the CLK pin. The total on-chip capacitance  
is approximately 6 pF, so a parallel resonant, fundamental mode crystal should be used. If exact tuning of  
the frequency is required, crystal capacitors should be connected from each of the pins X1 and X2 to  
ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be equal  
to (C -6)*2, where C is the crystal load capacitance in pF. These external capacitors are only required for  
L
L
applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2  
unconnected (no capacitors on either).  
Package Outline and Package Dimensions  
8 pin SOIC  
E
H
Inches  
Millimeters  
Min Max  
0.055 0.068 1.397 1.7272  
Pin 1  
Symbol Min  
Max  
A
b
0.013 0.019 0.330  
0.185 0.200 4.699  
0.150 0.160 3.810  
0.225 0.245 5.715  
0.483  
5.080  
4.064  
6.223  
D
E
H
e
h x 45°  
D
.050 BSC  
0.015  
0.01  
1.27 BSC  
A
Q
h
0.381  
0.254  
c
Q
0.004  
0.102  
b
e
Ordering Information  
Part/Order Number  
ICS503M  
Marking  
ICS503M  
ICS503M  
Package  
8 pin SOIC  
8 pin SOIC on tape and reel  
Temperature  
0-70°C  
ICS503MT  
0-70°C  
While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of  
any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal  
commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not  
recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock  
does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments.  
LOCO is a trademark of ICS  
MDS 503 A  
4
Revision 111000  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com  

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