ICS511-DWF [ICSI]
LOCO PLL CLOCK MULTIPLIER; LOCO PLL时钟乘法器
| 型号： | ICS511-DWF |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | LOCO PLL CLOCK MULTIPLIER |
| 文件： | 总8页 (文件大小：163K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS511
LOCOTM PLL CLOCK MULTIPLIER
Description
Features
TM
The ICS511 LOCO is the most cost effective way to
generate a high quality, high frequency clock output
from a lower frequency crystal or clock input. The name
LOCO stands for Low Cost Oscillator, as it is designed
to replace crystal oscillators in most electronic
systems. Using Phase-Locked Loop (PLL) techniques,
the device uses a standard fundamental mode,
inexpensive crystal to produce output clocks up to 200
MHz.
• Packaged as 8-pin SOIC or die
• Available in Pb (lead) free package
• Upgrade of popular ICS501 with:
- changed multiplier table
- faster operating frequencies
- output duty cycle at VDD/2
• Zero ppm multiplication error
• Input crystal frequency of 5 - 27 MHz
• Input clock frequency of 2 - 50 MHz
• Output clock frequencies up to 200 MHz
• Extremely low jitter of 25 ps (one sigma)
• Compatible with all popular CPUs
• Duty cycle of 45/55 up to 200 MHz
• Mask option for nine selectable frequencies
• Operating voltage of 3.3 V or 5 V
• Tri-state output for board level testing
• Industrial temperature version available
• Advanced, low power CMOS process
Stored in the chip’s ROM is the ability to generate nine
different multiplication factors, allowing one chip to
output many common frequencies (see table on page
2).
The device also has an output enable pin which
tri-states the clock output when the OE pin is taken low.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined nor guaranteed.
For applications which require defined input to output
skew, use the ICS570B.
Block Diagram
VDD
2
S1:0
PLL Clock
Multiplier
Circuitry
and ROM
X1/ICLK
CLK
Crystal or
Clock input
Crystal
Oscillator
X2
Optional crystal capacitors
OE
GND
MDS 511 G
1
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS511
TM
LOCO PLL Clock Multiplier
Pin Assignment
Clock Output Table
S1
0
S0
0
CLK
4X input
X1/ICLK
VDD
8
7
6
5
1
2
3
4
X2
0
M
1
5.333X input
5X input
OE
S0
0
M
M
M
1
0
2.5X input
2X input
GND
S1
M
1
CLK
3.333X input
6X input
0
8 Pin (150 mil) SOIC
1
M
1
3X input
1
8X input
0 = connect directly to ground
1 = connect directly to VDD
M = leave unconnected (floating)
Common Output Frequency Examples (MHz)
Output
Input
20
24
12
30
10
32
16
33.33
16.66
M, M
37.5
15
40
10
48
12
50
20
60
10
64
16
10
Selection (S1, S0) M, M
M, M
1, M
M, M
M, 0
0, 0
0, 0
M, 0
1, 0
0, 0
Output
Input
66.66
72
12
75
25
80
10
83.33
25
90
15
100
20
120
15
125
25
133.3 150
20
25
25
Selection (S1, S0) M, 1
1, 0
1, M
1, 1
M, 1
1, 0
0, 1
1, 1
0, 1
0, M
1, 0
Pin Descriptions
Pin
Pin
Pin
Type
Pin Description
Number Name
1
2
3
4
5
6
7
XI/ICLK
VDD
GND
S1
Input
Power
Power
Crystal connection or clock input.
Connect to +3.3 V or +5 V.
Connect to ground.
Tri-level Iinput
Output
Select 1 for output clock. Connect to GND or VDD or float.
Clock output per table above.
CLK
S0
Tri-level Input
Input
Select 0 for output clock. Connect to GND or VDD or float.
OE
Output enable. Tri-states CLK output when low. Internal pull-up
resistor.
8
X2
Output
Crystal connection. Leave unconnected for clock input.
MDS 511 G
2
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS511
TM
LOCO PLL Clock Multiplier
used. The device crystal connections should include
pads for small capacitors from X1 to ground and from
X2 to ground. These capacitors are used to adjust the
stray capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal capacitors, if
needed, must be connected from each of the pins X1
and X2 to ground.
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
ICS511 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and the GND. It must be connected
close to the ICS511 to minimize lead inductance. No
external power supply filtering is required for the
ICS511.
The value (in pF) of these crystal caps should equal
(C -12 pF)*2. In this equation, C = crystal load
L
L
Series Termination Resistor
A 33Ω terminating resistor can be used next to the CLK
pin for trace lengths over one inch.
capacitance in pF. Example: For a crystal with a 16 pF
load capacitance, each crystal capacitor would be 8 pF
[(16-12) x 2] = 8.
Crystal Load Capacitors
The total on-chip capacitance is approximately 12 pF. A
parallel resonant, fundamental mode crystal should be
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS511. These ratings, which
are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +70°C
Ambient Operating Temperature (Commercial grade)
Ambient Operating Temperature (Industrial grade)
Storage Temperature
-40 to +85°C
-65 to +150°C
260°C
Soldering Temperature
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+85
Units
°C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
-40
+3.135
+5.25
V
MDS 511 G
3
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS511
TM
LOCO PLL Clock Multiplier
DC Electrical Characteristics
VDD=3.3 V 5% , Ambient temperature -40 to +85°C, unless stated otherwise
Parameter
Symbol Conditions
Min.
3.135
Typ.
Max.
Units
Operating Voltage
VDD
3.465
V
V
Input High Voltage, ICLK only
Input Low Voltage, ICLK only
Input High Voltage
V
ICLK (pin 1)
ICLK (pin 1)
OE (pin 7)
OE (pin 7)
S0, S1
(VDD/2)+0.7
IH
V
(VDD/2)-0.7
V
IL
V
2.0
VDD-0.5
2.4
V
IH
Input Low Voltage
V
0.8
0.5
0.4
V
IL
Input High Voltage
V
V
IH
Input Low Voltage
V
S0, S1
V
IL
Output High Voltage
Output Low Voltage
V
I
I
= -25 mA
= 25 mA
V
OH
OH
OL
V
V
OL
IDD Operating Supply Current,
20 MHz crystal
No load, 100M
8
mA
Short Circuit Current
CLK output
Pin 7
+70
270
4
mA
kΩ
pF
Ω
On-Chip Pull-up Resistor
Input Capacitance, S1, S0, and OE
Nominal Output Impedance
Pins 4, 6, 7
20
AC Electrical Characteristics
VDD = 3.3 V 5%, Ambient Temperature -40 to +85° C, unless stated otherwise
Parameter
Input Frequency, crystal input
Input Frequency, clock input
Output Frequency
Symbol
Conditions
Min.
5
Typ.
Max. Units
F
F
27
50
MHz
MHz
MHz
MHz
ns
IN
2
IN
F
0°C to +70°C
14
14
160
145
OUT
-40°C to +85°C
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
PLL Bandwidth
t
0.8 to 2.0 V, Note 1
2.0 to 8.0 V, Note 1
1.5 V, up to 160 MHz
1
1
OR
t
ns
OF
t
45
10
49-51
55
%
OD
kHz
ns
Output Enable Time, OE high to
output on
50
50
Output Disable Time, OE low to
tri-state
ns
Absolute Clock Period Jitter
One Sigma Clock Period Jitter
t
t
Deviation from mean
+70
25
ps
ps
ja
js
Note 1: Measured with 15 pF load.
MDS 511 G
4
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS511
TM
LOCO PLL Clock Multiplier
DC Electrical Characteristics
VDD=5.0 V 5% , Ambient temperature -40 to +85°C, unless stated otherwise
Parameter
Symbol Conditions
Min.
4.75
Typ.
Max.
Units
Operating Voltage
VDD
5.25
V
V
Input High Voltage, ICLK only
Input Low Voltage, ICLK only
Input High Voltage
V
ICLK (pin 1)
ICLK (pin 1)
OE (pin 7)
OE (pin 7)
S0, S1
(VDD/2)+1
IH
V
(VDD/2)-1
0.8
V
IL
V
2.0
VDD-0.5
2.4
V
IH
Input Low Voltage
V
V
IL
Input High Voltage
V
V
IH
Input Low Voltage
V
S0, S1
0.5
V
IL
Output High Voltage
Output Low Voltage
V
I
I
= -25 mA
= 25 mA
V
OH
OH
OL
V
0.4
V
OL
IDD Operating Supply Current,
20 MHz crystal
No load, 100M
9
mA
Short Circuit Current
CLK output
Pin 7
+70
270
4
mA
kΩ
pF
Ω
On-Chip Pull-up Resistor
Input Capacitance, S1, S0, and OE
Nominal Output Impedance
Pins 4, 6, 7
20
AC Electrical Characteristics
VDD = 5.0 V 5%, Ambient Temperature -40 to +85° C, unless stated otherwise
Parameter
Input Frequency, crystal input
Input Frequency, clock input
Output Frequency
Symbol
Conditions
Min.
5
Typ.
Max. Units
F
F
27
50
MHz
MHz
MHz
MHz
ns
IN
2
IN
F
0°C to +70°C
14
14
200
160
OUT
-40°C to +85°C
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
PLL Bandwidth
t
0.8 to 2.0 V, Note 1
2.0 to 8.0 V, Note 1
1.5 V, up to 160 MHz
1
1
OR
t
ns
OF
t
45
10
49-51
55
%
OD
kHz
ns
Output Enable Time, OE high to
output on
50
50
Output Disable Time, OE low to
tri-state
ns
Absolute Clock Period Jitter
One Sigma Clock Period Jitter
t
t
Deviation from mean
+70
25
ps
ps
ja
js
Note 1: Measured with 15 pF load.
MDS 511 G
5
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS511
TM
LOCO PLL Clock Multiplier
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
150
140
120
40
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
Marking Diagram
Marking Diagram (Industrial grade)
8
5
8
5
ICS511M
######
YYWW
ICS511I
######
YYWW
1
4
1
4
Marking Diagram (Pb free)
Marking Diagram (Pb free/Industrial
grade)
8
5
8
5
511MLF
######
YYWW
511MILF
######
YYWW
1
4
1
4
Notes:
1. ###### is the lot number.
2. YYWW is the last two digits of the year and week that the part was assembled.
3. “LF” denotes Pb (lead) free package.
4. “I” denotes industrial grade.
MDS 511 G
6
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS511
TM
LOCO PLL Clock Multiplier
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters
Inches
Symbol
Min
Max
1.75
0.25
0.51
0.25
5.00
4.00
Min
Max
A
A1
B
C
D
E
e
1.35
0.10
0.33
0.19
4.80
3.80
.0532
.0040
.013
.0075
.1890
.1497
.0688
.0098
.020
.0098
.1968
.1574
E
H
INDEX
AREA
1.27 BASIC
0.050 BASIC
1
2
H
h
L
5.80
6.20
0.50
1.27
8°
.2284
.010
.016
0°
.2440
.020
.050
8°
0.25
0.40
0°
D
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
MDS 511 G
7
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS511
TM
LOCO PLL Clock Multiplier
Ordering Information
Part / Order Number
ICS511M
Marking
Shipping Packaging
Tubes
Package
Temperature
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
0 to +70° C
0 to +70° C
ICS511M
ICS511M
ICS511I
ICS511I
511MLF
511MLF
511MILF
511MILF
-
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
ICS511MT
Tape and Reel
Tubes
Tape and Reel
Tubes
ICS511MI
ICS511MIT
ICS511MLF
ICS511MLFT
ICS511MILF
ICS511MILFT
ICS511-DWF
ICS511-DPK
Tape and Reel
Tubes
Tape and Reel
Die on uncut, probed wafers
Tested die in waffle pack
-
“LF” designates Pb (lead) free packaging.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 511 G
8
Revision 102504
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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