ICS9120M-09 [ICSI]
Frequency Generator for Multimedia Audio Synthesis; 频率发生器的多媒体音频合成
| 型号： | ICS9120M-09 |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | Frequency Generator for Multimedia Audio Synthesis |
| 文件： | 总7页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS9120-08
ICS9120-09
Integrated
Circuit
Systems, Inc.
Frequency Generator for Multimedia Audio Synthesis
General Description
Features
The ICS9120-08 and ICS 9120-09 are high performance
frequency generators designed to support stereo audio codec
systems. It offers both clock frequencies required by stereo
codecs such as the CS4231 and the AD1848 plus the clock
needed for the OPL4 FM synthesizer. These frequencies can
be synthesized from the existing 14.318 MHz system clock or
from the on-chip oscillator using a 14.318 MHz crystal (-08
only).
•
Generates 16.934 MHz and 24.576 MHz stereo codec
clocks plus the 33.868 MHz OPL4 clock
Single 14.318MHz crystal or system clock reference
Buffered REFCLK output
•
•
•
•
•
•
•
•
0.125% frequency accuracy meets OPL4 specifications
100 ps one sigma jitter maintains 16 bit performance
Output rise/fall times less than 2.0 nS
On chip loop filter components
High accuracy, low jitter PLLs meet the 0.125% frequency
tolerance and -96dB signal-to-noise ratios required by 16 bit
audio systems. Fast output clock edge rates minimize board
induced jitter.
3.3V - 5 V supply range
8 pin, 150mil SOIC package
Applications
Unlike competitive devices, the ICS9120-08 and
ICS9120-09 operate over the entire 3.0-5.5V range, with the
-09 providing power-down to minimize energy consumption.
•
Specifically designed to support the high performance
requirements of multimedia audio systems.
Block Diagram
X1
14.318
XTAL
OSC
REF (14.3MHz)
MHz
X2(-08)
PD(-09)
External
Crystal
Load Caps
CLK1 (24.6MHz)
CLK2 (33.9MHz)
PLL
CLOCK
GEN
CLK3 (16.9MHz)
÷2
9120-08 9120-09 Rev C 052297P
ICS reserves the right to make changes in the device data identified in this publication
without further notice. ICS advises its customers to obtain the latest version of all
device data to verify that any information being relied upon by the customer is current
and accurate.
ICS9120-08
ICS9120-09
Pin Configuration
8-Pin SOIC
8-Pin SOIC
Functionality
X1, X2
(-09 only)
33.9
16.9
24.6
14.3
(MHz)
PD#
(MHz)
(MHz)
(MHz)
(MHz)
-
14.318
-
0
1
Low
Low
Low
Low
33.868
16.934
24.576
14.318
Note: (Pin 8) is internally pulled-up to VDD and, therefore, may
be left disconnected or driven by open collector logic.
Pin Descriptions for ICS9120-08
PIN NUMBER
PIN NAME
TYPE
DESCRIPTION
1
2
3
X1
VDD
GND
Input
Power
Power
Crystal or external clock source. Has feedback bias for crystal.
Power supply input.
Ground return for Pin 2.
4
5
6
7
8
CLK3
CLK1
CLK2
REF
Output
Output
Output
Output
Output
16.934 MHz target output clock for stereo codec.
24.576 MHz target output clock for stereo codec.
33.868 MHz target output clock for OPL4.
14.318 MHz reference clock buffered output.
Crystal output drive.
X2
Pin Descriptions for ICS9120-09
PIN NUMBER
PIN NAME
TYPE
DESCRIPTION
1
2
3
X1
VDD
GND
Input
Power
Power
External clock source.
Power supply input.
Ground return for Pin 2.
4
5
6
7
8
CLK3
CLK1
CLK2
REF
Output
Output
Output
Output
Input
16.934 MHz target output clock for stereo codec.
24.576 MHz target output clock for stereo codec.
33.868 MHz target output clock for OPL4.
14.318 MHz reference clock buffered output.
Power-down input powers down entire device when low; has pull-up.
PD#
2
ICS9120-08
ICS9120-09
Absolute Maximum Ratings
AVDD, VDD referenced to GND ...................................................................... 7V
Operating temperature under bias ................................................... 0C to +70C
Storage temperature ........................................................................ -65C to +150
Voltage on I/O pins referenced to GND ............... GND -0.5V to VDD +0.5V
Power dissipation ................................................................................... 0.5 Watts
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect product reliability.
Electrical Characteristics at 3.3V
VDD = +3.0 to +3.7 V, TA = 0 to 70oC unless otherwise stated
DC Characteristics
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
IL
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
Output High Voltage
Output Low Current
Output High Current
Supply Current
V
-
-
-
0.2VDD
-
-
5.0
0.1
-
V
V
µA
µA
V
IH
V
IL
0.7VDD
-8.0
-
-
0.85VDD
15.0
-
-
-
-
IN
I
I
V = 0 V (For -09 only)
-3.6
-
IH
V (For -09 only)
IN
OL
V *
OH
V
OL
I *
IOH*
CC
OL
I
= 6 mA
0.05VDD
0.94VDD
24.0
-13.0
13.0
OH
*
I
= -4.0 mA
V
OL
V
OH
V
DD
= 0.2V
-
mA
mA
mA
µA
k ohm
DD
= 0.7V
-8.0
32.0
110.0
900.0
I
I
Unloaded
Unloaded (For -09 only)
(For -09 only)
CC(PD)
Supply Current
Pull-up Resistor Value
50.0
620.0
pu
R *
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
3
ICS9120-08
ICS9120-09
Electrical Characteristics at 3.3 V
VDD = +3.0 to +3.7 V, TA = 0-70oC unless otherwise stated
AC Characteristics
TEST CONDITIONS
PARAMETER
Rise Time
SYMBOL
Tr*
MIN
-
TYP
1.5
MAX
4.0
UNITS
ns
15pF load, 0.8 to 2.0V
Fall Time
Rise Time
Tf*
Tr*
15pF load, 2.0 to 0.8V
15pF load, 20% to 80%
-
-
1.0
2.2
3.0
4.0
ns
ns
Fall Time
Tf*
15pF load, 80% to 20%
15pF load @ 50% of VDD;
Except REFCLK
-
1.5
3.0
ns
Duty Cycle
Dt*
45.0
50.0
55.0
%
15pF load @ 50% of VDD;
REFCLK only
For all frequencies except
REFCLK
For all frequencies except
REFCLK
Duty Cycle
Dt*
40.0
-
45.0
150.0
380.0
60.0
200
%
ps
ps
Jitter, One Sigma
Jitter, Absolute
T *
jis
T
-650.0
650.0
jab
Jitter, One Sigma
Jitter, Absolute
Input Frequency
Output Frequency
Output Mean Frequency
Accuracy vs. Target
T *
REFCLK only
REFCLK only
-
266.0
750.0
14.3
-
400.0
1000
15.0
38.0
ps
ps
MHz
MHz
jis
T
-1000
11.0
11.0
jab
F*
i
Fo*
Foa*
Tpu*
With 14.318 MHz input
0 to 33.8 MHz
-0.125
-
5.5
5
-0.04
12.0
-
%
ms
pF
Power-up Time
-
-
Crystal Input
Capacitance
X1 (Pin 1), X2 (Pin 8; -08
only)
C *
inx
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
4
ICS9120-08
ICS9120-09
Electrical Characteristics at 5.0 V
VDD = +4.5 to +5.5 V, TA = 0-70oC unless otherwise stated
DC Characteristics
TEST CONDITIONS
PARAMETER
SYMBOL
VIL
MIN
-
TYP
-
MAX
0.8
UNITS
V
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
VIH
IIL
2.0
-18.0
-
-
-8.3
-
-
-
V
VIN = 0V (For -09 only)
VIN = VDD (For -09 only)
µA
µA
IIH
5.0
Output Low Voltage
Output High Voltage
Output Low Current
VOL
*
*
IOL = 10 mA
IOH = -30 mA
VOL =0.8V
-
0.15
3.7
0.4
V
V
VOH
2.4
25.0
-
-
IOL
IOH
ICC
*
45.0
mA
Output High Current
Supply Current
*
VOH = 2.4V
Unloaded
-
-
-53.0
22.0
-35.0
50.0
mA
mA
Supply Current, Power-
down
ICC(PD)
Rpu*
Unloaded (For -09 only)
(For -09 only)
-
-
180.0
400.0
500.0
800.0
µA
Pull-up Resistor Value
k ohm
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
5
ICS9120-08
ICS9120-09
Electrical Characteristics at 5.0 V
VDD = 4.5 - 5.5 V, TA = 0 - 70oC unless otherwise stated
AC Characteristics
PARAMETER
Rise Time
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
2.0
1.5
UNITS
Tr*
Tf*
Tr*
15pF load, 0.8 to 2.0V
15pF load, 2.0 to 0.8V
15pF load, 20% to 80%
-
-
-
0.9
0.7
1.8
ns
ns
ns
Fall Time
Rise Time
3.25
Fall Time
Tf*
15pF load, 80% to 20%
-
1.4
2.5
ns
%
15pF load @ 50% of VDD;
Except REFCLK
Duty Cycle
D*
45.0
50.0
55.0
t
15pF load @ 50% of VDD;
REFCLK only
Duty Cycle
D*
40.0
-
50.0
60.0
%
ps
t
For all frequencies except
REFCLK
Jitter, One Sigma
Tj1s*
100.0
150.0
For all frequencies except
REFCLK
Jitter, Absolute
Jitter, One Sigma
Jitter, Absolute
Tjab
Tj1s*
Tjab
-600.0
-
380.0
266.0
750.0
600.0
450.0
1200
ps
ps
ps
REFCLK only
REFCLK only
-1200
Input Frequency Range
Fi*
Fo*
11.0
11.0
-0.125
-
14.0
17.0
42.0
-0.04
12.0
-
MHz
MHz
%
Output Frequency
Range
Output Mean Frequency
Accuracy vs. Target
-
-
Foa*
Tpu*
Cinx*
With 14.318 MHz input
0 to 33.8 MHz
Power-up Time
5.5
5
ms
Crystal Input
Capacitance
X1 (Pin 1), X2 (Pin 8; -08 only)
-
pF
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
6
ICS9120-08
ICS9120-09
0.154
0.194
0.031
0.024
0.063
0.008
0.015
0.025
0.016
0.238
0.050
0.006
± 0.004
8-Pin SOIC Package
Ordering Information
ICS9120M-08, ICS9120M-09
Example:
ICS XXXX M-PPP
Pattern Number (2 or 3-digit number for parts with ROM code pattern)
Package Type
M =SOIC
Device Type (consists of 3 or 4-digit numbers)
Prefix
ICS, AV=Standard Device
ICS reserves the right to make changes in the device data identified in this publication
without further notice. ICS advises its customers to obtain the latest version of all
device data to verify that any information being relied upon by the customer is current
and accurate.
7
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