M840XC [ICSI]

OC-192 MULTI-RATE CLOCK RECOVERY MODULE; OC- 192多速率时钟恢复模块
M840XC
型号: M840XC
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

OC-192 MULTI-RATE CLOCK RECOVERY MODULE
OC- 192多速率时钟恢复模块

时钟
文件: 总4页 (文件大小:1007K)
中文:  中文翻译
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M840 Series  
Performance Specifications  
M840 Series  
OC-192 MULTI-RATE CLOCK RECOVERY MODULE  
DESCRIPTION  
The M840 Series OC-192 Multi-rate Clock  
Recovery Module provides low jitter clock recovery  
from NRZ or RZ input data formats. Four data  
rates, 9.953, 10.3125, 10.664 or 10.709Gb/s may  
be selected digitally. The input data is amplified by  
limiting amplifiers. The amplified data is applied to  
the clock recovery circuitry and provided as an  
output at a constant level.  
The module incorporates a frequency multiplied  
high Q SAW VCO in the clock recovery phase-lock  
loop to minimize the jitter on the recovered clock.  
The low noise, excellent stability, and low micro-  
phonic sensitivity of the SAW based VCO to allow  
operation with a very narrow phase-lock loop  
bandwidth necessary to minimize pattern  
FEATURES  
4 Selectable NRZ or RZ Data Rates:  
9.953, 10.3125, 10.664 & 10.709Gb/s  
dependent clock jitter. The use of micro-strip band  
pass filters to filter the recovered clock results in a  
sinusoidal clock output, having low harmonic and  
sub-harmonic distortion.  
Superior SAW VCO-based PLL Jitter  
Performance  
<2psec RMS Jitter  
6mV Peak to Peak Input Sensitivity  
The clock recovery circuitry is housed in an easy to  
interface connectorized module. The discrete  
circuit design allows for the design to be optimized  
for various applications and data rates.  
Up to 700mV Peak to Peak Un-retimed  
NRZ or RZ Data Output  
Designed and optimized for minimum  
jitter in accordance with ITU and  
Bellcore standards for SONET/SDH  
jitter transfer  
APPLICATIONS  
ABSOLUTE MAX RATINGS  
SONET OC-192/10GbE Test Equipment  
Operating Temp. Range (Case) ............................. 0°C to +70°C  
Storage Temp. Range (Ambient) ..................... -40°C to +125°C  
Power Supply Voltage ................................................±5.25 Vdc  
Control Voltage ............................................................+5.0 Vdc  
SONET OC-192/SDH STM Physical  
Layer Clock and Data Recovery  
Integrated Circuit Systems, Inc.  
Communications Modules www.icst.com/Comm-Modules  
tel: 508-852-5400  
M840 Series  
Performance Specifications  
SPECIFICATIONS  
Specifications @ Vcc = +5 Volts, Vee = -5 Volts, TA = +25°C unless otherwise specified  
PARAMETER  
Operating Data Rates  
Min  
9.953  
10.3125  
10.664  
10.709  
1
Max  
Units  
Gb/s  
Gb/s  
Gb/s  
Gb/s  
Conditions  
Selectable Operating Data Rates  
Locking Range  
Data Input Voltage  
4
Selected by two TTL inputs (00,01,10,11)  
Referenced to nominal bit rate.  
NRZ or RZ  
-0.3  
6
+0.3  
1000  
10-12  
%
mVp-p  
Input Data BER  
Data Input Return Loss  
OC-192 Clock Output Frequency  
OC-48 Clock Output Frequency  
Clock Output RMS Jitter  
9
dB  
GHz  
GHz  
Ul  
150kHz to 12.5GHz, 10dB typ.  
9.953  
2.488  
10.709  
2.677  
0.02  
Wideband measured on oscilloscope.  
PRBS = 223-1  
Clock Output Peak-to-Peak Jitter  
0.12  
Ul  
Wideband measured on oscilloscope.  
PRBS = 223-1  
Clock Output Voltage  
800  
10  
1400  
mVp-p  
dB  
dBc  
Clock Output Return Loss  
Clock Output Harmonic Level  
Clock Output Sub-harmonic Level  
Maximum Number of Bits of  
Consecutive Ones or Zeros  
Data Output Voltage  
At output clock frequency ±0.1%  
-30  
-40  
dBc  
200  
400  
Ul  
mVp-p  
dB  
200  
7
4
Unretimed NRZ or RZ data*  
150kHz to 12GHz, 10dB Typ  
Set to meet Bellcore jitter transfer  
requirements while minimizing clock jitter.  
Data Output Return Loss  
Jitter Transfer Bandwidth  
MHz  
Loss of Lock Alarm (unlocked)  
Loss of Lock Alarm (locked)  
+5V Power Supply Voltage  
+5V Power Supply Current  
-5V Power Supply Voltage  
-5V Power Supply Current  
Control Voltage (Low)  
Control Voltage (High)  
Operating Temperature Range  
Package Size  
2.0  
0.0  
4.75  
5.0  
0.8  
5.25  
0.70  
-5.25  
0.70  
0.8  
5.0  
+70  
V
V
V
A
V
A
V
V
°C  
In  
-4.75  
0
2.4  
0
Standard TTL Levels  
Standard TTL Levels  
(case)  
SMA connectors used for Data In, Data Out,  
OC-192 Clock Out and OC-48 Clock Out  
3.2 x 1.57 x .625  
*Higher output level available, contact factory.  
Integrated Circuit Systems, Inc.  
Communications Modules www.icst.com/Comm-Modules  
tel: 508-852-5400  
M840 Series  
Performance Specifications  
BLOCK DIAGRAM  
Data  
In  
Lim  
Amp  
Lim  
Amp  
Data  
Out  
RF  
Freq  
Amp  
Doubler  
Op-  
Amp  
RF  
Amp  
Freq  
X4  
RF  
Amp  
Pwr  
Div  
OC 192  
Clk Out  
SAW DL 1  
Pwr  
Div  
Freq  
Doubler  
RF  
Amp  
OC 48  
Clk Out  
RF  
Amp  
Pwr  
Div  
SAW DL 2  
SAW DL 3  
SAW DL 4  
SP4T  
SW  
SP4T  
SW  
Phase  
Shifter  
Rate  
Select  
TEST DATA  
Single Limiting Amplifier High Level Input Test Data  
Single Limiting Amplifier Low Level Input Test Data  
Conditions: Rate = 12.02Gb/sec, Input Level = 1Vpp  
Conditions: Rate = 12.02Gb/sec, Input Level = 6mVpp  
Note: M840 has two limiting amplifiers  
Integrated Circuit Systems, Inc.  
Communications Modules www.icst.com/Comm-Modules  
tel: 508-852-5400  
M840 Series  
Performance Specifications  
MECHANICAL DIMENSIONS & PIN CONFIGURATION  
"B  
"A  
.50  
[12.7]  
6 EQ SP @  
.248  
[6.29]  
5X Ø.030  
[Ø.76]  
2X Ø.036  
[Ø.91]  
5X .29  
[7.4]  
4X .375  
[9.53]  
4X .197  
[5.00]  
"B  
"B  
"B  
"A  
.400  
[10.16]  
"A  
"A  
1.100  
.100  
[2.54]  
1.897  
[48.18]  
4X SMA CONN  
2.684  
[68.17]  
3.000  
[76.20]  
3.200  
[81.28]  
COVER SCR'S  
(FL HD-TOP & BOTTOM)  
REF  
MARKING  
3X #2-56UNC-2B THD THRU  
CODED "A"  
1X #2-56UNC-2B X .12 [3.05] MIN  
FULL THD DEPTH  
"A  
"A  
"A  
"A  
COVER  
"A  
CODED "B"  
7X Ø.093 AT ENTRY  
[Ø2.36]  
COVER  
"A  
.100  
[2.54]  
1.575  
[40.01]  
1.375  
[34.93]  
.625±.020  
[15.88±.51]  
PIN DESIGNATIONS  
CLOCK FREQUENCY  
CONTROL MATRIX  
Symbol  
Din  
Name  
Data Input  
Description  
AC coupled 50data input  
AC coupled 50data output  
AC coupled 50clock output  
AC coupled 50clock output (1/4 freq. of Cout)  
Switch control LSB TTL input signal  
Switch Control  
Cont 2 Cont 1  
0
0
1
1
Dout  
Data Output  
Clock Frequency  
10.709 GHz  
Cout  
OC-192 Clock Output (sinusoidal)  
OC-48 Clock Output (sinusoidal)  
Frequency Control Line 1  
Frequency Control Line 2  
Loss of Lock Alarm  
0
1
0
1
1/4 Cout  
Cont1  
Cont2  
ALM  
10.664 GHz  
10.3125 GHz  
9.953 GHz  
Switch control MSB TTL input signal  
TTL output for PLL lock. “0” is locked; “1” is unlocked  
GND  
Vee  
Vcc  
Ground Connection  
Negative DC Power Supply  
Positive DC Power Supply  
Pins to connect power and control returns through case  
-5VDC Power Supply Input  
+5VDC Power Supply Input  
ORDERING INFORMATION  
M844 D XA XB XC XD  
Part Number  
VCSO FREQUENCIES AVAILABLE  
No. of Frequencies (1-4)  
Frequency 1  
(9.953 GHz)  
Frequency 2 (if applicable)  
(10.3125 GHz)  
XA  
XB  
XC  
XD  
9.953 GHz  
10.3125 GHz  
10.664 GHz  
10.709 GHz  
Frequency 3 (if applicable)  
(10.664 GHz)  
Frequency 4 (if applicable)  
(10.709 GHz)  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any information  
being relied upon by the customer is current and accurate.  
Integrated Circuit Systems, Inc.  
Communications Modules  
324 Clark Street Worcester, MA 01606 tel: 508-852-5400 fax: 508-852-8456  
European Sales Headquarters Hertogsingel 20 6214 AD Maastricht The Netherlands tel: +31-43-32-70912 fax: +31-43-32-70715  
Rev. 19.0  
www.icst.com/Comm-Modules  

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