MK1707DILF [ICSI]
Low EMI Clock Generator; 低EMI时钟发生器
| 型号： | MK1707DILF |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | Low EMI Clock Generator |
| 文件： | 总7页 (文件大小：135K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MK1707D
Low EMI Clock Generator
Description
Features
The MK1707D generates a low EMI output clock from a
crystal clock input. The part is designed to dither the
LCD interface clock for flat panel graphics controllers.
The device uses ICS’ proprietary mix of analog and
digital Phase-Locked Loop (PLL) technology to spread
the frequency spectrum of the output, thereby reducing
the frequency amplitude peaks by several dB.
• Packaged in 8-pin SOIC
• Available in Pb (lead) free package
• Provides a spread spectrum output clock
• Supports flat panel controllers
• Accepts a crystal or clock input to provide same
frequency dithered output
• Input operating frequencies of 25-54 and 50-108
MHz
The MK1707D offers centered spread from a wide
range of input clock frequencies.
• Peak reduction by 7dB to 14dB typical on 3rd through
ICS offers many other clocks for computers and
computer peripherals. Consult ICS when you need to
replace multiple crystals and oscillators from your
board.
19th odd harmonics
• Low EMI feature can be disabled
• Includes power down
• Operating voltage of 3.3 V
• Industrial temperature range available
• Advanced, low-power CMOS process
Block Diagram
VDD
2
S1:0
Low EMI Enable
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
Clock Out
X1/ICLK
Input
Buffer
X2
Load capacitors required
for crystal input
GND
MDS 1707D F
1
Revision 102804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1707D
Low EMI Clock Generator
Pin Assignment
Spread Selection Table (MHz)
S1
S0
Spread
Spread (%)
Input
Pin 7 Pin 6
Direction
Frequency
X1/ICLK
VDD
8
7
6
5
1
2
3
4
X2
0
0
0
1
1
1
0
M
1
Center
Center
Center
Center
Center
Center
1.15
0.95
1.9
25-54
25-54
50-108
25-54
25-54
50-108
S1
GND
S0
CLK
LEE
0
1.6
M
1
1.9
8 pin (150 mil) SOIC
0.6
0 = connect to GND
M = unconnected (floating) has internal resistor
network Leave it open (unconnected)
1 = connect to VDD
Pin Descriptions
Pin
Pin
Pin Type
Pin Description
Number
Name
1
2
3
4
5
X1/ICLK
VDD
Input
Crystal connection. Connect crystal or clock input.
Power Connect to +3.3 V.
GND
CLK
Power Connect to ground.
Output Spread spectrum clock output per table above.
LEE
Input
Input
Input
XO
Low EMI enable. Turns on spread spectrum when high. Internal pull-up
resistor. Disables the spread spectrum feature when low.
6
7
8
S0
S1
X2
Function select input. Selects spread amount and direction per table above.
Internal mid-level.
Function select 1 input. Selects spread amount and direction per table
above. Internal mid-level.
Crystal connection. Leave unconnected for clock input.
MDS 1707D F
2
Revision 102804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1707D
Low EMI Clock Generator
PCB layout Recommendations
External Components
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
The MK1707D requires a minimum number of external
components for proper operation.
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
the decoupling capacitor and VDD pin. The PCB trace
to VDD pin should be kept as short as possible, as
should the PCB trace to the ground via.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 2 and 3, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
2) To minimize EMI, the 33Ω series termination resistor
(if needed) should be placed close to the clock output.
Series Termination Resistor
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the MK1707D. This includes signal traces
just underneath the device, or on layers adjacent to the
ground plane layer used by the device.
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50Ω trace (a commonly used
trace impedance), place a 33Ω resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω.
.
Select Pin Operation
The S1, S0 select pins are 2-level, meaning they have
three separate states to make the selections shown in
the table on page 2.
MDS 1707D F
3
Revision 102804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1707D
Low EMI Clock Generator
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK1707D. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +70°C
-40 to +85°C
-65 to +150°C
125°C
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Storage Temperature
Junction Temperature
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
°C
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Power Supply Voltage (measured in respect to GND)
0
-40
+85
°C
+3.135
3.3
+3.465
V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±±%, Ambient Temperature 0 to +70°C
Parameter
Operating Voltage
Input Low Voltage
Input High Voltage
Supply Current
Symbol
Conditions
Min.
Typ.
Max.
Units
VDD
3.135
3.3
3.465
0.5
V
V
V
S0, S1 pins
IL
V
S0, S1 pins
No load, at 3.3 V
LEE pins
2.7
2.0
V
IH
IDD
20
mA
V
Input High Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
Output Low Voltage
Input Capacitance
V
IH
V
LEE pins
0.5
0.4
V
IL
V
V
CMOS, I = -4 mA
VDD-0.4
2.4
V
OH
OH
OH
I
I
= -12 mA
= -12 mA
V
OH
OL
V
V
OL
C
S0, S1, LEE pins
5
pF
IN
MDS 1707D F
4
Revision 102804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1707D
Low EMI Clock Generator
MDS 1707D F
5
Revision 102804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1707D
Low EMI Clock Generator
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±±%, Ambient Temperature 0 to +70° C
Parameter
Input/Output Clock Frequency
Input Clock Duty Cycle
Output Clock Duty Cycle
Output Rise Time
Symbol
Conditions
Min.
25
Typ. Max. Units
108
80
MHz
%
Time above VDD/2
Time above 1.5 V
0.8 to 2.0 V
20
40
50
1.5
60
%
t
ns
OR
Output Fall Time
t
2.0 to 0.8 V
1.5
ns
OF
EMI Peak Frequency Reduction
3rd through 19th odd
harmonics
7 to 14
dB
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
150
140
120
40
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
MDS 1707D F
6
Revision 102804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1707D
Low EMI Clock Generator
Package Outline and Package Dimensions (8-pin SOIC, 1±0 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters
Inches
Symbol
A
Min
Max
1.75
0.25
0.51
0.25
5.00
4.00
Min
Max
1.35
0.10
0.33
0.19
4.80
3.80
.0532
.0040
.013
.0075
.1890
.1497
.0688
.0098
.020
.0098
.1968
.1574
A1
E
H
INDEX
AREA
B
C
D
E
e
1
2
1.27 BASIC
0.050 BASIC
H
h
L
5.80
0.25
0.40
0°
6.20
.2284
.010
.016
0°
.2440
.020
.050
8°
D
0.50
1.27
8°
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
MK1707D
Marking
Shipping Packaging
Tubes
Package
Temperature
0 to +70° C
0 to +70° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
MK1707D
MK1707D
1707DLF
1707DLF
1707DI
1707DI
1707DIL
1707DIL
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
MK1707DTR
MK1707DLF
MK1707DLFTR
MK1707DI
MK1707DITR
MK1707DILF
MK1707DILFTR
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
“LF” denotes Pb (lead) free packaging.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 1707D F
7
Revision 102804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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