MK2732-06GITR [ICSI]
Low Phase Noise VCXO+Multiplier; 低相位噪声压控+乘法器型号: | MK2732-06GITR |
厂家: | INTEGRATED CIRCUIT SOLUTION INC |
描述: | Low Phase Noise VCXO+Multiplier |
文件: | 总4页 (文件大小:68K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PRELIMINARY INFORMATION
MK2732-06
Low Phase Noise VCXO+Multiplier
Features
Description
The MK2732-06 is a low cost, low jitter, high
performance VCXO and PLL clock synthesizer
designed to replace expensive discrete VCXOs
and multipliers. The on-chip Voltage Controlled
Crystal Oscillator (VCXO) accepts a 0 to 3 V
input voltage to cause the output clocks to vary by
±100 ppm. Using ICS/MicroClock’s patented
VCXO and analog Phase-Locked Loop (PLL)
techniques, the device uses an inexpensive 10 MHz
to 14 MHz pullable crystal input to produce up to
three output clocks.
• Packaged in 16 pin TSSOP
• For xDSL chipsets
• For MPEG 2 decoders
• Replaces a VCXO and multiplier
• Uses an inexpensive pullable crystal
• On-chip patented VCXO with pull range of
200 ppm (±100 ppm) minimum
• VCXO tuning voltage of 0 to 3 V
• Zero ppm synthesis error in all clocks
• Full CMOS output swings with 25 mA output
drive capability at TTL levels
ICS manufactures the largest variety of clocks for
Set-top boxes and Communications. Consult ICS
to eliminate VCXOs, crystals, oscillators and
buffers from your board.
• Advanced, low power, sub-micron CMOS process
• 5 V operating voltage for core, ability to run
output clocks at 3.3V or 5V for easy interface
• Available in commercial and industrial temperature
versions
Block Diagram
VDD5
VDDIO
2
S1, S0
Output
Buffer
CLK1
CLK2
PLL/Clock
Synthesis
Circuitry
VIN
Output
Buffer
10-14 MHz X1
pullable
crystal
Voltage
Controlled
Crystal
Output
Buffer
Oscillator
X2
REFCLK
OE (all outputs)
MDS 2732-06 C
1
Revision 120600
Printed 12/21/00
Integrated Circuit Systems • 525 Race Street • San Jose • CA •95126 •(408) 295-9800tel•www.icst.com
PRELIMINARY INFORMATION
MK2732-06
Low Phase Noise VCXO+Multiplier
Pin Assignment
MK2732-06
Clock Select Table
S1 S0
Input
13.248
13.248
13.248
13.248
13.5
CLK1
52.992
13.248
13.248
52.992
54
CLK2
35.328
35.328
35.328
35.328
27
Refclk
off
off
on
0
0
0
M
1
16 X2
X1
1
2
3
4
5
6
7
8
15 REFCLK
14 NC
VDD5
0
VDD5
VIN
M
M
M
1
0
on
GND
13
M
1
off
on
12 CLK2
13.5
54
27
GND
GND
S1
0
13.5
27
54
on
11 VDDIO
1
M
1
Test mode
13.5
-
-
-
10
9
S0
1
27
27
on
OE
CLK1
0=connect directly to GND
M=leave unconnected (floating)
1=connect directly to VDDIO
off=output stopped low.
16 pin (173 mil) TSSOP
Pin Descriptions
Number
Name
X1
Type Description
1
2, 3
4
XI
P
Crystal connection. Connect to a pullable crystal of 10-14.318 MHz.
Core VDD. Connect to +5V.
VDD5
VIN
VI
P
Voltage Input to VCXO. Zero to 3V signal which controls the frequency of the VCXO.
Connect to ground.
5, 6, 13
7
GND
S1
TI
I
Select input #1. Selects outputs per table above. Do not exceed VDDIO.
Output Enable. Tri-states outputs when low. Do not exceed VDDIO.
Clock Output #1 per table above. Amplitude = VDDIO.
Select input #0. Selects outputs per table above. Do not exceed VDDIO.
Input and output VDD. Connect to +3.3V or +5V. Clock amplitude matches this voltage.
Clock Output #2 per table above. Amplitude = VDDIO.
Nothing is connected internally to this pin.
8
OE
9
CLK1
S0
O
TI
P
10
11
12
14
15
16
VDDIO
CLK2
NC
O
-
REFCLK
X2
O
XO
Buffered crystal VCXO clock
Crystal connection. Connect to a pullable crystal of 10-14 MHz.
Key: I = Input; TI = tri-level input; O = output; P = power supply connection; VI = analog voltage input;
XI, XO = crystal pins.
External Components
The MK2732-06 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01µF should be connected between VDD5 and GND on pins 3 and 5, and VDDIO and
GND on pins 11 and 13, as close to the MK2732-06 as possible. A series termination resistor of 33 Wmay
be used for each clock output. The input crystal must be connected as close to the chip as possible. The
input crystal should be a fundamental mode, parallel resonant, pullable, AT cut. A crystal with 14 pF load
capacitance is recommended. Consult ICS/MicroClock for recommended suppliers. IMPORTANT -
consult the application note MAN05 for layout guidelines.
MDS 2732-06 C
2
Revision 120600
Printed 12/21/00
Integrated Circuit Systems • 525 Race Street • San Jose • CA •95126 •(408) 295-9800tel•www.icst.com
PRELIMINARY INFORMATION
MK2732-06
Low Phase Noise VCXO+Multiplier
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
VDD+0.5
70
V
V
C
C
C
C
Inputs and Clock Outputs
Referenced to GND
-0.5
0
Ambient Operating Temperature
Ambient Operating Temperature, MK2732-06GI
Industrial Temperature
Max of 10 seconds
-40
85
Soldering Temperature
Storage temperature
260
-65
150
DC CHARACTERISTICS (VDD5 = 5.0V, VDD3.3 = 3.3V unless noted)
Core Operating Voltage, VDD5
I/O Operating Voltage, VDDIO
Input High Voltage, VIH, X1 pin only
Input Low Voltage, VIL, X1 pin only
Input High Voltage, VIH, binary input
Input Low Voltage, VIL, binary input
Input High Voltage, VIH, trinary inputs
Input Low Voltage, VIL, trinary inputs
Output High Voltage, VOH
4.75
3.13
3.5
5.0
3.3
2.5
2.5
5.25
5.25
V
V
V
1.5
0.8
0.5
0.4
V
OE
2
V
OE
V
S1, S0
VDD-0.5
2.4
V
S1, S0
V
IOH=-25mA
IOL=25mA
IOH=-8mA
No Load
No Load
Each output
S1, S0, OE
All clocks
V
Output Low Voltage, VOL
V
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD
Operating Supply Current, IDDIO
Short Circuit Current
VDD-0.4
V
23
5.8
±100
7
mA
mA
mA
pF
ppm
V
Input Capacitance
Frequency synthesis error
0
3
VIN, VCXO control voltage
0
AC CHARACTERISTICS (VDD5 = 5.0V, VDD3.3 = 3.3V unless noted)
Input Crystal Frequency
10
14
1.5
1.5
60
MH z
ns
Output Clock Rise Time
0.8 to 2.0V
2.0 to 0.8V
At VDDIO/2
Output Clock Fall Time
ns
Output Clock Duty Cycle
Maximum Absolute Jitter, short term
Phase Noise, relative to carrier
Output pullability, note 2
40
%
±150
-115
ps
10 kHz offset
dBc/Hz
ppm
0V £ VIN £ 3V
±100
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With an ICS/MicroClock approved pullable crystal.
MDS 2732-06 C
3
Revision 120600
Printed 12/21/00
Integrated Circuit Systems • 525 Race Street • San Jose • CA •95126 •(408) 295-9800tel•www.icst.com
PRELIMINARY INFORMATION
MK2732-06
Low Phase Noise VCXO+Multiplier
Package Outline and Package Dimensions
16 pin TSSOP
Millimeters
Symbol Min
Max
1.10
0.30
0.20
5.10
4.50
E
H
A
b
-
0.19
0.09
4.90
4.30
c
D
E
H
e
6.40 BSC
0.65 BSC
h x 45°
L
Q
0.50
0.05
0.70
0.15
D
A
c
Q
b
e
L
Ordering Information
Part/Order Number
MK2732-06G
Marking
Shipping packaging
tubes
Temperature
0 to 70 °C
ICS (top line)
16 pin TSSOP
16 pin TSSOP
16 pin TSSOP
16 pin TSSOP
MK2732-06GTR
MK2732-06GI
MK27326 (2nd line)
ICS (top line)
tape and reel
tubes
0 to 70 °C
-40 to -85 °C
-40 to -85 °C
MK2732-06GITR
MK27326I (2nd line)
tape and reel
Revision history:
Version Revision
Comments
Original
A
B
031199
040699
Corrected typo on package width from 73 to 173 mil. Added IDDIO, IDD, jitter. Changed 1M selection
to Test Mode. Changed aspect ratio of pinout package. Changed features to show xDSL and MPEG.
Added Industrial Temperature version of device (MK2732-06GI and MK2732-06GITR)
C
120600
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its
use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is
intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does
not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 2732-06 C
4
Revision 120600
Printed 12/21/00
Integrated Circuit Systems • 525 Race Street • San Jose • CA •95126 •(408) 295-9800tel•www.icst.com
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