MK3732-07S [ICSI]
ADSL VCXO CLOCK SOURCE; ADSL VCXO时钟源
| 型号： | MK3732-07S |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | ADSL VCXO CLOCK SOURCE |
| 文件： | 总6页 (文件大小：95K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MK3732-07
ADSL VCXO CLOCK SOURCE
Description
Features
The MK3732-07 is a low cost, low jitter, high
performance VCXO and PLL clock synthesizer
designed to replace expensive VCXO modules and
oscillators. The on-chip Voltage Controlled Crystal
Oscillator (VCXO) accepts a 0 to 3.3 V input voltage to
cause the output clocks to vary by +100 ppm. Using
ICS’ patented VCXO and analog Phase-Locked Loop
(PLL) techniques, the device uses an inexpensive
13.248 MHz pullable crystal input to produce one or
two output clocks.
• Packaged in 16 pin (150 mil) SOIC
• Replaces a VCXO and oscillator
• Ideal for Asymmetrical Digital Subscriber Line
(ADSL) chipsets
• Uses an inexpensive pullable crystal
• On-chip patented VCXO with pull range of 200 ppm
(+ 100 ppm) minimum
• VCXO tuning voltage of 0 to 3.3 V
• 12 mA output drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• Operating voltage of 3.3V
The MK3732-07 is a pin-to-pin replacement for the
MK2732-07 when using +3.3V supply voltage.
ICS manufactures the largest variety of xDSL clock
synthesizers for all applications. Consult ICS to
eliminate VCXOs, crystals, and oscillators from your
board.
• Industrial temperature range available
Block Diagram
V D D
3
3
S 2 :S 0
V I N
C L K 1
P LL/
C lock
S ynthesis
C ircuitry
X 1
X 2
V oltage
C ontrolled
C rystal
1 3 . 2 4 8 M H z
C L K 2
P u lla b le
C r y s ta l
O scillator
3
O E
G N D
MDS 3732-07 F
1
Revision 100102
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK3732-07
ADSL VCXO CLOCK SOURCE
Pin Assignment
Clock Select Table
S2 S1 S0 Input
CLK1 CLK2
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
M
1
13.248 35.328
29.4
47.1
40.4
35.328
Test
X2
X1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1
13.248 35.328
13.248 35.328
NC
VDD
VIN
GND
VDD
GND
S0
0
13.248
Test
42.4
Test
Test
Test
Test
VDD
GND
CLK1
CLK2
M
1
Test
Test
OE
0
Test
Test
S2
M
1
Test
Test
16 Pin (150 mil) SOIC
13.248 35.328
Off
0
13.248
13.248
13.248
2.208
24.73
49.46
Off
M
1
35.328
35.328
0=connect directly to GND
M=leave unconnected (floating)
1=connect directly to VDD
Pin Descriptions
Pin
Pin
Pin
Pin Description
Number
Name
Type
1
X2
X1
Input
Input
Crystal connection. Connect to a pullable crystal of 13.248 MHz.
Crystal connection. Connect to a pullable crystal of 13.248 MHz.
2
3,5,13
4
VDD
VIN
Power Connect to +3.3V.
Input Voltage input to VCXO. Zero to 3.3V signal which controls the VCXO
frequency.
6,12,14
GND
CLK1
CLK2
S2
Power Connect to ground.
7
8
Output Clock output #1 per table above.
Output Clock output #2 per table above.
9
Input
Input
Input
-
Select input #2. Selects outputs per table above. Internal pull-up resistor.
Output enable. Tri-states outputs when low. Internal pull-up resistor.
Select input #0. Selects outputs per table above.
10
11
15
16
OE
S0
NC
No connect. Do not connect anything to this pin.
S1
Input
Select input #1. Selects outputs per table above.
MDS 3732-07 F
2
Revision 100102
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK3732-07
ADSL VCXO CLOCK SOURCE
Crystal Tuning Load Capacitors
External Component Selection
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors
is determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The MK3732-07 requires a minimum number of
external components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01µF should be connected
between VDD and GND on pins 3 and 6, on pins 5 and
6, and on pins 13 and 14, as close to the MK3732-07
as possible. For optimum device performance, the
decoupling capacitors should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
To determine the need for and value of the crystal
adjustment capacitors, you will need a PC board of
your final layout, a frequency counter capable of about
1 ppm resolution and accuracy, two power supplies,
and some samples of the crystals which you plan to
use in production, along with measured initial accuracy
for each crystal at the specified crystal load
capacitance, CL.
Series Termination Resistor
When the PCB traces between the clock outputs and
the loads are over 1 inch, series termination should be
used. To series terminate a 50Ω trace (a commonly
used trace impedance) place a 33Ω resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω.
To determine the value of the crystal capacitors:
1. Connect VDD of the MK3732-07 to 3.3V. Connect
pin 4 of the MK3732-07 to the second power supply.
Adjust the voltage on pin 4 to 0V. Measure and record
the frequency of the CLK output.
Quartz Crystal
2. Adjust the voltage on pin 4 to 3.3V. Measure and
record the frequency of the same output.
The MK3732-07 VCXO function consists of the
external crystal and the integrated VCXO oscillator
circuit. To assure the best system performance
(frequency pull range) and reliability, a crystal device
with the recommended parameters must be used, and
the layout guidelines discussed in the following section
must be followed.
To calculate the centering error:
(f3.3V – ftarget) + (f0V – ftarget
)
Error = 106x ----------------------------------------------------------------------------- – errorxtal
ftarget
Where:
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The MK3732-07 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the MK3732-07 is designed to have zero
frequency error when the total of on-chip + stray
capacitance is 14pF.
ftarget = nominal crystal frequency
errorxtal =actual initial accuracy (in ppm) of the crystal
being measured
If the centering error is less than ±25 ppm, no
adjustment is needed. If the centering error is more
than 25ppm negative, the PC board has excessive
stray capacitance and a new PCB layout should be
considered to reduce stray capacitance. (Alternately,
the crystal may be re-specified to a higher load
capacitance. Contact ICS for details.) If the centering
error is more than 25ppm positive, add identical fixed
centering capacitors from each crystal pin to ground.
The value for each of these caps (in pF) is given by:
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the MK3732-07. There should be no via’s
between the crystal pins and the X1 and X2 device
pins. There should be no signal traces underneath or
close to the crystal.
Please see application note MAN05 for recommended
crystal parameters and suppliers.
MDS 3732-07 F
3
Revision 100102
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK3732-07
ADSL VCXO CLOCK SOURCE
External Capacitor =
assume it is 30 ppm/pF. After any changes, repeat the
measurement to verify that the remaining error is
acceptably low (typically less than ±25ppm).
2 x (centering error)/(trim sensitivity)
Trim sensitivity is a parameter which can be supplied
by your crystal vendor. If you do not know the value,
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK3732-07. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7V
-0.5V to VDD+0.5V
-40 to +85°C
-65 to +150°C
260°C
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+85
Units
°C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
-40
–
+3.15
+3.45
V
Refer to page 3
DC Electrical Characteristics
VDD=3.3V ±5% , Ambient temperature 0 to +70°C, unless stated otherwise
Parameter
Operating Voltage
Symbol
VDD
VOH
Conditions
Min.
3.15
2.4
Typ.
Max.
Units
3.3
3.45
V
V
V
V
Output High Voltage
Output Low Voltage
IOH = -12 mA
IOL = 12 mA
IOH = -8 mA
VOL
0.4
Output High Voltage (CMOS
Level)
VOH
VDD-0.4
2.0
Input High Voltage, binary
inputs
VIH
S2, S1, OE
V
Input High Voltage, trinary input
VIH
VIL
S0
VDD-0.5
V
V
Input Low Voltage, binary
inputs
S2, S1, OE
0.8
MDS 3732-07 F
4
Revision 100102
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK3732-07
ADSL VCXO CLOCK SOURCE
Parameter
Symbol
VIL
Conditions
S0
Min.
Typ.
Max.
Units
V
Input Low Voltage, trinary input
Operating Supply Current
Short Circuit Current
0.5
IDD
No load
12
±50
5
mA
mA
pF
IOS
Input Capacitance
S2:S0, OE
Both clocks
Frequency synthesis error
VIN, VCXO Control Voltage
0
ppm
V
VIA
0
3.3
AC Electrical Characteristics
VDD = 3.3V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Input Crystal Frequency
Output Clock Rise Time
Output Clock Fall Time
fin
tOR
tOF
tD
13.248
MHz
ns
0.8 to 2.0V
1.5
1.5
60
2.0 to 0.8V
At VDD/2
ns
Output Clock Duty
Cycle
40
%
Maximum Absolute
Jitter
tj
±150
-115
ps
Phase Noise, relative to
carrier
10 kHz offset
dBc/Hz
ppm
Output pullability, note 1
fP
0V < VIN < 3.3V
±100
Note 1: External pullable crystal must conform with those listed in application note MAN05
Thermal Characteristics
Parameter
Symbol
θJA
Conditions
Still air
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
120
115
105
58
°C/W
°C/W
°C/W
°C/W
θJA
1 m/s air flow
3 m/s air flow
θJA
Thermal Resistance Junction to Case
θJC
MDS 3732-07 F
5
Revision 100102
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK3732-07
ADSL VCXO CLOCK SOURCE
Package Outline and Package Dimensions (16 pin SOIC)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
16
Symbol
Min
Max
1.75
0.25
0.51
0.25
10.00
4.00
Min
Max
A
A1
B
1.35
0.10
0.33
0.19
9.80
3.80
.0532
.0040
.013
.0688
.0098
.020
E
H
INDEX
AREA
C
D
E
e
.0075
.3859
.1497
.0098
.3937
.1574
1.27 BASIC
0.050 BASIC
1
2
H
h
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
.2284
.010
.016
0°
.2440
.020
.050
8°
D
L
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
α
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
(Note 1)
Marking
Shipping
packaging
Tubes
Package
Temperature
MK3732-07S
MK3732-07STR
MK3732-07SI
MK3732-07S
MK3732-07S
MK3732-07SI
MK3732-07SI
16 pin SOIC
16 pin SOIC
16 pin SOIC
16 pin SOIC
0 to +70° C
0 to +70° C
Tape and Reel
Tubes
-40 to +85° C
-40 to +85° C
MK3732-07SITR
Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 3732-07 F
6
Revision 100102
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
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