MK5811 [ICSI]
Low EMI Clock Generator; 低EMI时钟发生器
| 型号： | MK5811 |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | Low EMI Clock Generator |
| 文件： | 总7页 (文件大小：152K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MK5811A
Low EMI Clock Generator
Description
Features
The MK5811A device generates a low EMI output clock
from a clock or crystal input. The device is designed to
dither a high emissions clock to lower EMI in consumer
applications. Using ICS’ proprietary mix of analog and
digital Phase Locked Loop (PLL) technology, the device
spreads the frequency spectrum of the output and
reduces the frequency amplitude peaks by several dB.
The MK5811A offers both centered and down spread
from a high-speed clock input.
• Packaged in 8-pin SOIC
• Available in Pb (lead) free package
• Provides a spread spectrum output clock
• Supports flat panel controllers
• Accepts a clock or crystal input (provides same
frequency dithered output)
• Input frequency range of 4 to 32 MHz
• Output frequency range of 4 to 32 MHz
• 1X frequency multiplication
For different multiplier configurations, use the MK5812
(2x) or MK5814 (4x).
• Center and down spread
ICS offers many other clocks for computers and
computer peripherals. Consult ICS when you need to
remove crystals and oscillators from your board.
• Peak reduction by 8 dB to 16 dB typical on 3rd
through 19th odd harmonics
• Low EMI feature can be disabled
• Includes power down
• Operating voltage of 3.3 V
• Advanced, low-power CMOS process
Block Diagram
VDD
2
S1:0
Spread Direction
FRSEL
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
SSCLK
X1/CLK
Clock Buffer/
Crystal
Ocsillator
X2
The crystal requires external capacitors for
accurate tuning of the clock
GND
MDS 5811A A
1
Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
MK5811A
Low EMI Clock Generator
Pin Assignment
Spread Direction and Spread
Percentage
S1
S0
Spread
Direction
Spread
Percentage
X1/ICLK
GND
S1
8
7
6
5
1
2
3
4
X2
Pin 3 Pin 4
0
0
0
M
1
Center
Center
Center
Center
No Spread
Down
±1.4
±1.1
±0.6
±0.5
-
VDD
FRSEL
SSCLK
0
S0
M
M
M
1
0
M
1
8-pin (150 mil) SOIC
-1.6
-2.0
-0.7
-3.0
0
Down
1
M
1
Down
1
Down
0 = connect to GND
M = unconnected (floating)
1 = connect directly to VDD
Frequency Selection
Product
FRSEL
(pin 6)
Input
Multiplier
Output
Freq. Range
Freq. Range
4.0 to 8.0 MHz
8.0 to 16.0MHz
16.0 to 32.0MHz
4.0 to 8.0 MHz
8.0 to 16.0MHz
16.0 to 32.0MHz
4.0 to 8.0 MHz
8.0 to 16.0MHz
16.0 to 32.0MHz
MK5811
0
1
X1
X1
X1
X2
X2
X2
X4
X4
X4
4.0 to 8.0 MHz
8.0 to 16.0MHz
16.0 to 32.0MHz
8.0 to 16.0MHz
16.0 to 32.0MHz
32.0 to 64.0MHz
16.0 to 32.0MHz
32.0 to 64.0MHz
64.0 to 128MHz
M
0
MK58121
MK58141
1
M
0
1
M
0 = connect to GND
M = unconnected (floating)
1 = connect directly to VDD
Note 1: The information in this datasheet does not
apply to the MK5812 and MK5814 as each have
independent datasheets available at www.icst.com.
MDS 5811A A
2
Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
MK5811A
Low EMI Clock Generator
Pin Descriptions
Pin
Number
Pin
Name
Pin Type
Pin Description
Connect to 4-32 MHz crystal or clock.
1
2
3
X1/ICLK
GND
S1
Input
Power Connect to ground.
Input
Function select 1 input. Selects spread amount and direction per table above.
(default-internal mid-level).
4
S0
Input
Function select 0 input. Selects spread amount and direction per table above.
(default-internal mid-level).
5
6
7
8
SSCLK
FRSEL
VDD
Output Clock output with Spread spectrum
Input Function select for input frequency range. Default to mid level “M”.
Power Connect to +3.3 V.
XO Crystal connection to 4-32 MHz crystal. Leave unconnected for clock
X2
PCB Layout Recommendations
External Components
For optimum device performance and lowest output
phase noise, observe the following guidelines:
The MK5811A requires a minimum number of external
components for proper operation.
1) Mount the 0.01µF decoupling capacitor on the
component side of the board as close to the VDD pin
as possible. No vias should be used between the
decoupling capacitor and VDD pin. The PCB trace to
the VDD pin and the PCB trace to the ground via
should be kept as short as possible.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 7 and 2. Connect the
capacitor as close to these pins as possible. For
optimum device performance, mount the decoupling
capacitor on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
2) To minimize EMI, place the 20Ω series-termination
resistor (if needed) close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, thus minimizing vias through
other signal layers. Other signal traces should be
routed away from the MK5811A device. This includes
signal traces located underneath the device, or on
layers adjacent to the ground plane layer used by the
device.
Series Termination Resistor
Use series termination when the PCB trace between
the clock output and the load is over 1 inch. To series
terminate a 50Ω trace (a commonly used trace
impedance), place a 20Ω resistor in series with the
clock line. Place the resistor as close to the clock
output pin as possible. The nominal impedance of the
clock output is 30Ω.
Crystal Information
The crystal used should be a fundamental mode (do
not use third overtone), parallel resonant crystal. To
optimize the initial accuracy, connect crystal capacitors
from pins X1 to ground and X2 to ground. The value of
these capacitors is given by the following equation:
Tri-level Select Pin Operation
The S1 and S0 select pins are tri-level, meaning that
they have three separate states to make the selections
shown in the table on page 2. To select the M (mid)
level, the connection to these pins must be eliminated
by either floating them originally, or tri-stating the GPIO
pins which drive the select pins.
Crystal caps (pF) = (C - 6) x 2
L
MDS 5811A A
3
Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
MK5811A
Low EMI Clock Generator
In the equation, C is the crystal load capacitance. For
L
example, a crystal with a 16 pF load capacitance uses
two 20 pF [(16-6) x 2] capacitors.
Modulation Rate
Spread Spectrum Profile
The MK5811A is a low EMI clock generator using a
optimized frequency slew rate algorithm to facilitate
down stream tracking of zero delay buffers and other
PLL devices.
T i m e
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK5811A. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device, at these or any other conditions, above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +85°C
-65 to +150°C
125°C
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+85
Units
°C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
0
+3.0
3.63
V
MDS 5811A A
4
Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
MK5811A
Low EMI Clock Generator
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 10%, Ambient Temperature 0 to +85°C
Parameter
Operating Voltage
Supply Current
Symbol
VDD
Conditions
Min.
Typ.
3.3
Max.
3.63
Units
V
3.0
IDD
No load, at 3.3 V, Fin=12 MHz
No load, at 3.3 V, Fin=24 MHz
No load, at 3.3 V, Fin=32 MHz
23
25
mA
mA
mA
V
30
35
Input High Voltage
Input middle Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
Output Low Voltage
V
0.85VDD
0.4VDD
0.0
VDD
0.5VDD
0.0
VDD
0.6VDD
0.15VDD
IH
V
V
IHM
V
V
IL
V
V
CMOS, I = 12 mA
2.4
V
OH
OH
OH
I
I
I
= 24 mA
= -12 mA
= -24 mA
2.0
V
OH
OL
OL
V
0.4
1.2
6
V
OL
V
Input Capacitance
C
C
S0, S1, FRSEL pins
X1, X2 pins
4
6
pF
pF
Ω
IN1
9
IN2
Nominal Output
Impedance
Z
30
O
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 10%, Ambient Temperature 0 to +85° C, C = 15 pF
L
Parameter
Input Clock Frequency
Output Clock Frequency
Input Clock Duty Cycle
Output Clock Duty Cycle
Symbol
Conditions
Min.
4
Typ. Max. Units
32
32
MHz
MHz
%
4
Time above VDD/2
Time above 1.5 V
Fin=4MHz, Fout=4 MHz
Fin=8MHz, Fout=8 MHz
0.4 to 2.4 V
40
45
60
50
350
55
%
1
Cycle-to-cycle Jitter
800
450
ps
1
Cycle-to-cycle Jitter
250
ps
Output Rise Time
t
1.2
ns
R
Output Fall Time
t
2.4 to 0.4 V
1.2
ns
F
EMI Peak Frequency Reduction
8 to 16
dB
Note 1: Spread is enabled.
MDS 5811A A
5
Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
MK5811A
Low EMI Clock Generator
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
8
Symbol
Min
Max
1.75
0.25
0.51
0.25
5.00
4.00
Min
Max
A
A1
B
C
D
E
e
1.35
0.10
0.33
0.19
4.80
3.80
.0532
.0040
.013
.0075
.1890
.1497
.0688
.0098
.020
.0098
.1968
.1574
E
H
INDEX
AREA
1.27 BASIC
0.050 BASIC
1
2
H
h
L
5.80
0.25
0.40
0°
6.20
.2284
.010
.016
0°
.2440
.020
.050
8°
0.50
1.27
8°
D
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
Thermal Characteristics for 8-pin SOIC
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
150
140
120
40
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
MDS 5811A A
6
Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
MK5811A
Low EMI Clock Generator
Ordering Information
Part / Order Number
MK5811AS
Marking
5811AS
5811AS
5811ASL
5811ASL
Shipping Packaging
Tubes
Package
Temperature
0 to +85° C
0 to +85° C
0 to +85° C
0 to +85° C
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
MK5811ASTR
MK5811ASLF
MK5811ASLFTR
Tape and Reel
Tubes
Tape and Reel
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS
compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc. (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 5811A A
7
Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
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