2402MT [IDT]
PLL Based Clock Driver, 2402 Series, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8;![2402MT](http://pdffile.icpdf.com/pdf2/p00308/img/icpdf/2402MT_1856491_icpdf.jpg)
型号: | 2402MT |
厂家: | ![]() |
描述: | PLL Based Clock Driver, 2402 Series, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8 驱动 光电二极管 逻辑集成电路 |
文件: | 总8页 (文件大小:183K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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DATASHEET
MULTIPLIER AND ZERO DELAY BUFFER
ICS2402
Description
Features
The ICS2402 is a high-performance Zero Delay Buffer
(ZDB) which integrates IDT’s proprietary analog/digital
Phase-Locked Loop (PLL) techniques. The chip is part
• 8-pin SOIC package
• Available in Pb (lead) free package
• Absolute jitter ±100 ps
• Propagation Delay of ±±00 ps
• Output multiplier of 2X
• Output clock frequency up to 80 MHz
TM
of IDT’s ClockBlocks family and was designed as a
performance upgrade to meet today’s higher speed and
lower voltage requirements. The zero delay feature
means that the rising edge of the input clock aligns with
the rising edges of both output clocks, giving the
appearance of no delay through the device.
• Can recover degraded input clock duty cycle
• Output clock duty cycle of 45/55
• Full CMOS clock swings with 25 mA drive capability
The ICS2402 is ideal for synchronizing outputs in a
large variety of systems, from personal computers to
data communications to graphics/video. By allowing
off-chip feedback paths, the device can eliminate the
delay through other devices.
at TTL levels
• Advanced, low power CMOS process
• Operating voltage of 3.3 V or 5 V
NOTE: EOL for non-green parts to occur on
5/13/10 per PDN U-09-01
Block Diagram
Phase
ICLK
Detector,
Charge
Pump,
S0
and
Loop
VCO
CLK1
Filter
divide
FBIN
by N
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Pin Assignment
ICLK
NC
8
7
6
5
1
2
3
4
CLK
VDD
S0
GND
FBIN
NC
8 pin (150 mil) SOIC
Clock Multiplier Decoding Table 1
(Multiplies Input clock by shown amount)
S0
CLK
0
1
2 X ICLK
ICLK
Pin Descriptions
Pin
Number
Pin
Name
ICLK
NC
Pin
Type
Input
—
Pin Description
1
2
3
4
5
±
7
8
Reference clock input.
No connect. Do not connect to anything.
GND
FBIN
NC
Power Connect to ground.
Input
—
Feedback clock input.
No connect. Do not connect to anything.
Select pin for Clock Multiplier Decoding Table above.
S0
Input
VDD
CLK
Power Connect to +3.3 V or +5.0 V.
Output Clock output per table above.
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External Components
The ICS2402 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be
connected close to the part to minimize lead inductance. No external power supply filtering is required for
this device. A 33Ω series terminating resistor can be used next to each output pin.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS2402. These ratings,
which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
-55 to 125°C
-±5 to +150° C
125°C
Ambient Temperature under Bias
Storage Temperature
Junction Temperature
Power Dissipation
0.5 W
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
° C
V
Ambient Operating Temperature
0
Power Supply Voltage (measured in respect to GND)
Power Supply Voltage (measured in respect to GND)
+4.5
+3.15
+5.0
+3.3
+5.5
+3.45
V
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DC Electrical Characteristics
VDD = 3.3 V ±±5, Ambient Temperature 0 to +70° C
Parameter
Operating Voltage
Operating Current
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Short Circuit Current
Input Capacitance
Symbol Conditions
Min.
Typ.
Max.
Units
V
VDD
IDD
3.15
3.45
20
mA
V
V
ICLK, FBIN, S0
ICLK, FBIN, S0
2
IH
V
0.8
0.4
V
IL
V
I
I
= -12 mA
= 12 mA
2.4
V
OH
OH
OL
V
V
OL
OS
I
CLK
S0
±50
5
mA
pF
C
IN
VDD = ± V ±105, Ambient Temperature 0 to +70°C
Parameter
Operating Voltage
Operating Current
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Short Circuit Current
Input Capacitance
Symbol Conditions
Min.
Typ.
Max.
Units
V
VDD
IDD
5 V
4.5
5.5
30
mA
V
V
ICLK, FBIN, S0
ICLK, FBIN, S0
0.7xVDD
4.5
IH
V
0.2xVDD
0.5
V
IL
V
I
I
= -12 mA
= 12 mA
V
OH
OH
OL
V
V
OL
SC
I
Each output
S0
±80
5
mA
pF
C
IN
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AC Electrical Characteristics
VDD = 3.3 V ±±5% or ± V ±105, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
10
Typ.
Max. Units
Input Frequency, ICLK
S0=1
80
40
80
MHz
MHz
MHz
ps
S0=0
10
Output Frequency, CLK
Input to Output Jitter
10
CLK>20 MHz, Note 2
Note 2
200
Absolute Short-term Jitter,
peak-to-peak
±100
ps
Input to Output Skew
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Note 1
-±00
45
±00
55
ps
ns
ns
%
20% to 80%, Note 2
80% to 20%, Note 2
At VDD/2, Note 2
1.5
1.5
50
Note 1: Assumes clocks with same rise time, measured from rising edges at VDD/2
Note 2: Measured with a 15 pF load.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
Still air
150
140
120
40
° C/W
° C/W
° C/W
° C/W
JA
θ
1 m/s air flow
3 m/s air flow
JA
θ
JA
Thermal Resistance Junction to Case
θ
JC
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Package Outline and Package Dimensions (8-pin SOIC% 1±0 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters
Inches
Min
Symbol
Min
Max
1.75
0.25
0.51
0.25
5.00
4.00
Max
.0±88
.0098
.020
A
A1
B
C
D
E
e
1.35
0.10
0.33
0.19
4.80
3.80
.0532
.0040
.013
E
H
INDEX
AREA
.0075
.1890
.1497
.0098
.19±8
.1574
1 2
1.27 BASIC
0.050 BASIC
H
h
5.80
0.25
0.40
0°
±.20
0.50
1.27
8°
.2284
.010
.01±
0°
.2440
.020
.050
8°
D
L
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
2402M*
Marking
ICS2402M
ICS2402M
2402MLF
2402MLF
Shipping Packaging
Tubes
Package
Temperature
0 to +70° C
0 to +70° C
0 to +70° C
0 to +70° C
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
2402MT*
2402MLF
2402MLFT
Tape and Reel
Tubes
Tape and Reel
*NOTE: EOL for non-green parts to occur on ±/13/10 per PDN U-09-01
“LF” denotes Pb (lead) free package.
While the information presented herein has been checked for both accuracy and reliability, IDT assumes no
responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result
from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other
extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves
the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product
for use in life support devices or critical medical instruments.
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Revision History
Rev. Originator
Date
Description of Change
B
C
P.Griffith
10/05/04 New device/datasheet for HP.
S. Gardner
11/04/04 Changed values for Abs. Jitter, Prop. Delay, and Output Clock Freq. in “Features” section;
removed secondary Input High/Low and Output High (CMOS) voltage specs in DC chars;
multiple updates to AC chars and added 5 V +/-10% rating; move from Preliminary to
Release.
D
E
P.Griffith
—
12/21/04 Added LF packaging and ordering information. Released from custom to standard device.
08/18/09 Added EOL note per PDN U-09-01.
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