71T016SA12BF1 [IDT]
Standard SRAM, 64KX16, 12ns, CMOS, PBGA48;
| 型号： | 71T016SA12BF1 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Standard SRAM, 64KX16, 12ns, CMOS, PBGA48 静态存储器 |
| 文件： | 总9页 (文件大小：137K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2.5V CMOS Static RAM
for Automotive Applications
1 Meg (64K x 16-Bit)
IDT71T016SA
Features
Description
◆
64K x 16 advanced high-speed CMOS Static RAM
TheIDT71T016isa1,048,576-bithigh-speedStaticRAMorganized
as64Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-
speedmemoryneedsforautomotiveapplications.
◆
Equal access and cycle times
— Automotive:12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
◆
◆
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 2.5V power supply
TheIDT71T016has anoutputenablepinwhichoperates as fastas
6ns,withaddressaccesstimesasfastas12ns.Allbidirectionalinputsand
outputsoftheIDT71T016areLVTTL-compatibleandoperationisfroma
single2.5Vsupply.Fullystaticasynchronouscircuitryisused,requiring
noclocks orrefreshforoperation.
◆
◆
◆
◆
Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball
Plastic FBGA packages
The IDT71T016 is packaged in a JEDEC standard a 44-pin Plastic
SOJ, 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
Functional Block Diagram
Output
Enable
Buffer
O E
Address
Buffers
Row / Column
Decoders
A0 – A15
I/O15
High
Byte
I/O
8
8
Chip
Enable
CS
Buffer
Buffer
I/O8
Sense
Amps
and
Write
Drivers
16
64K x 16
Memory
Array
Write
Enable
Buffer
W E
I/O7
I/O0
Low
Byte
I/O
8
8
Buffer
BHE
BLE
Byte
Enable
Buffers
6473 drw 01
AUGUST 2004
1
©2004 IntegratedDeviceTechnology,Inc.
DSC-6473/00
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Automotive Temperature Ranges
Pin Configurations
1
2
3
4
5
6
A
B
C
D
E
A0
A1
A2
NC
BLE
OE
A4
A3
A2
A1
A0
1
A5
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
2
A6
I/O8
I/O9
VSS
A3
A5
A4
A6
I/O0
I/O2
VDD
VSS
I/O6
I/O7
BHE
I/O10
I/O11
I/O12
I/O13
NC
CS
I/O1
I/O3
I/O4
I/O5
WE
A11
3
A7
4
O E
5
BHE
BLE
I/O15
I/O14
I/O13
I/O12
VSS
VDD
I/O11
I/O10
I/O9
I/O8
NC
C
6
S
I/O0
7
NC
NC
A14
A12
A9
A7
I/O1
I/O2
I/O3
VDD
VSS
I/O4
I/O5
I/O6
I/O7
W E
A15
A14
A13
A12
NC
8
9
VDD
I/O14
I/O15
NC
NC
A15
A13
A10
10
11
12
13
14
15
16
17
18
19
20
21
22
SO44-1
SO44-2
F
G
H
A8
NC
A8
6473 tbl 02a
A9
FBGA (BF48-1)
Top View
A10
A11
NC
Pin Description
6473 drw 02
A – A
Address Inputs
Input
0
15
TSOP
Top View
Chip Select
Input
Input
Input
Input
Input
I/O
CS
Write Enable
Output Enable
High Byte Enable
Low Byte Enable
Data Input/Output
2.5V Power
WE
OE
BHE
BLE
I/O0 – I/O15
VDD
VSS
Power
Gnd
Ground
6473 tbl 01
Truth Table(1)
I/O0-I/O7
I/O8-I/O15
High-Z
Function
CS
H
L
OE
X
L
WE
X
H
H
H
L
BLE
BHE
X
H
L
X
L
High-Z
DATAOUT
High-Z
DATAOUT
DATAIN
DATAIN
High-Z
High-Z
High-Z
Deselected – Standby
Low Byte Read
High Byte Read
Word Read
High-Z
L
L
H
L
DATAOUT
DATAOUT
DATAIN
High-Z
L
L
L
L
X
X
X
H
X
L
L
Word Write
L
L
L
H
L
Low Byte Write
High Byte Write
Outputs Disabled
Outputs Disabled
L
L
H
X
H
DATAIN
High-Z
L
H
X
X
H
L
High-Z
6473 tbl 02
NOTE:
1. H = VIH, L = VIL, X = Don't care.
6.422
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Automotive Temperature Ranges
Absolute Maximum Ratings(1)
Recommended Operating
TemperatureandSupplyVoltage
Symbol
Rating
Value
Unit
Grade
Temperature
-40°C to +125°C
-40°C to +105°C
-40°C to +85°C
0°C to +70°C
VSS
0V
0V
0V
0V
VDD
VDD
Supply Voltage Relative to
VSS
–0.5 to +4.6
V
Automotive Grade 1
Automotive Grade 2
Automotive Grade 3
Automotive Grade 4
See Below
See Below
See Below
See Below
Terminal Voltage Relative to
VSS
–0.5 to VDD+0.5
–55 to +125
V
VIN, VOUT
Ambient Temperature
Under Bias
TBIAS
oC
Recommended DC Operating6473 tbl 04
Conditions
TJ
Junction Temperature Range
Storage Temperature
Power Dissipation
–40 to +150
–65 to +150
1.25
oC
oC
W
TSTG
PT
Symbol
Parameter
Min.
2.375
0
Typ.
Max.
2.7
0
Unit
VDD
Supply Voltage
2.5
V
IOUT
DC Output Current
50
mA
Vss
Ground
0
V
NOTE:
6473 tbl 03
____
(1)
VIH
Input High Voltage
Input Low Voltage
1.7
VDD+0.3
0.8
V
1. StressesgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycause
permanentdamagetothedevice.Thisisastressratingonlyandfunctionaloperation
ofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperational
sections of this specification is not implied. Exposure to absolute maximum rating
conditionsforextendedperiodsmayaffectreliability.
____
VIL
–0.3(1)
V
NOTE:
6473 tbl 05
1. Refer to maximum overshoot/undershoot diagram below. The measured
voltage at device pin should not exceed half sinusoidal wave with 2V peak and
half period of 2ns.
Capacitance
(TA = +25°C, f = 1.0MHz)
MaximumOvershoot/Undershoot
Symbol
Parameter(1)
Input Capacitance
I/O Capacitance
Conditions
VIN = 3dV
VOUT = 3dV
Max. Unit
+2V
CIN
6
7
pF
V
IH
2ns
CI/O
pF
NOTE:
6473 tbl 06
2 ns
1. Thisparameterisguaranteedbydevicecharacterization,butnotproductiontested.
V
IL
-2V
DC Electrical Characteristics
(VDD = Min. to Max., Automotive Temperature Ranges)
6473 drw 12
IDT71T016SA
Symbol
|ILI|
Parameter
Input Leakage Current
Test Condition
VDD = Max., VIN = VSS to VDD
VDD = Max., = VIH, VOUT = VSS to VDD
Min.
Max.
Unit
µA
µA
V
___
5
5
___
___
|ILO|
Output Leakage Current
Output Low Voltage
Output High Voltage
CS
VOL
IOL = 1.0mA, VDD = Min.
IOH = -1.0mA, VDD = Min.
0.4
___
VOH
2.4
V
6473 tbl 07
DC Electrical Characteristics(1,2)
(VDD = Min. to Max., VLC = 0.2V, VHC = VDD – 0.2V, Automotive Temperature Ranges)
1
2
85
3 and 4
1
80
2
80
3 and 4
1
80
2
80
3 and 4
85
85
80
80
Dynamic Operating Current
CS
ICC
mA
(3)
(3)
< VLC, Outputs Ope n, VDD = Max., f = fMAX
(4)
Dynamic Standby Powe r Supply Current
CS > V, Outputs Ope n, V= Max., f = f
ISB
45
5
45
5
35
5
35
5
35
5
30
5
30
5
30
5
30
5
mA
mA
Full Standby Power Supply Current (static)
ISB1
CS > V, Outputs Ope n, V= Max., f = 0(3)
NOTES:
6437 tbl
8
1. Allvaluesaremaximumguaranteedvalues.
2. All inputs switch between 0.2V (Low) and VDD – 0.2V (High).
3. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing .
4. Typical values are measured at 2.5V, 25°C and with equal read and write cycles. This parameter is guaranteed by device characterization but is not production
tested.
6.42
3
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Automotive Temperature Ranges
AC Test Conditions
Input Pulse Levels
0V to 2.5V
1.5ns
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
(V /2)
DD
(V /2)
DD
See Figure 1, 2 and 3
6473 tbl 09
2.5V
320
AC Test Loads
OUT
DATA
+1.25V
350
5pF*
50
I/O
Z =
0
50
6473 drw 04
30pF
6473 drw 03
*Including jig and scope capacitance.
Figure 1. AC Test Load
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
7
6
5
4
3
t
AA, ACS
t
(Typical, ns)
2
1
•
180
8 20 40 60 80 100 120 140 160
CAPACITANCE (pF)
200
6473 drw 05
Figure 3. Output Capacitive Derating
6.442
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Automotive Temperature Ranges
AC Electrical Characteristics (VDD = Min. to Max., Automotive Temperature Ranges)
71T016SA12
71T016SA15
71T016SA20
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
READ CYCLE
____
____
____
tRC
Read Cycle Time
12
15
20
ns
ns
ns
ns
____
____
____
tAA
tACS
Address Access Time
12
15
20
____
____
____
Chip Select Access Time
Chip Select Low to Output in Low-Z
12
15
20
____
____
____
(1,2)
4
5
5
tCLZ
____
____
____
(1,2)
Chip Select High to Output in High-Z
Output Enable Low to Output Valid
Output Enable Low to Output in Low-Z
1
1
3
ns
ns
ns
tCHZ
____
____
____
tOE
6
7
8
____
____
____
(1,2)
0
0
0
tOLZ
____
____
____
(1,2)
Output Enable High to Output in High-Z
Output Hold from Address Change
Byte Enable Low to Output Valid
Byte Enable Low to Output in Low-Z
1
1
3
ns
ns
ns
ns
tOHZ
tOH
tBE
4
—
4
—
4
—
____
—
6
—
7
8
____
____
____
(1,2)
0
0
0
tBLZ
____
____
____
(1,2)
Byte Enable High to Output in High-Z
Chip Select Low to Power Up
1
1
3
ns
ns
ns
tBHZ
____
____
____
(3)
0
0
0
tPU
____
____
____
(3)
Chip Select High to Power Down
12
15
20
tPD
WRITE CYCLE
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
tWC
tAW
tCW
tBW
tAS
Write Cycle Time
12
8
8
8
0
0
8
6
0
15
10
10
10
0
20
12
12
12
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Select Low to End of Write
Byte Enable Low to End of Write
Address Set-up Time
tWR
tWP
tDW
tDH
Address Hold from End of Write
Write Pulse Width
0
0
10
7
12
9
Data Valid to End of Write
Data Hold Time
0
0
____
____
____
(1,2)
Write Enable High to Output in Low-Z
3
3
3
tOW
____
____
____
(1,2)
Write Enable Low to Output in High-Z
4
4
6
ns
tWHZ
6473 tbl 10
NOTES:
1. At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ, and tWHZ is less than tOW for any given device.
2. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
3. This parameter is guaranteed by design and not production tested.
Timing Waveform of Read Cycle No. 1(1,2,3)
t
RC
ADDRESS
DATAOUT
t
AA
tOH
DATAOUT VALID
t
OH
PREVIOUS DATAOUT VALID
6473 drw 06
NOTES:
1. WE is HIGH for Read Cycle.
2. Deviceiscontinuouslyselected,CSisLOW.
3. OE, BHE, and BLE are LOW.
6.42
5
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Automotive Temperature Ranges
Timing Waveform of Read Cycle No. 2(1)
t
RC
ADDRESS
t
AA
t
OH
O E
(3)
t
OHZ
t
OE
t
OLZ (3)
C
S
t
ACS (2)
(3)
(3)
t
CHZ
t
CLZ
BLE
BHE,
BE (2)
(3)
t
BHZ (3)
t
t
BLZ
DATA
OUT
DATA
VALID
OUT
PD
t
t
PU
I
CC
V
DD
Supply
Current
I
SB
6473 drw 07
NOTES:
1. WE is HIGH for Read Cycle.
2. AddressmustbevalidpriortoorcoincidentwiththelaterofCS,BHE,or BLE transitionLOW;otherwisetAA isthelimitingparameter.
3. Transitionismeasured±200mVfromsteadystate.
Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,4)
tWC
ADDRESS
tAW
C
(2)
(5)
(5)
S
BHE , BLE
W E
tCW
tCHZ
tBW
tWR
tBHZ
tWP
tAS
(5)
tWHZ
(5)
tOW
tDH
(3)
DATAOUT
PREVIOUS DATA VALID
DATA VALID
tDW
DATAIN
DATAIN VALID
6473 drw 08
NOTES:
1. A write occurs during the overlap of a LOW CS, LOW BHE or BLE, and a LOW WE.
2. OEis continuouslyHIGH. Ifduringa WEcontrolledwrite cycle OEis LOW, tWP mustbe greaterthanorequaltotWHZ+tDW toallowthe I/Odrivers toturnoffanddata tobe placed
onthe bus forthe requiredtDW. IfOEis HIGHduringaWE controlledwrite cycle, this requirementdoes notapplyandthe minimumwrite pulse is as shortas the specifiedtWP.
3. Duringthis period,I/Opins areintheoutputstate,andinputsignals mustnotbeapplied.
4. Ifthe CSLOWorBHEandBLELOWtransitionoccurssimultaneouslywithoraftertheWELOWtransition,theoutputsremaininahigh-impedancestate.
5. Transitionismeasured±200mVfromsteadystate.
6.462
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Automotive Temperature Ranges
Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,4)
tWC
ADDRESS
tAW
C
S
(2)
tAS
tCW
tBW
BHE, BLE
tWP
tWR
W E
DATAOUT
DATAIN
tDH
tDW
DATAIN VALID
6473 drw 09
Timing Waveform of Write Cycle No. 3 (BHE, BLE Controlled Timing)(1,4)
tWC
ADDRESS
tAW
C
S
(2)
tCW
tAS
tBW
BHE,BLE
tWP
tWR
W E
DATAOUT
DATAIN
tDH
tDW
DATAIN VALID
6473 drw 10
NOTES:
1. A write occurs during the overlap of a LOW CS, LOW BHE or BLE, and a LOW WE.
2. OEis continuouslyHIGH. Ifduringa WEcontrolledwrite cycle OEis LOW, tWP mustbe greaterthanorequaltotWHZ+tDW toallowthe I/Odrivers toturnoffanddata tobe placed
onthe bus forthe requiredtDW. IfOEis HIGHduringaWE controlledwrite cycle, this requirementdoes notapplyandthe minimumwrite pulse is as shortas the specifiedtWP.
3. Duringthis period,I/Opins areintheoutputstate,andinputsignals mustnotbeapplied.
4. Ifthe CSLOWorBHEandBLELOWtransitionoccurssimultaneouslywithoraftertheWELOWtransition,theoutputsremaininahigh-impedancestate.
5. Transitionismeasured±200mVfromsteadystate.
6.42
7
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Automotive Temperature Ranges
Ordering Information
IDT 71T016
SA
XX
XXX
X
Device
Type
Power
Speed
Package
Process/
Temperature
Range
1
2
3
4
Automotive Grade 1 (-40°C to +125°C)
Automotive Grade 2 (-40°C to +105°C)
Automotive Grade 3 (-40°C to +85°C)
Automotive Grade 4 (0°C to +70°C)
Y
PH
BF
400-mil SOJ (SO44-1)
400-mil TSOP Type II (SO44-2)
7.0 x 7.0 mm FBGA (BF48-1)
12
15
20
Speed in nanoseconds
6473 drw 11
6.482
IDT71T016SA, 2.5V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-bit)
Automotivel Temperature Ranges
Datasheet Document History
Rev
Date
Page
Description
0
09/30/04
p. 1-8
ReleasedAutomotivedatasheet
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9
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