74ALVCH162244PVG8 [IDT]

Bus Driver, ALVC/VCX/A Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, GREEN, SSOP-48;


型号：	74ALVCH162244PVG8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Bus Driver, ALVC/VCX/A Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, GREEN, SSOP-48 光电二极管
文件：	总6页 (文件大小：106K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT74ALVCH162244

3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

3.3V CMOS 16-BIT

IDT74ALVCH162244

BUFFER/DRIVER WITH

3-STATE OUTPUTS

AND BUS-HOLD

FEATURES:

DESCRIPTION:

• 0.5 MICRON CMOS Technology

This 16-bit buffer/driver is built using advanced dual metal CMOS

technology. The ALVCH162244is designedspecificallytoimprove the

performance and density of 3-state memory address drivers, clock

drivers,andbus-orientedreceivers andtransmitters.The device canbe

usedasfour4-bitbuffers,two8-bitbuffers,orone16-bitbuffer.Itprovides

trueoutputs andsymmetricalactive-lowoutput-enable(OE)inputs.

The ALVCH162244has series resistors inthe device outputstructure

whichwillsignificantlyreduce line noise whenusedwithlightloads.This

driver has been designed to drive ±12mA at the designated threshold

levels.

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• VCC = 2.5V ± 0.2V

• CMOS power levels (0.4μ W typ. static)

• Rail-to-Rail output swing for increased noise margin

• Available in SSOP and TSSOP packages

The ALVCH162244has “bus-hold”whichretains the inputs’laststate

whenevertheinputbus goes toahighimpedance.This prevents floating

inputs andeliminates the needforpull-up/downresistors.

DRIVE FEATURES:

• Balanced Output Drivers: ±12mA

• Low switching noise

APPLICATIONS:

• 3.3V high speed systems

• 3.3V and lower voltage computing systems

FUNCTIONALBLOCKDIAGRAM

¹OE

³OE

1A1

3A1

¹Y1

1Y2

¹Y3

¹Y4

³Y1

3Y2

³Y3

³Y4

¹A2

¹A3

³A2

³A3

³A4

¹A4

²OE

2A1

⁴OE

4A1

²Y1

2Y2

²Y3

²Y4

⁴Y1

4Y2

⁴Y3

⁴Y4

²A2

²A3

⁴A2

⁴A3

²A4

⁴A4

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

OCTOBER 2008

DSC-4562/4

IDT74ALVCH162244

3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

ABSOLUTEMAXIMUMRATINGS⁽¹⁾

PINCONFIGURATION

Symbol

Description

Max

Unit

(2)

VTERM

Terminal Voltage with Respect to GND

–0.5 to +4.6

(3)

VTERM

Terminal Voltage with Respect to GND –0.5 to VCC+0.5

1OE

1Y1

2OE

1A1

TSTG

IOUT

IIK

Storage Temperature

DC Output Current

–65 to +150

–50 to +50

±50

° C

Continuous Clamp Current,

VI < 0 or VI > VCC

¹Y2

¹A2

GND

1Y3

GND

1A3

IOK

Continuous Clamp Current, VO < 0

–50

ICC

ISS

Continuous Current through each

VCC or GND

±100

¹Y4

¹A4

NOTES:

VCC

²Y1

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

VCC

²A1

²Y2

²A2

2. V^CCterminals.

3. All terminals except V^CC.

GND

2Y3

GND

²A3

²Y4

²A4

CAPACITANCE (TA = +25°C, F = 1.0MHz)

Symbol

Parameter⁽¹⁾

Conditions

VIN = 0V

VOUT = 0V

VIN = 0V

Typ.

Max. Unit

³Y1

³A1

³A2

GND

3A3

³A4

VCC

⁴A1

CIN

Input Capacitance

Output Capacitance

I/O Port Capacitance

³Y2

GND

3Y3

COUT

CI/O

NOTE:

1. As applicable to the device type.

³Y4

V^CC

⁴Y1

PINDESCRIPTION

Pin Names

Description

⁴Y2

⁴A2

xOE

xAx

xYx

3-State Output Enable Inputs (Active LOW)

Data Inputs⁽¹⁾

GND

4Y3

GND

4A3

3-State Outputs

NOTE:

⁴Y4

⁴A4

1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.

⁴OE

³OE

(1)

FUNCTION TABLE (EACH 4-BIT BUFFER)

SSOP/ TSSOP

TOP VIEW

Inputs

Outputs

xOE

xAx

xYx

NOTE:

1. H = HIGH Voltage Level

X = Don’t Care

L = LOW Voltage Level

Z = High-Impedance

IDT74ALVCH162244

3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE

FollowingConditionsApplyUnlessOtherwiseSpecified:

OperatingCondition:TA = –40°C to +85°C

Symbol

Parameter

Test Conditions

Min.

1.7

Typ.⁽¹⁾

—

Max.

—

Unit

VIH

Input HIGH Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

VIL

Input LOW Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

0.7

0.8

IIH

IIL

Input HIGH Current

VCC = 3.6V

VI = VCC

—

µA

µ A

Input LOW Current

VI = GND

VO = VCC

VO = GND

IOZH

IOZL

VIK

High Impedance Output Current

(3-State Output pins)

—

Clamp Diode Voltage

VCC = 2.3V, IIN = –18mA

VCC = 3.3V

–0.7

–1.2

Input Hysteresis

—

100

0.1

—

µ A

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VCC = 3.6V

VIN = GND or VCC

ΔICC

Quiescent Power Supply Current

Variation

One input at VCC - 0.6V, other inputs at VCC or GND

—

750

µ A

NOTE:

1. Typical values are at VCC = 3.3V, +25°C ambient.

BUS-HOLDCHARACTERISTICS

Symbol

IBHH

Parameter⁽¹⁾

Test Conditions

VI = 2V

Min.

–75

Typ.⁽²⁾

—

Max.

—

Unit

Bus-HoldInputSustainCurrent

VCC = 3V

µ A

IBHL

VI = 0.8V

—

IBHH

Bus-HoldInputSustainCurrent

Bus-HoldInputOverdrive Current

VCC = 2.3V

VCC = 3.6V

VI = 1.7V

–45

—

µ A

IBHL

VI = 0.7V

—

IBHHO

VI = 0 to 3.6V

—

±500

IBHLO

NOTES:

1. Pins with Bus-Hold are identified in the pin description.

2. Typical values are at VCC = 3.3V, +25°C ambient.

IDT74ALVCH162244

3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

OUTPUTDRIVECHARACTERISTICS

Symbol

Parameter

TestConditions⁽¹⁾

Min.

VCC – 0.2

1.9

1.7

2.2

Max.

—

Unit

VOH

OutputHIGHVoltage

VCC = 2.3V to 3.6V

IOH = – 0.1mA

IOH = – 4mA

IOH = – 6mA

IOH = – 4mA

IOH = – 8mA

IOH = – 6mA

IOH = – 12mA

IOL = 0.1mA

IOL = 4mA

VCC = 2.3V

VCC = 2.7V

VCC = 3V

—

2.4

—

VOL

OutputLOWVoltage

VCC = 2.3V to 3.6V

VCC = 2.3V

—

0.2

0.4

0.55

0.4

0.6

0.55

0.8

—

IOL = 6mA

—

VCC = 2.7V

VCC = 3V

IOL = 4mA

—

IOL = 8mA

—

IOL = 6mA

—

IOL = 12mA

—

NOTE:

1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.

TA = – 40°C to + 85°C.

OPERATING CHARACTERISTICS, TA = 25°C

VCC = 2.5V ± 0.2V

VCC = 3.3V ± 0.3V

Symbol

CPD

Parameter

Test Conditions

Typical

Unit

PowerDissipationCapacitanceOutputsenabled

PowerDissipationCapacitanceOutputsdisabled

CL = 0pF, f = 10Mhz

CPD

SWITCHINGCHARACTERISTICS⁽¹⁾

VCC = 2.5V ± 0.2V

Min. Max.

4.9

VCC = 2.7V

VCC = 3.3V ± 0.3V

Symbol

tPLH

Parameter

Min.

Max.

Min.

Max.

Unit

PropagationDelay

xAx to xYx

—

4.7

4.2

tPHL

tPZH

OutputEnableTime

xOE to xYx

6.8

6.3

—

6.7

5.7

—

5.6

5.5

500

tPZL

tPHZ

OutputDisableTime

tPLZ

xOE to xYx

(2)

tSK(o)

OutputSkew

—

NOTES:

1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.

2. Skew between any two outputs of the same package and switching in the same direction.

IDT74ALVCH162244

3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

TESTCIRCUITSANDWAVEFORMS

VIH

SAME PHASE

INPUT TRANSITION

TESTCONDITIONS

tPHL

tPLH

Symbol VCC⁽¹⁾=3.3V±0.3V VCC⁽¹⁾=2.7V VCC⁽²⁾=2.5V±0.2V Unit

VOH

VOL

OUTPUT

VLOAD

VIH

2 x Vcc

Vcc

2.7

1.5

300

2.7

1.5

300

VIH

Vcc / 2

150

OPPOSITE PHASE

INPUT TRANSITION

VLZ

VHZ

150

ALVC Link

Propagation Delay

VLOAD

Open

GND

DISABLE

VCC

ENABLE

VIH

CONTROL

INPUT

500Ω

tPZL

tPLZ

VIN

VOUT

(1, 2)

Pulse

VLOAD/2

D.U.T.

VLOAD/2

OUTPUT

NORMALLY

LOW

SWITCH

Generator

V^LZ

VOL

CLOSED

500Ω

tPHZ

tPZH

OUTPUT

NORMALLY

HIGH

VOH

VHZ

SWITCH

OPEN

ALVC Link

Test Circuit for All Outputs

ALVC Link

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Enable and Disable Times

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

NOTES:

VIH

1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.

DATA

INPUT

t^SU

VIH

TIMING

INPUT

SWITCHPOSITION

Test

Switch

V^LOAD

GND

Open

tREM

VIH

ASYNCHRONOUS

CONTROL

Open Drain

Disable Low

Enable Low

VIH

SYNCHRONOUS

CONTROL

Disable High

Enable High

tSU

ALVC Link

All Other Tests

VIH

Set-up, Hold, and Release Times

INPUT

tPLH1

t^PHL1

V^OH

LOW-HIGH-LOW

PULSE

OUTPUT 1

OUTPUT 2

VOL

tSK (x)

VOH

VOL

HIGH-LOW-HIGH

PULSE

ALVC Link

tPLH2

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

tPHL2

Pulse Width

ALVC Link

Output Skew - tSK(X)

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.

IDT74ALVCH162244

3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

ALVC

XXX

Device Type Package

Bus-Hold Family

Temp. Range

Shrink Small Outline Package

PVG

SSOP - Green

Thin Shrink Small Outline Package

PAG

TSSOP - Green

16-Bit Buffer/Driver with 3-State Outputs

Double-Density with Resistors, 12mA

244

162

Bus-Hold

-40°C to +85°C

CORPORATE HEADQUARTERS

for SALES:

for Tech Support:

6024 Silver Creek Valley Road

San Jose, CA 95138

800-345-7015 or 408-284-8200

fax: 408-284-2775

logichelp@idt.com

www.idt.com

74ALVCH162244PVG8 [IDT]

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