74LVCH2245APY9 [IDT]
SSOP-20, Reel;![74LVCH2245APY9](http://pdffile.icpdf.com/pdf2/p00279/img/icpdf/74LVCH2245AP_1665863_icpdf.jpg)
型号: | 74LVCH2245APY9 |
厂家: | ![]() |
描述: | SSOP-20, Reel 光电二极管 逻辑集成电路 |
文件: | 总7页 (文件大小:68K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
![](http://public.icpdf.com/style/img/ads.jpg)
3.3V CMOS OCTAL BUS
TRANSCEIVER WITH 3-STATE
IDT74LVCH2245A
OUTPUTS, 5 VOLT TOLERANT I/O,
AND BUS-HOLD
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
This bus transceiver is built using advanced dual metal CMOS technol-
ogy. The LVCH2245A device is designed for asynchronous communica-
tion between data buses. The device transmits data from the A bus to the
B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to
disable the device so the buses are effectively isolated.
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V environment.
The LVCH2245A has series resistors in the output structure of the “B”
port,whichwillsignificantlyreducelinenoisewhenusedwithlightloads. The
driver has been designed to drive ±12mA at the designated threshold
levels. The "A" port has a ±24mA driver.
The LVCH2245A has “bus-hold” which retains the inputs' last state
whenevertheinputgoestoahigh-impedance.Thispreventsfloatinginputs
and eliminates the need for pull-up/down resistors.
• Available in SOIC, SSOP, QSOP, and TSSOP packages
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA (B Port)
• High Output Drivers: ±24mA (A Port)
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONALBLOCKDIAGRAM
1
DIR
19
OE
2
A1
18
B1
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
OCTOBER 1999
1
© 1999 Integrated Device Technology, Inc.
DSC-4937/1
IDT74LVCH2245A
3.3VCMOSOCTALBUSTRANSCEIVERWITH3-STATEOUTPUTS
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
VTERM
TSTG
Description
Terminal Voltage with Respect to GND
Storage Temperature
Max
Unit
V
–0.5 to +6.5
–65 to +150
–50 to +50
–50
°C
mA
mA
20
19
18
17
16
15
14
13
12
11
1
VCC
OE
B1
B2
DIR
A1
A2
IOUT
DC Output Current
IIK
IOK
Continuous Clamp Current,
VI < 0 or VO < 0
2
3
4
ICC
ISS
Continuous Current through each
VCC or GND
±100
mA
A3
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
A4
A5
B3
B4
B5
B6
B7
B8
5
6
A6
A7
7
8
CAPACITANCE (TA = +25°C, F = 1.0MHz)
A8
Parameter(1)
Conditions
VIN = 0V
VOUT = 0V
VIN = 0V
Typ.
Max. Unit
9
Symbol
CIN
Input Capacitance
Output Capacitance
I/O Port Capacitance
4.5
6
8
8
pF
pF
pF
10
GND
COUT
CI/O
5.5
6.5
NOTE:
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
1. As applicable to the device type.
PINDESCRIPTION
Pin Names
Description
OE
DIR
Ax
Output Enable Input (Active LOW)
Direction Control Output
Side A Inputs or 3-State Outputs(1)
Side B Inputs or 3-State Outputs(1)
Bx
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTIONTABLE(1)
Inputs
OE
L
DIR
L
Outputs
B Data to A Bus
L
H
A Data to B Bus
Isolation
H
X
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
2
IDT74LVCH2245A
INDUSTRIALTEMPERATURERANGE
3.3VCMOSOCTALBUSTRANSCEIVERWITH3-STATEOUTPUTS
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Operating Condition: TA = –40°C to +85°C
Symbol
Parameter
Test Conditions
Min.
1.7
2
Typ.(1)
—
Max.
—
Unit
VIH
Input HIGH Voltage Level
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
V
—
—
VIL
Input LOW Voltage Level
Input Leakage Current
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
—
—
—
—
0.7
0.8
V
IIH
IIL
VCC = 3.6V
VI = 0 to 5.5V
—
—
±5
µA
µA
IOZH
IOZL
High Impedance Output Current
(3-State Output pins)
VCC = 3.6V
VO = 0 to 5.5V
—
—
±10
IOFF
VIK
VH
Input/Output Power Off Leakage
Clamp Diode Voltage
VCC = 0V, VIN or VO ≤ 5.5V
—
—
—
±50
µA
V
VCC = 2.3V, IIN = –18mA
–0.7
–1.2
Input Hysteresis
VCC = 3.3V
VCC = 3.6V
—
—
100
—
—
10
mV
µA
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VIN = GND or VCC
3.6 ≤ VIN ≤ 5.5V(2)
—
—
—
—
10
500
∆ICC
Quiescent Power Supply Current
Variation
One input at VCC - 0.6V, other inputs at VCC or GND
µA
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. This applies in the disabled state only.
BUS-HOLDCHARACTERISTICS
Symbol
IBHH
Parameter(1)
Test Conditions
VI = 2V
Min.
–75
75
Typ.(2)
—
Max.
—
Unit
Bus-HoldInputSustainCurrent
VCC = 3V
µA
IBHL
VI = 0.8V
—
—
IBHH
Bus-HoldInputSustainCurrent
Bus-Hold Input Overdrive Current
VCC = 2.3V
VCC = 3.6V
VI = 1.7V
—
—
—
µA
µA
IBHL
VI = 0.7V
—
—
—
IBHHO
VI = 0 to 3.6V
—
—
±500
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3
IDT74LVCH2245A
3.3VCMOSOCTALBUSTRANSCEIVERWITH3-STATEOUTPUTS
INDUSTRIALTEMPERATURERANGE
OUTPUTDRIVECHARACTERISTICS(APORT)
Symbol
Parameter
TestConditions(1)
Min.
Max.
—
Unit
VOH
Output HIGH Voltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
IOH = – 6mA
IOH = – 12mA
VCC – 0.2
V
VCC = 2.3V
VCC = 2.3V
VCC = 2.7V
VCC = 3V
2
1.7
2.2
2.4
2
—
—
—
—
VCC = 3V
IOH = – 24mA
IOL = 0.1mA
IOL = 6mA
—
VOL
OutputLOWVoltage
VCC = 2.3V to 3.6V
VCC = 2.3V
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
V
IOL = 12mA
IOL = 12mA
IOL = 24mA
VCC = 2.7V
VCC = 3V
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OUTPUTDRIVECHARACTERISTICS(BPORT)
Symbol
Parameter
TestConditions(1)
Min.
Max.
—
Unit
VOH
Output HIGH Voltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
IOH = – 4mA
IOH = – 6mA
IOH = – 4mA
IOH = – 8mA
IOH = – 6mA
IOH = – 12mA
IOL = 0.1mA
IOL = 4mA
VCC – 0.2
V
VCC = 2.3V
VCC = 2.7V
VCC = 3V
1.9
1.7
2.2
2
—
—
—
—
2.4
2
—
—
VOL
OutputLOWVoltage
VCC = 2.3V to 3.6V
VCC = 2.3V
—
—
—
—
—
—
—
0.2
0.4
0.55
0.4
0.6
0.55
0.8
V
IOL = 6mA
VCC = 2.7V
VCC = 3V
IOL = 4mA
IOL = 8mA
IOL = 6mA
IOL = 12mA
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
4
IDT74LVCH2245A
INDUSTRIALTEMPERATURERANGE
3.3VCMOSOCTALBUSTRANSCEIVERWITH3-STATEOUTPUTS
OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C
Symbol
Parameter
Test Conditions
Typical
Unit
CPD
PowerDissipationCapacitanceperTransceiverOutputsenabled
PowerDissipationCapacitanceperTransceiverOutputsdisabled
CL = 0pF, f = 10Mhz
48
4
pF
CPD
SWITCHINGCHARACTERISTICS(APORT)(1)
VCC = 2.7V
Max.
VCC = 3.3V ± 0.3V
Symbol
Parameter
Min.
Min.
Max.
Unit
tPLH
tPHL
PropagationDelay
Bx to Ax
—
7.3
9.5
8.5
—
1.5
6.3
ns
ns
ns
ps
tPZH
tPZL
OutputEnableTime
OE to Ax
OutputDisableTime
OE to Ax
OutputSkew(2)
—
—
—
1.5
1.7
—
8.5
7.5
500
tPHZ
tPLZ
tSK(o)
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
SWITCHINGCHARACTERISTICS(BPORT)(1)
VCC = 2.7V
Max.
VCC = 3.3V ± 0.3V
Symbol
tPLH
Parameter
Min.
Min.
Max.
Unit
PropagationDelay
Ax to Bx
—
8.1
1.5
7.1
9
ns
tPHL
tPZH
OutputEnableTime
OE to Bx
—
—
10
1.5
1.7
ns
ns
tPZL
tPHZ
OutputDisableTime
9.2
8.2
tPLZ
OE to Bx
tSK(o)
OutputSkew(2)
—
—
—
500
ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5
IDT74LVCH2245A
3.3VCMOSOCTALBUSTRANSCEIVERWITH3-STATEOUTPUTS
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
TESTCONDITIONS
VIH
VT
0V
SAME PHASE
INPUT TRANSITION
Symbol VCC(1)=3.3V±0.3V VCC(1)=2.7V VCC(2)=2.5V±0.2V
Unit
V
tPHL
tPLH
VOH
VT
VOL
OUTPUT
VLOAD
VIH
6
6
2 x Vcc
Vcc
2.7
1.5
300
300
50
2.7
1.5
300
300
50
V
tPLH
tPHL
VT
Vcc / 2
150
V
VIH
VT
0V
OPPOSITE PHASE
INPUT TRANSITION
VLZ
VHZ
CL
mV
mV
pF
150
LVC Link
30
Propagation Delay
VLOAD
Open
GND
VCC
DISABLE
ENABLE
VIH
VT
0V
CONTROL
INPUT
500Ω
tPZL
tPLZ
VIN
VOUT
(1, 2)
Pulse
D.U.T.
VLOAD/2
VLOAD/2
Generator
OUTPUT
NORMALLY
LOW
SWITCH
VLOAD
VT
VOL+VLZ
VOL
500Ω
RT
tPHZ
tPZH
CL
VOH
VOH-VHZ
OUTPUT
NORMALLY
HIGH
SWITCH
GND
VT
LVC Link
0V
0V
Test Circuit for All Outputs
LVC Link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Enable and Disable Times
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
VIH
DATA
INPUT
SWITCHPOSITION
VT
0V
Test
Switch
VLOAD
GND
tSU
tH
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
TIMING
INPUT
Open Drain
Disable Low
Enable Low
tREM
ASYNCHRONOUS
CONTROL
Disable High
Enable High
SYNCHRONOUS
CONTROL
All Other Tests
Open
tSU
tH
VIH
LVC Link
VT
0V
Set-up, Hold, and Release Times
INPUT
tPLH1
tPHL1
VOH
VT
VOL
LOW-HIGH-LOW
OUTPUT 1
VT
PULSE
tSK (x)
tSK (x)
VOH
tW
VT
VOL
HIGH-LOW-HIGH
PULSE
OUTPUT 2
VT
LVC Link
tPLH2
tPHL2
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
LVC Link
Output Skew - tSK(X)
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
6
IDT74LVCH2245A
INDUSTRIALTEMPERATURERANGE
3.3VCMOSOCTALBUSTRANSCEIVERWITH3-STATEOUTPUTS
ORDERINGINFORMATION
IDT
XX
LVC
X
XXXX
XX
Device Type Package
Temp. Range
Bus-Hold
Small Outline IC (gull wing)
Shrink Small Outline Package
Quarter Size Small Outline Package
Thin Shrink Small Outline Package
SO
PY
Q
PG
2245A
Octal Bus Transceiver with 3-State Outputs, ±12mA (B port)
±24mA (A port)
H
Bus-hold
–40°C to +85°C
74
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
for Tech Support:
logichelp@idt.com
(408) 654-6459
www.idt.com
7
相关型号:
![](http://pdffile.icpdf.com/pdf2/p00228/img/page/74LVC22952AD_1337355_files/74LVC22952AD_1337355_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00228/img/page/74LVC22952AD_1337355_files/74LVC22952AD_1337355_2.jpg)
74LVCH22952AD-T
IC LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver
NXP
![](http://pdffile.icpdf.com/pdf2/p00228/img/page/74LVC22952AD_1337355_files/74LVC22952AD_1337355_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00228/img/page/74LVC22952AD_1337355_files/74LVC22952AD_1337355_2.jpg)
74LVCH22952ADB-T
IC LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver
NXP
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_1.jpg)
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_2.jpg)
74LVCH2373A
Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor 3-State
NXP
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_1.jpg)
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_2.jpg)
74LVCH2373AD
Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor 3-State
NXP
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_1.jpg)
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_2.jpg)
74LVCH2373AD-T
IC LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC, SOT-163-1, SO-20, Bus Driver/Transceiver
NXP
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_1.jpg)
![](http://pdffile.icpdf.com/pdf1/p00083/img/page/74LVCH2373A_437242_files/74LVCH2373A_437242_2.jpg)
74LVCH2373ADB
Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor 3-State
NXP
©2020 ICPDF网 联系我们和版权申明