91305AGILF [IDT]

HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay; 高性能通信BUFFER零输入 - 输出延迟
91305AGILF
型号: 91305AGILF
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay
高性能通信BUFFER零输入 - 输出延迟

时钟驱动器 逻辑集成电路 光电二极管 通信
文件: 总9页 (文件大小:163K)
中文:  中文翻译
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DATASHEET  
HIGH PERFORMANCE COMMUNICATION BUFFER  
ICS91305I  
Description  
Features  
The ICS91305I is a high performance, low skew, low jitter  
clock driver. It uses a phase lock loop (PLL) technology to  
align, in both phase and frequency, the REF input with the  
CLKOUT signal. It is designed to distribute high speed  
clocks in communication systems operating at speeds from  
10 to 133 MHz.  
Zero input - output delay  
Frequency range 10 - 133 MHz (3.3V)  
5V tolerant input REF  
High loop filter bandwidth ideal for Spread Spectrum  
applications  
Less than 200 ps Jitter between outputs  
Skew controlled outputs  
ICS91305I is a zero delay buffer that provides  
synchronization between the input and output. The  
synchronization is established via CLKOUT feed back to the  
input of the PLL. Since the skew between the input and  
output is less than +/- 350 pS, the part acts as a zero delay  
buffer.  
Skew less than 250 ps between outputs  
Available in 8 pin 150 mil SOIC & 173 mil TSSOP  
packages  
3.3V 10% operation  
The ICS91305I comes in an eight pin 150 mil SOIC  
package. It has five output clocks. In the absence of REF  
input, will be in the power down mode. In this mode, the PLL  
is turned off and the output buffers are pulled low. Power  
down mode provides the lowest power consumption for a  
standby condition.  
Supports industrial temperature range -40°C to 85°C  
Block Diagram  
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
1
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
Pin Configuration  
Pin Descriptions  
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
2
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the ICS91305I. These ratings, which are standard  
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other  
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over  
the recommended operating temperature range.  
Electrical Characteristics at 3.3V  
DC Characteristics  
PARAMETER  
Input Low Voltage  
Input High Voltage  
Input Low Current  
Input High Current  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
VIL  
0.8  
VIH  
IIL  
2.0  
V
VIN=0V  
19  
100.0  
250.0  
µA  
IIH  
VIN=VDD  
0.10  
µA  
Output Low  
Voltage1  
VOL  
IOL = 12mA  
0.25  
2.9  
0.4  
V
V
Output High  
Voltage1  
VOH  
IDD  
IOH = -12mA  
2.4  
Power Down  
Supply Current  
REF = 0 MHz  
0.3  
100.0  
80.0  
µA  
mA  
IDD  
Unloaded oututs at 66.66 MHz  
SEL inputs at VDD or GND  
Supply Current  
30.0  
Notes:  
1.Guaranteed by design and characterization. Not subject to 100% test.  
2.All Skew specifications are mesured with a 50Ω transmission line, load teminated with 50Ω to 1.4V.  
3.Duty cycle measured at 1.4V.  
4.Skew measured at 1.4V on rising edges. Loading must be equal on outputs.  
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
3
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
Switching Characteristics  
PARAMETER  
SYMBOL  
CONDITION  
MIN  
TYP  
MAX  
UNITS  
100.00  
(10)  
7.5  
(133)  
ns  
(MHz)  
Output period  
t1  
With CL=30pF  
100.00  
(10)  
7.5  
(133)  
ns  
(MHz)  
Input period  
Duty Cycle1  
Duty Cycle1  
t1  
With CL=30pF  
Dt1  
Dt2  
Measured at 1.4V; CL=30pF  
40.0  
45  
50  
50  
60  
55  
%
%
Measured at VDD/2 Fout  
<66.6MHz  
Measured between 0.8V and 2.0V:  
CL=30pF  
Rise Time1  
Fall Time1  
tr1  
tf1  
1.2  
1.2  
1.5  
1.5  
ns  
ns  
Measured between 2.0V and 0.8V;  
CL=30pF  
Delay, REF Rising  
Edge to CLKOUT  
Rising Edge1, 2  
Dr1  
Measured at 1.4V  
0
350  
ps  
Output to Output  
Skew1  
All outputs equally loaded,  
CL=20pF  
Tskew  
Tdsk-Tdsk  
Tcyc-Tcyc  
tLOCK  
250  
700  
200  
1.0  
ps  
ps  
ps  
ms  
ps  
ps  
Device to Device  
Skew1  
Measured at VDD/2 on the  
CLKOUT pins of devices  
0
Cycle to Cycle  
Jitter1  
Measured at 66.66 MHz, loaded  
outputs  
Stable power supply, valid clock  
presented on REF pin  
PLL Lock Time1  
Jitter; Absolute  
Jitter1  
@ 10,000 cycles  
CL = 30pF  
Tjabs  
-200  
70  
14  
200  
60  
@ 10,000 cycles  
CL = 30pF  
Jitter; 1 - Sigma1  
Tj1s  
Notes:  
1. Guaranteed by design and characterization. Not subject to 100% test.  
2. REF input has a threshold voltage of 1.4V  
3. All parameters expected with loaded outputs  
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
4
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
Output to Output Skew  
The skew between CLKOUT and the CLK(1-4) outputs is not dynamically adjusted by the PLL. Since CLKOUT is one of  
the inputs to the PLL, zero phase difference is maintained from REF to CLKOUT. If all outputs are equally loaded, zero phase  
difference will maintained from REF to all outputs.  
If applications requiring zero output-output skew, all the outputs must equally loaded.  
If the CLK(1-4) outputs are less loaded than CLKOUT, CLK(1-4) outputs will lead it; and if the CLK(1-4) is more loaded than  
CLKOUT, CLK(1-4) will lag the CLKOUT.  
Since the CLKOUT and the CLK(1-4) outputs are identical, they all start at the same time, but different loads cause them to  
have different rise times and different times crossing the measurement thresholds.  
Timing diagrams with different loading configurations  
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
5
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)  
Package dimensions are kept current with JEDEC Publication No. 95  
Millimeters  
Inches  
8
Symbol  
Min  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
Max  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
Min  
Max  
A
A1  
B
C
D
E
e
.0532  
.0040  
.013  
.0688  
.0098  
.020  
E
H
INDEX  
AREA  
.0075  
.1890  
.1497  
.0098  
.1968  
.1574  
1.27 BASIC  
0.050 BASIC  
1
2
H
h
5.80  
0.25  
0.40  
0°  
6.20  
.2284  
.010  
.016  
0°  
.2440  
.020  
.050  
8°  
0.50  
1.27  
8°  
D
L
α
A
h x 45  
A1  
C
- C -  
e
SEATING  
PLANE  
B
L
.10 (.004)  
C
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
6
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
Package Outline and Package Dimensions (8-pin TSSOP, 4.4 Mil. Body)  
Package dimensions are kept current with JEDEC Publication No. 95  
8
Millimeters  
Min Max  
Inches  
Symbol  
Min  
--  
Max  
A
A1  
A2  
b
--  
1.20  
0.15  
1.05  
0.30  
0.20  
3.10  
0.047  
0.006  
0.041  
0.012  
0.05  
0.80  
0.19  
0.09  
2.90  
0.002  
0.032  
0.007  
E1  
E
INDEX  
AREA  
C
0.0035 0.008  
0.114 0.122  
0.252 BASIC  
0.169 0.177  
0.0256 Basic  
D
E
6.40 BASIC  
1
2
E1  
e
4.30  
4.50  
0.65 Basic  
D
L
0.45  
0.75  
0.018  
0.030  
α
0°  
8°  
0°  
8°  
aaa  
-
0.10  
-
0.004  
A
2
A
A
1
c
- C -  
e
SEATING  
PLANE  
b
L
aaa  
C
Ordering Information  
Part / Order Number  
91305AMILF  
Marking  
305AMILF  
305AMILF  
305IL  
Shipping Packaging  
Tubes  
Package  
8-pin SOIC  
8-pin SOIC  
8-pin TSSOP  
8-pin TSSOP  
Temperature  
-40 to +85° C  
-40 to +85° C  
-40 to +85° C  
-40 to +85° C  
91305AMILFT  
91305AGILF  
91305AGILFT  
Tape and Reel  
Tubes  
Tape and Reel  
305IL  
"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.  
“A” is the device revision designator (will not correlate with the datasheet revision).  
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes  
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No  
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications  
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not  
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT  
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.  
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
7
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
Revision History  
Rev. Originator  
D. Chan  
Date  
Description of Change  
G
09/06/12 1. Updated ordering information to inlclude “I” for industrial temp range in ordering  
scheme.  
2. Re-created datasheet in latest template.  
IDT® HIGH PERFORMANCE COMMUNICATION BUFFER  
8
ICS91305I  
REV G 090612  
ICS91305I  
HIGH PERFORMANCE COMMUNICATION BUFFER  
SYNTHESIZERS  
Innovate with IDT and accelerate your future networks. Contact:  
www.IDT.com  
For Sales  
800-345-7015  
408-284-8200  
Fax: 408-284-2775  
For Tech Support  
www.idt.com/go/clockhelp  
pcclockhelp@idt.com  
Corporate Headquarters  
Integrated Device Technology, Inc.  
www.idt.com  
© 2012 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks of Integrated  
Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or  
registered trademarks used to identify products or services of their respective owners.  
Printed in USA  

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