ICS507M-01DPKLF [IDT]
Clock Generator, 200MHz, DIE;型号: | ICS507M-01DPKLF |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Clock Generator, 200MHz, DIE |
文件: | 总7页 (文件大小:135K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ICS507-01
PECL CLOCK SYNTHESIZER
Description
Features
The ICS507-01 is an inexpensive, simple way to
generate a low jitter 155.52 MHz (or other high speed)
differential PECL clock output from a low frequency
crystal input. Using Phase-Locked-Loop (PLL)
techniques, the devices use a standard fundamental
mode crystal to produce output clocks up to 200 MHz.
• Packaged in 16 pin SOIC
• Available in Pb (lead) free package
• Input crystal frequency of 5 - 27 MHz
• Input clock frequency of 5 - 52 MHz
• Enable usage of common low-cost crystal
Stored in each chip’s ROM is the ability to generate a
selection of different multiples of the input reference
frequency, including an exact 155.52 MHz clock from
common crystals. For lowest jitter and phase noise on
a 155.52 MHz clock, a 19.44 MHz crystal and the x8
selection can be used.
• Differential PECL output clock frequencies up to 200
MHz
• Duty cycle of 49/51
• Operation voltage of 3.3 V or 5.0 V ( 5ꢀ)
• Ideal for SONET applications and oscillator
manufacturers
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined nor guaranteed.
• Available in die form
• Industrial temperature versions available
• ICS507-02 is no longer available
Block Diagram
VDD
1.1 kohm
RES
270 ohm
2
PECL
S0:1
62 ohm
Clock
Synthesis
and Control
Circuitry
VDD
X1/ICLK
Clock
Crystal or
62 ohm
Buffer/
Crystal
clock input
PECL
Oscillator
X2
270 ohm
Output Enable
(both outputs)
GND
Output resistors shown are for unterminated lines. Refer to MAN09 for additional information.
MDS 507-01 I
1
Revision 041905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS507-01
PECL CLOCK SYNTHESIZER
Pin Assignment
Clock Multiplier Select Table
S1 S0
Multiplier
X1/ICLK
VDD
VDD
S1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
X2
0
0
0
M
1
9.72X*
10X
12X
6.25X
8X
NC
S0
0
OE
M
M
M
1
0
GND
GND
NC
NC
M
1
NC
RES
PECL
5X
PECL
0
2X
1
M
1
3X
16 Pin (150 mil) SOIC
1
4X
0 = connect pin directly to ground
1 = connect pin directly to VDD
M = leave unconnected (floating)
* At 3.3V, use this selection to get 155.52 MHz from a
16 MHz input.
For lowest phase noise generation of 155.52 MHz, use
a 19.44 MHz crystal and the 8X selection.
Pin Descriptions
Number
Name
Type
Description
1
XI/ICLK
Input
Crystal Connection. Connect to a fundamental parallel mode crystal, or
clock.
2
3
4
5
6
7
8
9
VDD
VDD
S1
Power Connect to +3.3 V or 5 V, and to VDD on pin 3.
Power Connect to VDD on pin 2. Decouple with pin 5.
Input
Multiplier select pin 1. Determines output frequency per table above.
GND
GND
NC
Power Connect to ground.
Power Connect to ground.
—
No connect. Do not connect this pin to anything.
PECL
PECL
Output PECL output. Connect to resistor load as shown on page 1.
Output Complimentary PECL output. Connect to resistor load as shown on
page 1.
10
11
12
13
14
15
16
RES
NC
NC
OE
S0
Input
—
Bias resistor input. Connect a resistor between this pin and VDD.
No connect. Do not connect this pin to anything.
—
No connect. Do not connect this pin to anything.
Input
Input
—
Output Enable. Tri-states both outputs when low. Internal pull-up.
Multiplier select pin 0. Determines output frequency per table above.
No connect. Do not connect this pin to anything.
NC
X2
Output Crystal Connection. Connect to crystal, or leave unconnected for clock
input.
MDS 507-01 I
2
Revision 041905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS507-01
PECL CLOCK SYNTHESIZER
High Frequency Differential PECl Oscillators
External Component Selection
The ICS507-01 plus a low frequency, fundamental
mode crystal can build a high frequency differential
output oscillator. For example, a 10 MHz crystal
connected to the ICS507-01 with the 12X output
selected (S1=0, S0=1) produces a 120 MHz PECL
output clock.
The ICS507-01 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01µF should be connected
between VDD and GND on pins 2 and 5, as close to the
ICS507-01 as possible. Other VDD and GND
Hi Frequency TCXO
Extending the previous application, an inexpensive, low
frequency TCXO can be built and the output frequency
can be multiplied using the ICS507-01. Since the
output of the chip is phase-locked to the input, the
ICS507-01 has no temperature dependence, and the
temperature coefficient of the combined system is the
same as that of the low frequency TCXO.
connections should be connected to those pins, or to
the VDD and GND planes on the board. A resistor must
be connected between the RES (pin 10) and VDD.
Another four resistors are needed for the PECL outputs
as shown on the block diagram on page 1. Suggested
values of these resistors are shown in the Block
Diagram, but they can be varied to change the
differential pair output swing, and the DC level; refer to
MAN09.
Hi Frequency VCXO
The bandwidth of the PLL is guaranteed to be greater
than 10 kHz. This means that the PLL will track any
modulation on the input with a frequency of less than
10 kHz. By using this property, a low frequency VCXO
can be built, and the output can then be multiplied with
the ICS507-01 to give a high frequency output, thereby
producing a high frequency VCXO.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS507-01. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +70°C
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Storage Temperature
-40 to +85°C
-65 to +150°C
260°C
Soldering Temperature
MDS 507-01 I
3
Revision 041905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS507-01
PECL CLOCK SYNTHESIZER
Recommended Operation Conditions
Parameter
Min.
0
Typ.
Max.
+70
Units
°C
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Power Supply Voltage (measured in respect to GND)
–
–
-40
+85
°C
+3.15
+3.45
V
DC Electrical Characteristics
VDD=5 V, unless stated otherwise
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Voltage
VDD
3.0
VDD/2+1 VDD/2
5.5
V
V
Input High Voltage
Input Low Voltage
V
ICLK only
IH
V
ICLK only
S0, S1
S0, S1
Note 2
VDD/2 VDD/2-1
0.5
V
IL
Input High Voltage
Input Low Voltage
V
VDD-0.5
VDD-1.2
V
IH
V
V
IL
Output High Voltage
Output Low Voltage
Operating Supply Current
V
V
OH
V
Note 2
VDD-2.0
63
V
OL
IDD
No load, 155.52
MHz, Note 3
mA
Internal Crystal Capacitance,
X1 and X2
Pins 1, 8
26
5
pF
pF
Input Capacitance
Notes:
S0, S1
1. All typical values are at 5.0 V and 25°C unless otherwise noted.
2. VOH and VOL can be set by the external resistor values on the PECL outputs.
3. IDD includes the current through the external resistors, which can be modified.
4. The phase relationship between input and output can change at power up. For a fixed phase
relationship, see one of the ICS zero delay buffers.
5. Except S1=0, S0=0 setting (This setting specific to 16 MHz in, 155.52 MHz out).
MDS 507-01 I
4
Revision 041905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS507-01
PECL CLOCK SYNTHESIZER
AC Electrical Characteristics
VDD = 3.3 V, 5 V unless stated otherwise
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Input Crystal Frequency
Input Clock Frequency
5
27
52
MHz
MHz
MHz
MHz
MHz
5
Output Frequency,
ICS507-01
f
VDD = 5 V
10
10
10
200
156
125
out
VDD = 3.3 V
Output Frequency,
ICS507-01I
f
VDD = 3.3 V or 5 V
out
Output Clock Duty Cycle
PLL Bandwidth
t
48
10
52
ꢀ
kHz
ps
D
Absolute Clock Period
Jitter
Deviation from Mean
75
20
One Sigma Clock Period
Jitter
ps
MDS 507-01 I
5
Revision 041905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS507-01
PECL CLOCK SYNTHESIZER
Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
16
Symbol
Min
Max
1.75
0.25
0.51
0.25
10.00
4.00
Min
Max
A
A1
B
C
D
E
e
1.35
0.10
0.33
0.19
9.80
3.80
.0532
.0040
.013
.0075
.3859
.1497
.0688
.0098
.020
.0098
.3937
.1574
E
H
INDEX
AREA
1.27 BASIC
0.050 BASIC
1
2
H
h
L
5.80
0.25
0.40
0°
6.20
.2284
.010
.016
0°
.2440
.020
.050
8°
D
0.50
1.27
8°
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
MDS 507-01 I
6
Revision 041905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS507-01
PECL CLOCK SYNTHESIZER
Ordering Information
Part/Order Number
ICS507M-01
Marking
Packaging
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Package
16-pin SOIC
16-pin SOIC
16-pin SOIC -40 to +85° C
16-pin SOIC -40 to +85° C 2500 pieces
16-pin SOIC
16-pin SOIC
16-pin SOIC -40 to +85° C
Temperature Min. Qty.
ICS507M-01
ICS507M-01
ICS507M-01I
ICS507M-01I
ICS507M-01LF
ICS507M-01LF
ICS507M01ILF
ICS507M01ILF
—
0 to +70° C
0 to +70° C
—
2500 pieces
—
ICS507M-01T
ICS507M-01I
ICS507M-01IT
ICS507M-01LF
ICS507M-01LFT
ICS507M-01ILF
ICS507M-01ILFT
ICS507M-01DSW
0 to +70° C
0 to +70° C
—
2500 pieces
—
Tape and Reel
Tubes
Tape and Reel
16-pin SOIC -40 to +85° C 2500 pieces
Probed wafers, cut, on
sticky tape
0 to +70° C
1 wafer
ICS507M-01DPK
ICS507M-01DWF
—
—
Tested die in waffle pack
Die on uncut, probed
wafers
0 to +70° C
0 to +70° C
1000 pieces
1 wafer
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 507-01 I
7
Revision 041905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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