ICS650R-21ILFT [IDT]
Processor Specific Clock Generator, 100MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20;
| 型号： | ICS650R-21ILFT |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Processor Specific Clock Generator, 100MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总8页 (文件大小：141K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
SYSTEM PERIPHERAL CLOCK SOURCE
ICS650-21
Description
Features
The ICS650-21 is a low cost, low-jitter, high-performance
clock synthesizer for system peripheral applications. Using
analog/digital Phase Locked Loop (PLL) techniques, the
device accepts a parallel resonant 25 MHz crystal input to
produce up to eight output clocks. The device provides
clocks for PCI, SCSI, Fast Ethernet, Ethernet, USB, and
AC97. The user can select one of three USB frequencies
and also one of two AC97 audio frequencies. The OE pin
puts all outputs into a high-impedance state for board level
testing. All frequencies are generated with less than one
ppm error, meeting the demands of SCSI and Ethernet
clocking.
• Packaged in 20-pin SSOP (QSOP)
• Pb (lead) free package, RoHS compliant
• Lower jitter version of ICS650-01
• Operating voltage of 3.3 V or 5 V
• Zero ppm synthesis error in all clocks
• Inexpensive 25 MHz crystal or clock input
• Provides Ethernet and Fast Ethernet clocks
• Provides SCSI clocks
• Provides PCI clocks
• Selectable AC97 audio clock
• Selectable USB clock
• OE pin tri-states the outputs for testing
• Selectable frequencies on three clocks
• Duty cycle of 45/55 for Processor clock and Audio clock
• Advanced, low-power CMOS process
• Industrial temperature range available
Block Diagram
VDD
3
2
3
Processor
Clocks
PSEL1:0
ASEL
Audio Clock
Clock
Synthesis
Circuitry
USEL
USB Clock
20 MHz
X1/ICLK
Crystal
Oscillator
25 MHz
Crystal or Clock
25 MHz
X2
2
Optional crystal
capacitors
OE (all outputs)
GND
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Pin Assignment
Processor Clock (MHz)
1
2
20
19
18
17
16
15
14
13
12
11
PSEL1
PSEL0
PCLK2
PCLK3
VDD
USEL
X2
PSEL1
PSEL0
PCLK1
PCLK2, 3
0
0
0
M
1
25
50
3
X1/ICLK
VDD
TEST MODE
TEST MODE
4
0
VDD
GND
5
M
M
M
1
0
40
80
6
ASEL
UCLK
M
1
33.3333
20
66.6667
40
7
GND
20M
ACLK
25M
8
OFF/14.318M
PCLK1
OE
9
0
20
33.3333
66.6667
100
10
1
M
1
20
1
50
20-pin (150 mil) SSOP
Audio Clock (MHz)
USB Clock (MHz)
ASEL
ACLK
49.152
24.576
14.318
USEL
UCLK
12
0
M
1
0
M
1
24
48
0 = connect directly to ground
1 = connect directly to VDD
M = leave unconnected (floating)
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
2
USEL
X2
Input
XO
UCLK select pin. Determines frequency of USB clock per table above.
Crystal connection. Connect to parallel mode 25 MHz crystal. Leave open
for clock.
3
4
X1/ICLK
VDD
XI
Crystal connection. Connect to parallel mode 25 MHz crystal or clock.
Power Connect to VDD. Must be same value as other VDD. Decouple with pin 6.
Power Connect to VDD. Must be same value as other VDD.
Power Connect to ground.
5
VDD
6
GND
UCLK
20M
7
Output USB clock output per table above.
8
Output Fixed 20 MHz output for Ethernet.
9
ACLK
25M
Output AC97 audio clock output per table above.
Output Fixed 25 MHz reference output for Fast Ethernet.
10
11
12
OE
Input
Output enable. Tri-states all outputs when low.
PCLK1
Output PCLK output number 1 per table above.
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Pin
Number
Pin
Name
Pin
Type
Pin Description
13
14
15
16
17
18
19
OFF/14.318M Output 14.31818 MHz clock output only when ASEL = VDD.
GND
ASEL
VDD
Power Connect to ground.
Input ACLK select pin. Determines frequency of audio clock per table above.
Power Connect to VDD. Must be same value as other VDD. Decouple with pin 14.
Output PCLK output number 3 per table above.
PCLK3
PCLK2
PSEL0
Output PCLK output number 2 per table above.
Input
Processor select pin #0. Determines frequencies on PCLKs 1-3 per table
above.
20
PSEL1
Input
Processor select pin #1. Determines frequencies on PCLKs 1-3 per table
above.
External Components
The ICS650-21 requires a minimum number of external
components for proper operation.
impedance) place a 33Ωresistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20Ω.
Decoupling Capacitor
Crystal Information
Decoupling capacitors of 0.01µF must be connected
between each VDD and GND (pins 4 and 6, pins 16 and 14),
as close to the device as possible. For optimum device
performance, the decoupling capacitor should be mounted
on the component side of the PCB. Avoid the use of vias in
the decoupling circuit.
The crystal used should be a fundamental mode (do not use
third overtone), parallel resonant. Crystal capacitors should
be connected from pins X1 to ground and X2 to ground to
optimize the initial accuracy. The value of these capacitors
is given by the following equation:
Crystal caps (pF) = (C - 6) x 2
L
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50Ω trace (a commonly used trace
In the equation, C is the crystal load capacitance. So, for a
crystal with a 16pF load capacitance, two 20 pF [(16-6) x 2]
capacitors should be used.
L
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Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS650-21. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
125°C
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
° C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
0
+3.0
+3.3
+5.5
V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±±%, Ambient Temperature 0 to +70°C
Parameter
Symbol
VDD
Conditions
Min.
Typ.
Max. Units
Operating Voltage
3.0
5.5
0.8
0.4
V
mA
V
Supply Current
IDD
No load, Note 1
Select inputs, OE
Select inputs, OE
30
Input High Voltage
Input Low Voltage
V
2
IH
V
V
IL
Output High Voltage
Output High Voltage
Output Low Voltage
Short Circuit Current
Input Capacitance, inputs
V
V
I
I
I
= -8 mA
= -8 mA
= 8 mA
VDD-0.4
2.4
V
OH
OH
OH
OH
OL
V
V
V
OL
I
CLK output
Except X1
50
5
mA
pF
OS
Note 1: With all clocks at highest frequencies.
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AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±±%, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Input Frequency
25
MHz
ppm
Output Clocks Accuracy
(synthesis error)
All clocks
1
Output Rise Time
t
0.8 to 2.0 V, Note 2
2.0 to 0.8 V, Note 2
UCLK, at VDD/2
PCLCK, ACLCK, at VDD/2
Except ACLK
1.5
1.5
50
ns
ns
%
OR
Output Fall Time
t
OF
Output Clock Duty Cycle
40
45
60
55
50
%
One Sigma Jitter
75
ps
ps
ps
ms
ACLK
120
Absolute Clock Period Jitter
Power-up Time
UCLK, 20M
-500
500
4
PLL lock time from power-up
to 1% of final value
1
Note 1: Values dependent on programming.
Note 2: Measured with 15 pF load.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
Still air
135
93
° C/W
° C/W
° C/W
° C/W
JA
JA
JA
JC
θ
θ
θ
1 m/s air flow
3 m/s air flow
78
Thermal Resistance Junction to Case
60
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Package Outline and Package Dimensions (20-pin SSOP, 1±0 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
20
Millimeters
Inches*
Min
Symbol
Min
1.35
0.10
--
Max
1.75
0.25
1.50
0.30
0.25
8.75
6.20
4.00
Max
.069
.010
.059
0.012
.010
.344
.244
.157
A
A1
A2
b
.053
.0040
--
0.008
.007
.337
.228
.150
E1
E
INDEX
AREA
0.20
0.18
8.55
5.80
3.80
C
D
E
1
2
E1
e
D
0.635 Basic
0.025 Basic
L
0.40
0°
1.27
.016
.050
α
8°
0°
8°
A
2
A
*For reference only. Controlling dimensions in mm.
A
1
c
- C -
e
SEATING
PLANE
b
L
.10 (.004)
C
Ordering Information
Part / Order Number
650R-21LF
Marking
ICS650R-21L
ICS650R-21L
650R-21ILF
650R-21ILF
Shipping Packaging
Tubes
Package
Temperature
20-pin SSOP
20-pin SSOP
20-pin SSOP
20-pin SSOP
0 to +70° C
0 to +70° C
-40 to 85° C
-40 to 85° C
650R-21LFT
Tape and Reel
Tubes
650R-21ILF
650R-21ILFT
Tape and Reel
“LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
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Revision History
Rev. Originator
Date
Description of Change
G
H
J
P. Griffith
02/15/06 Added “Power-up Time” spec in AC chars.
11/04/09 Added EOL note for non-green parts.
05/13/10 Removed EOL note and non-green parts.
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For Sales
800-345-7015
408-284-8200
Fax: 408-284-2775
For Tech Support
www.idt.com/go/clockhelp
Corporate Headquarters
Integrated Device Technology, Inc.
www.idt.com
© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device
Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered
trademarks used to identify products or services of their respective owners.
Printed in USA
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