ICS727MLF [IDT]
Clock Generator, 27MHz, PDSO8, 0.150 INCH, SOIC-8;
| 型号： | ICS727MLF |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Clock Generator, 27MHz, PDSO8, 0.150 INCH, SOIC-8 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总7页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS727
LOW COST 27 MHZ 3.3 VOLT VCXO
Description
Features
The ICS727 combines the functions of a VCXO
• Ideal for set-top box applications using 13.5 MHz
(Voltage Controlled Crystal Oscillator) and PLL (Phase
Locked Loop) frequency doubler onto a single chip.
Used in conjunction with an external pullable quartz
crystal, this monolithic integrated circuit replaces more
costly hybrid (canned) VCXO devices. The ICS727 is
designed primarily for data and clock recovery
applications within end products such as set-top box
receivers.
external pullable crystal to generate lock 27 MHz
clock transport video clock
• On-chip VCXO with guaranteed pull range of 110
ppm minimum
• VCXO input tuning voltage 0 to 3.3 V
• Packaged in 8-pin SOIC (150 mil wide)
The ICS727 exhibits a moderate VCXO gain of 110
ppm/V typical, when used with a high quality external
pullable quartz crystal.
The frequency of the on-chip VCXO is adjusted by an
external control voltage input into pin VIN. Because
VIN is a high impedance input, it can be driven directly
from an PWM RC integrator circuit. Frequency output
increases with VIN voltage input. The usable range of
VIN is 0 to 3 V.
Block Diagram
VIN
X1
Voltage
13.5 MHz
Pullable
Crystal
PLL
Frequency
Doubler
Controlled
27 MHz
(2x Crystal Frequency)
Crystal
Oscillator
X2
MDS 727 B
1
Revision 121404
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
ICS727
LOW COST 27 MHZ 3.3 VOLT VCXO
Pin Assignment
X1
VDD
VIN
8
7
6
5
1
2
3
4
X2
GND
CLK
GND
GND
8-pin (150 mil) SOIC
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
2
3
XI
Input
Crystal connection. Connect to the external pullable crystal.
VDD
VIN
Power Connect to +3.3 V (0.01uf decoupling capacitor recommended).
Input
Voltage input to VCXO. Zero to 3.3 V analog input which controls the
oscillation frequency of the VCXO.
4
5
6
7
8
GND
GND
CLK
GND
X2
Power Connect to ground.
Power Connect to ground.
Output Clock output.
Power Connect to ground.
Input
Crystal connection. Connect to the external pullable crystal.
MDS 727 B
2
Revision 121404
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
ICS727
LOW COST 27 MHZ 3.3 VOLT VCXO
The third overtone mode of the crystal and all spurs
must be >100 ppm distant from 3x the fundamental
resonance measured with a physical load of 14 pF.
External Component Selection
The ICS727 requires a minimum number of external
components for proper operation.
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the ICS727. There should be no vias between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD (pin 2) and GND (pin 4), as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Crystals can be made to resonate either at the
fundamental frequency, or on the third, fifth, or even
higher overtone. VCXO crystals are always
fundamental mode, because overtone modes are much
less pullable and require additional oscillator circuitry
for proper operation.
Series Termination Resistor
When the PCB trace between the clock output (CLK,
pin 5) and the load is over 1 inch, series termination
should be used. To series terminate a 50Ω trace (a
commonly used trace impedance) place a 33Ω resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20Ω.
The third overtone mode is not necessarily at exactly
three times the fundamental frequency. The
mechanical properties of the quartz element dictate the
position of the overtones relative to the fundamental,
and in a VCXO circuit, the third overtone is not typically
exactly three times the fundamental, or the oscillator
circuit may excite both the fundamental and overtone
modes simultaneously. This will cause a nonlinearity in
the transfer curve such as the one in Figure 3. This
potential problem is why VCXO crystals are required to
be tested for absence of any activity inside a +/-100
ppm window at three times the fundamental frequency.
Quartz Crystal
The ICS727 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The ICS727 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the ICS727 is designed to have zero frequency
error when the total of on-chip + stray capacitance is
14pF.
To determine the need for and value of the crystal
adjustment capacitors, you will need a PC board of
your final layout, a frequency counter capable of about
1 ppm resolution and accuracy, two power supplies,
and some samples of the crystals which you plan to
use in production, along with measured initial accuracy
for each crystal at the specified crystal load
capacitance, CL.
Recommended Crystal Parameters:
Initial Accuracy at 25°C
Temperature Stability
Aging
Load Capacitance
Shunt Capacitance, C0
C0/C1 Ratio
20 ppm
30 ppm
20 ppm
14 pf
7 pF Max
250 Max
35 Ω Max
Equivalent Series Resistance
MDS 727 B
3
Revision 121404
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
ICS727
LOW COST 27 MHZ 3.3 VOLT VCXO
To determine the value of the crystal capacitors:
than 25ppm negative, the PC board has excessive
stray capacitance and a new PCB layout should be
considered to reduce stray capacitance. (Alternately,
the crystal may be re-specified to a higher load
capacitance. Contact ICS MicroClock for details.) If the
centering error is more than 25 ppm positive, add
identical fixed centering capacitors from each crystal
pin to ground. The value for each of these caps (in pF)
is given by:
1. Connect VDD of the ICS727 to 3.3 V. Connect pin 3
of the ICS727 to the second power supply. Adjust the
voltage on pin 3 to 0V. Measure and record the
frequency of the CLK output.
2. Adjust the voltage on pin 3 to 3.3 V. Measure and
record the frequency of the same output.
To calculate the centering error:
(f3.0V – ftarget) + (f0V – ftarget
)
Error = 106x
– errorxtal
External Capacitor =
------------------------------------------------------------------------------
ftarget
2 x (centering error)/(trim sensitivity)
Where:
Trim sensitivity is a parameter which can be supplied by
your crystal vendor. If you do not know the value,
assume it is 30 ppm/pF. After any changes, repeat the
measurement to verify that the remaining error is
acceptably low (typically less than 25 ppm).
f
= nominal crystal frequency
target
error
being measured
=actual initial accuracy (in ppm) of the crystal
xtal
If the centering error is less than 25 ppm, no
adjustment is needed. If the centering error is more
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS727. These ratings, which
are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
Storage Temperature
Soldering Temperature
7 V
-0.5 V to VDD+0.5 V
-65 to +150°C
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
°C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
0
+3.15
+3.45
V
Refer to page 3
MDS 727 B
4
Revision 121404
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
ICS727
LOW COST 27 MHZ 3.3 VOLT VCXO
DC Electrical Characteristics
VDD=3.3 V ±±% , Ambient temperature 0 to +70°C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
3.15
2.4
Typ.
Max.
Units
Operating Voltage
VDD
3.45
V
V
V
V
Output High Voltage
Output Low Voltage
V
I
I
I
= -12 mA
= 12 mA
= -4 mA
OH
OH
OL
OH
V
0.4
OL
Output High Voltage (CMOS
Level)
V
VDD-0.4
OH
Operating Supply Current
IDD
Output = 27 MHz,
no load
12
50
mA
Short Circuit Current
I
mA
V
OS
VIN, VCXO Control Voltage
V
0
3.3
IA
AC Electrical Characteristics
VDD = 3.3 V ±±%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Output Frequency
Crystal Pullability
VCXO Gain
Symbol
Conditions
Min. Typ. Max. Units
F
27
MHz
ppm
ppm/V
ns
O
F
0V< VIN < 3.3 V, Note 1
VIN = VDD/2 +1 V, Note 1
+ 110
40
P
120
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
t
0.8 to 2.0 V, C =15 pF
1.5
1.5
60
OR
L
t
2.0 to 0.8 V, C =15 pF
ns
OF
L
t
Measured at 1.4 V, C =15 pF
50
%
D
L
Maximum Output Jitter,
short term
t
C =15 pF
100
ps
J
L
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
150
140
120
40
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
MDS 727 B
5
Revision 121404
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
ICS727
LOW COST 27 MHZ 3.3 VOLT VCXO
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
Min Max
0.0532 0.0688
0.0040 0.0098
Symbol
Min
Max
1.75
0.25
0.51
0.25
5.00
4.00
A
A1
B
C
D
E
e
1.35
1.10
0.33
0.19
4.80
3.80
0.013
0.0075 0.0098
.1890 .1968
0.020
Index
Area
0.1497 0.1574
0.050 Basic
E
H
1.27 Basic
H
h
L
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
0.2284 0.2440
0.010
0.016
0°
0.020
0.050
8°
a
Pin 1
D
h x 4±0
A
Q
c
e
b
Ordering Information
Part / Order Number
ICS727M
Marking
ICS727M
ICS727M
Shipping Packaging
Tubes
Package
8-pin SOIC
8-pin SOIC
Temperature
0 to +70° C
0 to +70° C
ICS727MT
Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 727 B
6
Revision 121404
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
ICS727
LOW COST 27 MHZ 3.3 VOLT VCXO
Revision History
Rev. Originator
Date
Description of Change
A
B
P.Griffith
J. Sarma
10/06/04 New device/datasheet for Thomson.
12/14/04 Release from Prelim to Final; release as General purpose device.
MDS 727 B
7
Revision 121404
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
相关型号：
©2020 ICPDF网 联系我们和版权申明