ICS9FG104(28TSSOP) 概述
Clock Generator 时钟发生器
ICS9FG104(28TSSOP) 规格参数
是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
Reach Compliance Code: | unknown | 风险等级: | 5.92 |
Base Number Matches: | 1 |
ICS9FG104(28TSSOP) 数据手册
通过下载ICS9FG104(28TSSOP)数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载Integrated
Circuit
Systems, Inc.
ICS9FG104
Advance Information
Programmable FTG for Differential P4TM CPU, PCI-Express & SATA Clocks
Recommended Application:
Pin Configuration
Frequency Timing Generator for Differential CPU & SATA clocks
XIN/CLKIN
X2
1
28 VDDA
27 GNDA
26 IREF
25 FS0
24 FS1
23 DIF_0
22 DIF_0#
21 VDD
20 GND
19 DIF_1
2
3
4
5
6
7
8
9
Features:
VDD
GND
•
Generates common CPU frequencies from 14.318 MHz
or 25 MHz
•
•
•
•
Crystal or reference input
REFOUT
FS2
DIF_3
DIF_3#
VDD
GND 10
DIF_2 11
DIF_2# 12
SDATA 13
SCLK 14
4 - 0.7V current-mode differential output pairs
Supports Serial-ATA at 100 MHz
Two spread spectrum modes: 0 to -0.5 downspread and
+/-0.25% centerspread
•
Unused inputs may be disabled in either driven or Hi-Z
state for power management.
18 DIF_1#
17 SEL14M_25M#
16 SPREAD
15 DIF_STOP#
Key Specifications:
•
•
•
Output cycle-to-cycle jitter < 85 ps
Output to output skew < 85 ps
+/-300 ppm frequency accuracy on output clocks
28-pin SSOP/TSSOP
Frequency Select Table
SEL14M_25M#
FS2 FS1 FS0 OUTPUT(MHz)
(FS3)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
100.00
125.00
133.33
166.67
200.00
266.00
333.00
400.00
100.00
125.00
133.33
166.67
200.00
266.00
333.00
400.00
0839—11/03/03
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.
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