概述
数据手册IDT54FCT16240TPVB 概述
FAST CMOS 16-BIT BUFFER/LINE DRIVER FAST CMOS 16位缓冲器/线路驱动器
IDT54FCT16240TPVB 数据手册
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PDF下载IDT54/74FCT16240T/AT/CT/ET
IDT54/74FCT162240T/AT/CT/ET
FAST CMOS 16-BIT
BUFFER/LINE DRIVER
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
The FCT16240T/AT/CT/ET and FCT162240T/AT/CT/ET
16-bit buffer/line drivers are built using advanced dual metal
CMOS technology. These high-speed, low-power devices
offerbus/backplaneinterfacecapabilitywithimprovedpacking
density.Theflow-throughorganizationofsignalpinssimplifies
layout. Thethree-statecontrolsaredesignedtooperatethese
devices in a Quad-Nibble, Dual-Byte or single 16-bit word
mode. All inputs are designed with hysteresis for improved
noise margin.
The FCT16240T/AT/CT/ET are ideally suited for driving
high capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162240T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times– reduc-
ing the need for external series terminating resistors. The
FCT162240T/AT/CT/ET are plug-in replacements for
FCT16240T/AT/CT/ET and 54/74ABT16240 for on-board in-
terface applications.
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16240T/AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162240T/AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
FUNCTIONAL BLOCK DIAGRAM
1OE
3OE
3A1
3A2
3Y1
3Y2
1Y1
1Y2
1A1
1A2
3A3
3A4
3Y3
3Y4
1Y3
1Y4
1A3
1A4
4OE
2OE
4Y1
4Y2
2Y1
2Y2
4A1
4A2
2A1
2A2
4Y3
4Y4
2Y3
2Y4
4A3
4A4
2A3
2A4
2541 drw 02
2541 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.1
DSC–4226/9
1
IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1
48
1
48
47
46
45
44
43
42
41
40
39
38
2
OE
2
1
OE
1
OE
1
OE
2
A
A
1
2
2
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1A
1
2
1
Y
Y
1
2
1
Y
1
2
3
1
3
1A
1
1
Y
GND
4
GND
GND
4
GND
5
1
1
A
A
3
4
1
1
Y
Y
3
4
5
1A
3
4
1
Y
3
4
6
6
1A
1
Y
V
CC
7
V
CC
V
CC
7
V
CC
1
8
2
A
1
2
2
2
Y
Y
1
2
8
2A
2
Y
1
2
9
2A
9
2A2
2
Y
GND
10
11
GND
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
2
2
3
3
A
A
A
A
3
4
1
2
2A
3
4
1
2
2Y3
2Y3
12 SO48-1 37
SO48-2
13 SO48-3 36
2
3
3
Y
4
1
2
E48-1
2A
2
Y
4
1
2
Y
Y
3A
3
Y
14
15
16
17
18
19
20
21
22
23
24
35
34
33
32
31
30
29
28
27
26
25
3A
3
Y
GND
GND
GND
GND
3
3
A
A
3
4
3A
3
4
3
3
Y
Y
3
4
3
Y
3
4
3A
3
Y
V
CC
V
CC
V
CC
V
CC
1
4
A
1
2
4A
4
4
Y
Y
1
2
4
Y
1
2
4
A
4A
2
4
Y
GND
GND
GND
GND
4
4
A
A
3
4
4A
3
4
4
4
Y
Y
3
4
4
Y
3
4
4A
4
Y
4OE
4
OE
3
OE
3OE
2541 drw 03
2541drw 04
SSOP/
TSSOP/TVSOP
TOP VIEW
CERPACK
TOP VIEW
5.1
2
IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
FUNCTION TABLE(1)
Inputs
Outputs
Pin Names
xOE
Description
x
xAx
L
x x
Y
OE
L
3–State Output Enable Inputs (Active LOW)
H
L
xAx
xYx
Data Inputs
L
H
3-State Outputs
2541 tbl 01
H
X
Z
2541 tbl 02
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
IN = 0V
Typ. Max. Unit
Symbol
Description
Max.
Unit
(2) Terminal Voltage with Respect to
CIN
Input
Capacitance
Output
V
3.5
3.5
6.0
pF
VTERM
–0.5 to +7.0
V
GND
(3) Terminal Voltage with Respect to
GND
VTERM
–0.5 to
VCC +0.5
V
COUT
V
OUT = 0V
8.0
pF
Capacitance
2541 lnk 04
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150 °C
–60 to +120 mA
2541 lnk 03
NOTE:
1. This parameter is measured at characterization but not tested.
NOTES:
1. StressesgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
5.1
3
IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC= 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
—
—
—
—
–80
—
—
—
—
—
0.8
±1
V
VIL
II H
Input LOW Level
Guaranteed Logic LOW Level
V
Input HIGH Current (Input pins)(5)
Input HIGH Current (I/O pins)(5)
Input LOW Current (Input pins)(5)
Input LOW Current (I/O pins)(5)
High Impedance Output Current
(3-State Output pins)(5)
VCC = Max.
VI = VCC
—
µA
—
±1
II L
VI = GND
—
±1
—
±1
IOZH
IOZL
VIK
VCC = Max.
VO = 2.7V
VO = 0.5V
—
±1
µA
—
±1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
—
–0.7
–140
100
5
–1.2
–225
—
V
IOS
VH
Short Circuit Current
mA
mV
µA
Input Hysteresis
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
500
2541 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16240T
Symbol
Parameter
Test Conditions(1)
VCC = Max., VO = 2.5V(3)
Min. Typ.(2) Max.
Unit
IO
Output Drive Current
–50
2.5
2.4
—
3.5
3.5
–180
—
mA
VOH
Output HIGH Voltage
VCC = Min.
IOH = –3mA
V
V
VIN = VIH or VIL
IOH = –12mA MIL.
IOH = –15mA COM'L.
IOH = –24mA MIL.
IOH = –32mA COM'L.(4)
IOL = 48mA MIL.
—
2.0
—
3.0
0.2
—
—
0.55
±1
V
V
VOL
Output LOW Voltage
VCC = Min.
VIN = VIH or VIL
IOL = 64mA COM'L.
IOFF
Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO ≤ 4.5V
—
µA
2541 lnk 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT162240T
Symbol
Parameter
Test Conditions(1)
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
Min. Typ.(2) Max.
Unit
IODL
Output LOW Current
60
–60
2.4
115
200
mA
VOUT = 1.5V(3)
IODH
VOH
Output HIGH Current
Output HIGH Voltage
VCC = 5V, VIN = VIH or VIL,
–115 –200
mA
V
VCC = Min.
IOH = –16mA MIL.
IOH = –24mA COM'L.
IOL = 16mA MIL.
3.3
0.3
—
VIN = VIH or VIL
VCC = Min.
VOL
Output LOW Voltage
—
0.55
V
VIN = VIH or VIL
IOL = 24mA COM'L.
2541 lnk 07
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
5.1
4
IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
Quiescent Power Supply Current
TTL Inputs HIGH
V
V
CC = Max.
IN = 3.4V(3)
∆ICC
—
—
0.5
60
1.5
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
V
IN = VCC
100
µA/
MHz
Outputs Open
xOE = GND
VIN = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
V
CC = Max.
V
IN = VCC
—
—
0.6
0.9
1.5
2.3
mA
Outputs Open
fi = 10MHz
VIN = GND
50% Duty Cycle
xOE = GND
V
V
IN = 3.4V
IN = GND
One Bit Toggling
V
CC = Max.
V
IN = VCC
—
—
2.4
6.4
4.5(5)
Outputs Open
fi = 2.5MHz
VIN = GND
50% Duty Cycle
xOE = GND
V
V
IN = 3.4V
IN = GND
16.5(5)
Sixteen Bits Toggling
2541 tbl 08
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
5.1
5
IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16240T/162240T
FCT16240AT/162240AT
Com'l. Mil.
Com'l.
Mil.
Symbol
tPLH
Parameter
Propagation Delay
xAx to xYx
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
1.5
1.5
1.5
—
8.0
1.5
9.0
1.5
1.5
1.5
—
4.8
1.5
5.1
ns
tPHL
tPZH
tPZL
Output Enable Time
10.0
9.5
1.5
1.5
—
10.5
10.0
0.5
6.2
5.6
0.5
1.5
1.5
—
6.5
5.9
0.5
ns
ns
ns
tPHZ
tPLZ
Output Disable Time
tSK(o) Output Skew(3)
0.5
FCT16240CT/162240CT
Com'l. Mil.
FCT16240ET/162240ET
Com'l. Mil.
Symbol
tPLH
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
Propagation Delay
xAx to xYx
1.5
4.3
1.5
4.7
1.5
3.2
—
—
ns
tPHL
tPZH
tPZL
Output Enable Time
1.5
1.5
—
5.8
5.2
0.5
1.5
1.5
—
6.5
5.7
0.5
1.5
1.5
—
4.4
3.6
0.5
—
—
—
—
—
—
ns
ns
tPHZ
tPLZ
Output Disable Time
tSK(o) Output Skew(3)
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
ns
2541 tbl 09
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
5.1
6
IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
Test
Switch
VCC
7.0V
Open Drain
Disable Low
Closed
500
Ω
Ω
VOUT
VIN
Enable Low
Pulse
Generator
Open
D.U.T.
All Other Tests
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
2541 lnk 10
50pF
500
T
R
RT = Termination resistance: should be equal to ZOUT of the Pulse
C
L
Generator.
2541 drw 05
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
PULSE
t
H
t
t
SU
1.5V
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
t
REM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
1.5V
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
2541 drw 07
CLEAR
CLOCK ENABLE
ETC.
SU
t
H
2541 drw 06
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
t
PLH
t
t
PHL
PHL
t
PZL
tPLZ
V
OH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
V
OL
t
PLH
0.3V
0.3V
V
OL
3V
1.5V
0V
t
PZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
V
OH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
2541 drw 08
2541 drw 09
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5.1
7
IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FCT
XXXX
X
X
Temp. Range
Package
Process
Device Type
Commercial
MIL-STD-883, Class B
Blank
B
PV
PA
PF
E
Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)
CERPACK (E48-1)
16240T
Inverting 16-Bit Buffer/Line Driver
16240AT
16240CT
16240ET
162240T
162240AT
162240CT
162240ET
–55
°
°
C to +125
C to +85
°C
C
54
74
–40
°
2541 drw 10
5.1
8
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