IDT54FCT16373ATEB [IDT]
Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP48, CERPACK-48;型号: | IDT54FCT16373ATEB |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP48, CERPACK-48 驱动 CD 逻辑集成电路 |
文件: | 总7页 (文件大小:77K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FAST CMOS 16-BIT
TRANSPARENT LATCH
IDT54/74FCT16373T/AT/CT
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
TheFCT16373T16-bit transparentD-typelatchis builtusingadvanceddual
metalCMOStechnology. Thesehigh-speed, low-powerlatchesareidealfor
temporarystorageofdata.Theycanbeusedforimplementingmemoryaddress
latches,I/Oports,andbusdrivers.TheOutputEnableandLatchEnablecontrols
areorganizedtooperateeachdeviceastwo8-bitlatches,orone16-bitlatch.
Flow-throughorganizationofsignalpinssimplifieslayout.Allinputsaredesigned
withhysteresisforimprovednoisemargin.
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤1µA (max.)
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 5V ±10%
• High drive outputs (–32mA IOH, 64mA IOL)
• Power off disable outputs permit “live insertion”
• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
TheFCT16373Tisideallysuitedfordrivinghigh-capacitanceloadsandlow-
impedancebackplanes.Theoutputbuffersaredesignedwithpoweroffdisable
capabilitytoallow"liveinsertion"ofboardswhenusedasbackplanedrivers.
• Available in the following packages:
– Industrial: SSOP, TSSOP
– Military: CERPACK
FUNCTIONALBLOCKDIAGRAM
2OE
1OE
2LE
1LE
D
D
C
1D1
2D1
1O1
2O1
C
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
MAY 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5454/1
IDT54/74FCT16373T/AT/CT
FASTCMOS16-BITTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
ABSOLUTEMAXIMUMRATINGS(1)
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to 7
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1LE
1D1
1OE
1O1
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
2
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
3
1O2
1D2
GND
4
GND
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
5
1O3
1D3
6
1O4
VCC
1D4
7
VCC
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Outputs and I/O terminals for FCT162XXX.
8
1O5
1D5
9
1O6
1D6
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ.
Max. Unit
1O7
1O8
2O1
1D7
1D8
2D1
CIN
Input Capacitance
Output Capacitance
VIN = 0V
3.5
6
8
pF
pF
COUT
VOUT = 0V
3.5
NOTE:
1. This parameter is measured at characterization but not tested.
2O2
2D2
GND
GND
2O3
2D3
2O4
VCC
2D4
PINDESCRIPTION
Pin Names
VCC
Description
xDx
DataInputs
2O5
2D5
xLE
Latch Enable Input (Active HIGH)
OutputEnableInput(ActiveLOW)
3-StateOutputs
2O6
2D6
xOE
xOx
GND
GND
2O7
2O8
2D7
2D8
2LE
2OE
FUNCTIONTABLE(1)
Inputs
Outputs
SSOP/ TSSOP/ CERPACK
TOP VIEW
xDx
H
xLE
H
xOE
L
xOx
H
L
H
L
L
X
X
H
Z
NOTE:
1. H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High-impedance
2
IDT54/74FCT16373T/AT/CT
FASTCMOS16-BITTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
Symbol
VIH
Parameter
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
Input HIGH Level
VIL
InputLOWLevel
GuaranteedLogicLOWLevel
VCC = Max.
—
—
—
—
—
—
—
—
–80
—
—
—
0.8
±1
V
IIH
InputHIGHCurrent(Inputpins)(5)
Input HIGH Current (I/O pins)(5)
InputLOWCurrent(Inputpins)(5)
InputLOWCurrent(I/Opins)(5)
HighImpedanceOutputCurrent
(3-StateOutputpins)(5)
VI = VCC
—
µA
—
±1
IIL
VI = GND
—
±1
—
±1
IOZH
IOZL
VIK
VCC = Max.
VO = 2.7V
VO = 0.5V
—
±1
µA
—
±1
ClampDiodeVoltage
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
–0.7
–140
100
5
–1.2
–250
—
V
IOS
ShortCircuitCurrent
mA
mV
µA
VH
InputHysteresis
—
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max
500
VIN = GND or VCC
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
OutputDriveCurrent
Output HIGH Voltage
Test Conditions(1)
Min.
–50
2.5
Typ.(2) Max.
Unit
mA
V
IO
VCC = Max., VO = 2.5V(3)
—
3.5
3.5
180
—
VOH
VCC = Min.
IOH = –3mA
VIN = VIH or VIL
IOH = –12mA MIL
IOH = –15mA IND
IOH = –24mA MIL
IOL = –32mA IND(4)
IOL = 48mA MIL
IOL = 64mA IND
2.4
—
V
2
3
—
0.55
±1
V
V
VOL
OutputLOWVoltage
VCC = Min.
—
—
0.2
—
VIN = VIH or VIL
IOFF
Input/OutputPowerOffLeakage(5)
VCC = 0V, VIN = or VO ≤ 4.5V
µA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. This test limit for this parameter is ±5µA at TA = –55°C.
3
IDT54/74FCT16373T/AT/CT
FASTCMOS16-BITTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
TestConditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
VCC = Max.
VIN = 3.4V(3)
—
0.5
1.5
mA
ICCD
Dynamic Power Supply Current(4)
VCC = Max.
OutputsOpen
xOE = GND
VIN = VCC
VIN = GND
—
60
100
µA/
MHz
OneInputToggling
50% Duty Cycle
IC
TotalPowerSupplyCurrent(6)
VCC = Max.
OutputsOpen
fi = 10MHz
VIN = VCC
VIN = GND
—
—
0.6
0.9
1.5
2.3
mA
50% Duty Cycle
xOE = GND
xLE = VCC
VIN = 3.4V
VIN = GND
OneBitToggling
VCC = Max.
OutputsOpen
fi = 2.5MHz
50% Duty Cycle
xOE = GND
xLE = VCC
VIN = VCC
VIN = GND
—
—
2.4
6.4
4.5(5)
VIN = 3.4V
VIN = GND
16.5(5)
SixteenBitsToggling
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT54/74FCT16373T/AT/CT
FASTCMOS16-BITTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
FCT16373T
Ind.
Condition(2) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
FCT16373AT
FCT16373CT
Mil.
Ind. Mil.
Ind. Mil.
Symbol
tPLH
Parameter
PropagationDelay
xDx to xOx
CL = 50pF
1.5
8
1.5
8.5
1.5
5.2
8.5
6.5
5.5
1.5
5.6
9.8
7.5
6.5
1.5
3.6
3.7
4.4
3.9
1.5
5.1
ns
ns
ns
ns
tPHL
RL = 500Ω
tPLH
PropagationDelay
xLE to xOx
2
13
12
7.5
2
15
2
2
2
2
8
tPHL
tPZH
tPZL
OutputEnableTime
1.5
1.5
1.5
1.5
13.5
10
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
6.3
5.9
tPHZ
tPLZ
OutputDisableTime
tSU
Set-up Time HIGH or LOW,
xDx to xLE
2
—
—
2
—
—
2
—
—
2
—
—
2
—
—
2
—
—
ns
ns
tH
Hold Time HIGH or LOW,
xDx to xLE
1.5
1.5
1.5
1.5
1.5
1.5
tW
xLE Pulse Width HIGH
OutputSkew(3)
6
—
6
—
5
—
6
—
5
—
6
—
ns
ns
tSK(o)
—
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
0.5
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
5
IDT54/74FCT16373T/AT/CT
FASTCMOS16-BITTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
TESTCIRCUITSANDWAVEFORMS
V CC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
V OUT
VIN
Pulse
Generator
D.U.T.
50pF
CL
All Other Tests
500Ω
RT
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
1.5V
0V
DATA
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
CLOCK ENABLE
ETC.
tSU
tH
Pulse Width
Set-up, Hold, and Release Times
ENABLE
DISABLE
3V
3V
SAME PHASE
INPUT TRANSITION
1.5V
0V
CONTROL
INPUT
1.5V
0V
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT16373T/AT/CT
FASTCMOS16-BITTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
ORDERINGINFORMATION
IDT
XX
FCT
XXXX
XXX
XX
X
Temp. Range
Family
Package
Process
Device Type
Blank
B
Industrial
MIL-STD-883, Class B
Industrial Options
PV
PA
Shrink Small Outline Package
Thin Shrink Small Outline Package
Military Options
CERPACK
E
16-Bit Transparent Latch
373T
373AT
373CT
16
Double-Density, 5 Volt, High Drive
54
74
– 55°C to +125°C
– 40°C to +85°C
DATASHEETDOCUMENTHISTORY
5/22/2002 RemovedTVSOPpackage
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logichelp@idt.com
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www.idt.com
7
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