IDT54FCT646ATLB8 [IDT]
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC28, LCC-28;
| 型号： | IDT54FCT646ATLB8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC28, LCC-28 |
| 文件： | 总8页 (文件大小：107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS OCTAL
IDT54/74FCT646T/AT/CT
TRANSCEIVER/
REGISTER (3-STATE)
DESCRIPTION:
FEATURES:
TheFCT646Tconsists ofabus transceiverwith3-stateD-typeflip-flops
andcontrolcircuitryarrangedformultiplexedtransmissionofdatadirectly
from the data bus or from the internal storage registers. The FCT646T
utilizes the enable control (G) and direction (DIR) pins to control the
transceiverfunctions.
• Std., A, and C grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
SABandSBAcontrolpinsareprovidedtoselecteitherreal-timeorstored
data transfer.The circuitryusedforselectcontrolwilleliminate the typical
decodingglitchthatoccurs ina multiplexerduringthe transitionbetween
storedandreal-timedata.Alowinputlevelselectsreal-timedataandahigh
selects storeddata.
– VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 64mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Data onthe AorBdata bus,orboth,canbe storedinthe internalDflip-
flops by low-to-high transitions at the appropriate clock pins (CPAB or
CPBA), regardless ofthe selectorenable controlpins.
• Power off disable outputs permit "live insertion"
• Available in the following packages:
– Industrial: SOIC, SSOP, QSOP
– Military: CERDIP, LCC
FUNCTIONALBLOCKDIAGRAM
G
DIR
CPBA
SBA
CPAB
SAB
B REG
ONE OF EIGHT CHANNELS
1D
C1
A REG
B1
A1
1D
C1
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
JUNE 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5505/5
IDT54/74FCT646T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
24
23
22
21
20
19
1
CPAB
SAB
VCC
CPBA
SBA
G
INDEX
2
3
4
DIR
A1
4
3
2
28 27 26
1
5
6
7
8
G
25
24
23
22
21
20
19
A1
B1
B2
NC
B3
B4
B5
A2
A3
A2
A3
A4
A5
B1
5
6
B2
NC
A4
B3
18
17
7
9
B4
B5
B6
B7
8
10
A5
A6
A7
16
15
14
13
9
11
A6
12 13 14 15 16 17 18
10
11
A8
B8
GND
12
LCC
TOP VIEW
CERDIP/ SOIC/ SSOP/ QSOP
TOP VIEW
ABSOLUTEMAXIMUMRATINGS(1)
PINDESCRIPTION
Symbol
Description
Max
Unit
V
Pin Names
Description
(2)
A1 - A8
DataRegisterAInputs
DataRegisterBOutputs
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
B1 - B8
DataRegisterBInputs
DataRegisterAOutputs
Clock Pulse Inputs
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
° C
mA
CPAB, CPBA
SAB, SBA
DIR, G
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
OutputDataSourceSelectInputs
OutputEnableInputs
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
CIN
VIN = 0V
6
10
12
pF
pF
COUT
VOUT = 0V
8
NOTE:
1. This parameter is measured at characterization but not tested.
2
IDT54/74FCT646T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
FUNCTIONTABLE(1)
(2)
Inputs
DataI/O
G
H
H
L
L
L
L
DIR
X
CPAB
H or L
↑
CPBA
H or L
↑
SAB
X
SBA
X
A1 - A8
B1 - B8
Operation or Function
Input
Input
Isolation
X
X
X
Store A and B Data
L
X
X
X
L
Output
Input
Input
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
L
X
H or L
X
X
H
H
X
L
X
Output
H
H or L
X
H
X
NOTES:
1. H = HIGH
L = LOW
X = Don't Care
↑ = LOW-to-HIGH transition.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered in order to load both registers.
2. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be
stored on every LOW-to-HIGH transition on the clock inputs.
3. A in B Register.
4. B in A Register.
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
0.8
1
Unit
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
—
—
—
—
—
V
IIH
Input HIGH Current(4)
Input LOW Current(4)
High Impedance Output Current
(3-State output pins)(4)
Input HIGH Current(4)
ClampDiodeVoltage
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
µA
µA
µA
IIL
VCC = Max.
—
1
IOZH
IOZL
VCC = Max
—
1
—
1
II
VCC = Max., VI = VCC (Max.)
VCC = Min, IIN = -18mA
—
1
µA
V
VIK
VH
ICC
–0.7
200
0.01
–1.2
—
1
Input Hysteresis
—
mV
µ A
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
VOH
OutputHIGHVoltage
VCC = Min
IOH = –6mA MIL
IOH = –8mA IND
IOH = –12mA MIL
IOH = –15mA IND
IOL = 48mA MIL
IOL = 64mA IND
2.4
3.3
—
VIN = VIH or VIL
V
2
3
—
VOL
Output LOWVoltage
VCC = Min
—
0.3
0.55
V
VIN = VIH or VIL
(3)
IOS
Short Circuit Current
Input/Output Power Off Leakage(5)
VCC = Max., VO = GND
–60
—
–120
—
–225
1
mA
µA
IOFF
VCC = 0V, VIN or VO ≤ 4.5V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
5. This parameter is guaranteed but not tested.
3
IDT54/74FCT646T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
BUS
A
BUS
B
BUS
A
BUS
B
G
DIR
H
CPAB
X
CPBA
X
SAB
SBA
X
G
DIR
L
CPAB
X
CPBA
X
SAB
SBA
L
L
L
L
X
Real-Time Transfer
Bus B to A
Real-Time Transfer
Bus A to B
BUS
A
BUS
BUS
BUS
B
A
B
G
L
DIR
H
CPAB
CPBA
SAB
SBA
X
G
L
DIR
L
CPAB
X
H or L
CPBA
H or L
SAB
SBA
H
↑
X
↑
↑
X
X
X
X
H
L
L
X
X
H
L
X
X
↑
X
H
X
Transfer Stores (1)
Data to A and/or B
Storage From
A and/or B
NOTE:
1. Cannot transfer data to A bus and B bus simultaneously.
4
IDT54/74FCT646T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
ΔICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V
—
0.5
2
mA
(3)
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
VIN = VCC
VIN = GND
—
0.15
0.25
mA/
MHz
G = DIR = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
VIN = VCC
VIN = GND
—
1.5
3.5
5.5
mA
Outputs Open
fCP = 10MHz
50% Duty Cycle
G = DIR = GND
One Bit Toggling
at fi = 5MHz
VIN = 3.4V
VIN = GND
—
—
2
(5)
VCC = Max.
Outputs Open
fCP = 10MHz
VIN = VCC
VIN = GND
3.8
7.3
50% Duty Cycle
(5)
G = DIR = GND
Eight Bits Toggling
at fi = 2.5MHz
VIN = 3.4V
VIN = GND
—
6
16.3
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ΔICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
5
IDT54/74FCT646T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
54FCT646T
54/74FCT646AT
54/74FCT646CT
Ind. Mil.
Mil.
Ind. Mil.
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
PropagationDelay,
Bus to Bus
2
11
15
11
10
12
—
—
—
2
6.3
9.8
6.3
6.3
7.7
—
—
—
2
7.7
10.5
7.7
7
1.5
1.5
1.5
1.5
1.5
2
5.4
7.8
6.3
5.7
6.2
—
—
—
1.5
1.5
1.5
1.5
1.5
2
6
ns
OutputEnableTime,
G, DIR to Bus
OutputDisableTime,
2
2
2
8.9 ns
7.7 ns
6.3 ns
2
2
2
G, DIR to Bus
PropagationDelay,
Clock to Bus
tPLH
tPHL
tPLH
tPHL
tSU
2
2
2
PropagationDelay,
SBA or SAB to Bus
Set-up Time HIGH or LOW,
Bus to Clock
2
2
2
8.4
—
—
—
7
ns
ns
ns
ns
4.5
2
2
2
—
—
—
tH
Hold Time HIGH or LOW,
Bus to Clock
1.5
5
1.5
5
1.5
5
1.5
5
tW
Clock Pulse Width,
HIGH or LOW
6
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
6
IDT54/74FCT646T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
TESTCIRCUITSANDWAVEFORMS
VCC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500W
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T
.
All Other Tests
50pF
500W
T
R
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal Link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
1.5V
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Octal Link
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
7
IDT54/74FCT646T/AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
ORDERINGINFORMATION
XXXX
XX
X
IDT
XX
FCT
Package
Process
Device Type
Temp. Range
Blank
B
Industrial
MIL-STD-883, Class B
Industrial Options
SO
PY
Q
Small Outline IC
Shrink Small Outline Package
Quarter-size Small Outline Package
Military Options
CERDIP
Leadless Chip Carrier
D
L
Fast CMOS Octal Transceiver/Register (3-State)
646T
646AT
646CT
54
74
– 55°C to +125°C
– 40°C to +85°C
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
800-345-7015 or 408-284-8200
fax: 408-284-2775
for Tech Support:
logichelp@idt.com
www.idt.com
8
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