IDT5V10007PGG8 [IDT]
Clock Generator, 27MHz, CMOS, PDSO16, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, TSSOP-16;型号: | IDT5V10007PGG8 |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Clock Generator, 27MHz, CMOS, PDSO16, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, TSSOP-16 时钟 光电二极管 外围集成电路 晶体 |
文件: | 总8页 (文件大小:174K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PRELIMINARY DATASHEET
VCXO PLUS AUDIO CLOCK FOR STB
IDT5V10007
Description
Features
The IDT5V10007 is a low cost, low jitter, high performance
VCXO and PLL clock synthesizer designed to replace
expensive discrete VCXOs and multipliers. The patented
on-chip Voltage Controlled Crystal Oscillator accepts a 0 to
3.3 V input voltage to cause the output clocks to vary by
±115 ppm. Using IDT’s analog/digital Phase-Locked Loop
(PLL) techniques, the device uses an inexpensive 27 MHz
pullable crystal input to produce a reference output and a
selectable audio clock.
• Packaged in 16-pin TSSOP
• Available in Pb (lead) free package
• Replaces a VCXO and oscillator
• Operating voltage of 3.3V
• Provides output of 27 MHz plus audio clock
• Uses an inexpensive 27 MHz pullable crystal
• On-chip patented VCXO with pull range of 230 ppm
(minimum)
IDT manufactures the largest variety of VCXO based timing
devices for all applications. Consult IDT to eliminate
VCXOs, crystals, and oscillators from your board.
• VCXO tuning voltage of 0 to 3.3 V
• Advanced, low power, sub-micron CMOS process
The frequency of the on-chip VCXO is adjusted by an
external control voltage connected to VIN. Because VIN is
a high impedance input, it can be driven directly from an
PWM RC integrator circuit.
Block Diagram
VDD
3
PLL/Clock
Synthesis
Circuitry
3
ACLK
S2:S0
VIN
X1
Voltage
27 MHz
Pullable
Crystal
Controlled
Crystal
Oscillator
27MHz
X2
3
GND
PDTS
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Pin Assignment
Audio Clock Select Table
S2 S1 S0
ACLK (MHz)
X2
X1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1
NC
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
8.192
11.2896
12.288
16.9344
18.432
16.384
22.5792
24.576
VDD
VDD
VIN
VDD
S0
27M
GND
ACLK
S2
GND
GND
PDTS
16 Pin 4.40mm body, 0.65mm pitch TSSOP
Pin Descriptions
Pin
Pin
Pin
Pin Description
Number
Name
Type
1
2
3
4
5
X2
X1
Output Crystal connection. Connect to a 27 MHz fundamental mode pullable crystal.
Input Crystal connection. Connect to a 27 MHz fundamental mode pullable crystal.
VDD
VDD
VIN
Power Connect to +3.3 V.
Power Connect to +3.3 V.
Input
Voltage input to VCXO. Zero to 3.3 V signal which controls the VCXO
frequency.
6
7
8
GND
GND
PDTS
Power Connect to ground.
Power Connect to ground.
Power Power Down Tri-state. This pin powers down entire chip and tri-states the
outputs when low. Internal pull-up.
9
S2
ACLK
GND
27M
S0
Input
Select input S2. Selects ACLK per table above. Internal pull-up.
10
11
12
13
14
15
16
Output Audio clock output per table above.
Power Connect to ground.
Output 27 MHz reference clock output.
Input
Select input S0. Selects ACLK per table above. Internal pull-up.
VDD
NC
Power Connect to +3.3 V.
—
No connect. Do not connect anything to this pin.
Select input S1. Selects ACLK per table above. Internal pull-up.
S1
Input
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VCXO AND SYNTHESIZER
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors on the
PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
External Component Selection
The IDT5V10007 requires a minimum number of external
components for proper operation.
De coupling Capacitors
Decoupling capacitors of 0.01µF should be connected
between VDD and GND on pins 3 and 4, pins 6 and 7, and
pins 11 and 14 as close to the IDT5V10007 as possible. For
optimum device performance, the de coupling capacitors
should be mounted on the component side of the PCB.
Avoid the use of vias in the de coupling circuit.
The procedure for determining the value of these capacitors
can be found in application note MAN05.
Series Termination Resistor
When the PCB traces between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50Ω trace (a commonly used trace
impedance) place a 33Ωresistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20Ω.
Quartz Crystal
The IDT5V10007 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To assure
the best system performance (frequency pull range) and
reliability, a crystal device meeting IDT’s recommended
parameters must be used, and the layout guidelines
discussed in the following section must be followed.
See Application Note MAN05 for a full list of crystal
parameters.
The frequency of oscillation of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
IDT5V10007 incorporates on-chip variable load capacitors
that “pull” (change) the frequency of the crystal. The crystal
specified for use with the IDT5V10007 is designed to have
zero frequency error when the total of on-chip + stray
capacitance is 14pF.
The external crystal must be connected as close to the chip
as possible and should be on the same side of the PCB as
the IDT5V10007. There should be no via’s between the
crystal pins and the X1 and X2 device pins. There should be
no signal traces underneath or close to the crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
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Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the IDT5V10007. These ratings, which
are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
5 V
-0.5 V to VDD+0.5 V
0 to +70° C
Ambient Operating Temperature
Storage Temperature
-65 to +150° C
260°C
Soldering Temperature
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
° C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
0
+3.15
3.3
+3.45
V
Refer to page 3
DC Electrical Characteristics
VDD=3.3 V ±5% , Ambient temperature 0 to +70° C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
3.15
2.4
Typ.
Max.
Units
Operating Voltage
VDD
3.3
3.45
V
V
Output High Voltage
V
I
I
I
= -12 mA
= 12 mA
= -4 mA
OH
OH
OL
OH
Output Low Voltage
V
0.4
V
OL
Output High Voltage (CMOS Level)
Input High Voltage (S2:S1:S0)
Input Low Voltage (S2:S1:S0)
Operating Supply Current
V
VDD-0.4
2.2
V
OH
V
V
IH
V
0.8
3.3
V
IL
IDD
No load, 2
outputs
18
mA
Short Circuit Current
I
±50
mA
V
OS
VIN, VCXO Control Voltage
On Chip Pull-up Resistor, inputs
Input Capacitance
V
R
0
IA
S0, S1, S2,PDTS
S0, S1, S2,PDTS
600
5
kΩ
pF
Ω
PU
C
IN
Nominal Output Impedance
Z
20
OUT
AC Electrical Characteristics
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VDD = 3.3 V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Crystal Pullability
VCXO Gain
Symbol
Conditions
0V< VIN < 3.3 V, Note 1
VIN = VDD/2 + 1 V, Note 1
Min. Typ. Max. Units
f
+ 100
ppm
ppm/V
ns
P
80
0.75
0.75
50
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
t
0.8 to 2.0 V, C =15 pF
1.5
1.5
60
OR
L
t
2.0 to 0.8 V, C =15 pF
ns
OF
L
t
Measured at 1.65 V, C =15 pF
40
%
D
L
Maximum Output Jitter,
short term
t
C =15 pF
+150
ps
J
L
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
Still air
78
70
68
37
° C/W
JA
θ
1 m/s air flow
3 m/s air flow
° C/W
° C/W
° C/W
JA
θ
JA
Thermal Resistance Junction to Case
θ
JC
Marking Diagram
16
9
8
IDT5V100
07PGG
YYWW
1
Notes:
1. YYWW is the last two digits of the year and week that the part was assembled.
2. “G” after the two-letter package code designates RoHS compliant package.
3. Bottom marking: country of origin if not USA.
IDT™ VCXO PLUS AUDIO CLOCK FOR STB
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Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Min Max
Inches
Max
16
Symbol
Min
--
A
A1
A2
b
--
1.20
0.15
1.05
0.30
0.20
5.1
0.047
0.006
0.041
0.012
0.05
0.80
0.19
0.09
4.90
0.002
0.032
0.007
E1
E
INDEX
AREA
C
0.0035 0.008
0.193 0.201
0.252 BASIC
0.169 0.177
0.0256 Basic
D
E
6.40 BASIC
4.30 4.50
0.65 Basic
1
2
E1
e
D
L
0.45
0.75
0.018
0.030
α
0°
8°
0°
8°
A
A
2
A
1
c
- C -
e
SEATING
PLANE
b
L
.10 (.004)
C
Ordering Information
Part / Order Number
5V10007PGG
Marking
see page 5
Shipping Packaging
Tubes
Package
16-pin TSSOP
16-pin TSSOP
Temperature
0 to +70° C
0 to +70° C
5V10007PGG8
Tape and Reel
Parts that are ordered with a "G" after the two-letter package code are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
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Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
800-345-7015
408-284-8200
Fax: 408-284-2775
For Tech Support
408-284-4522
clockhelp@idt.com
Corporate Headquarters
Integrated Device Technology, Inc.
www.idt.com
© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device
Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered
trademarks used to identify products or services of their respective owners.
Printed in USA
IDT5V10007
VCXO PLUS AUDIO CLOCK FOR STB
VCXO AND SYNTHESIZER
IDT™ VCXO PLUS AUDIO CLOCK FOR STB
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