IDT5V2310PG

更新时间:2024-09-18 02:00:23
品牌:IDT
描述:2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER

IDT5V2310PG 概述

2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER 2.5V至3.3V的高性能时钟缓冲器

IDT5V2310PG 数据手册

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IDT5V2310  
ADVANCE  
INFORMATION  
2.5V TO 3.3V HIGH  
PERFORMANCE CLOCK  
BUFFER  
FEATURES:  
DESCRIPTION:  
• High performance 1:10 clock driver for general purpose  
applications  
The IDT5V2310 is a high performance, low skew clock buffer that  
operatesupto200MHz. Twobanksoffiveoutputseachprovidelowskew  
copies of CLK. Through the use of control pins 1G and 2G, the outputs of  
banks 1Y(0:4) and 2Y(0:4) can be placed in a low state regardless of CLK  
input. The device operates in 2.5V and 3.3V environments. The built-in  
output enable glitch suppression ensures a synchronized output enable  
sequence to distribute full period clock signals.  
• Operates up to 200MHz at VDD = 3.3V  
• Pin-to-pin skew < 50ps  
• VDD range: 2.3V to 3.6V  
• Output enable glitch suppression  
• Distributes one clock input to two banks of five outputs  
• 25on-chip series dampening resistors  
• Available in TSSOP and VFQFPN packages  
The IDT5V2310 is characterized for operation from -40°C to +85°C.  
FUNCTIONALBLOCKDIAGRAM  
3
1Y0  
25  
4
1Y1  
25Ω  
5
1Y2  
25Ω  
8
1Y3  
25Ω  
9
1Y4  
25Ω  
11  
1G  
2G  
LOGIC CONTROL  
13  
LOGIC CONTROL  
21  
2Y0  
24  
25Ω  
CLK  
20  
2Y1  
25Ω  
17  
2Y2  
25Ω  
16  
2Y3  
25Ω  
12  
2Y4  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
25Ω  
INDUSTRIAL TEMPERATURE RANGE  
JUNE 2003  
1
c
2003 Integrated Device Technology, Inc.  
DSC 6173/17  
IDT5V2310  
2.5VTO3.3VHIGHPERFORMANCECLOCKBUFFER  
INDUSTRIALTEMPERATURERANGE  
PINCONFIGURATION  
GND  
VDD  
1Y0  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CLK  
VDD  
VDD  
2Y0  
2
1
20  
3
19  
VDD  
1Y0  
1Y1  
1Y2  
1Y3  
2
3
4
5
6
7
8
9
VDD  
18  
VDD  
4
1Y1  
17  
2Y0  
5
1Y2  
2Y1  
16  
2Y1  
6
GND  
GND  
1Y3  
GND  
GND  
2Y2  
GND  
15  
2Y2  
7
14  
1Y4  
VDD  
1G  
2Y3  
8
13  
VDD  
9
1Y4  
2Y3  
12  
VDD  
10  
11  
12  
VDD  
1G  
VDD  
VDD  
2G  
10  
11  
2Y4  
TSSOP  
TOP VIEW  
VFQFPN  
TOP VIEW  
ABSOLUTEMAXIMUMRATINGS(1)  
CAPACITANCE(TA = +25°C, f = 1MHz, VIN = 0V)  
Parameter Description  
InputCapacitance  
VI = 0V or VDD  
Min.  
Typ.  
Max.  
Unit  
Symbol  
VDD  
VI  
Description  
Power Supply Voltage  
Input Voltage(2)  
Max  
Unit  
V
–0.5 to +4.6  
–0.5 to VDD +0.5  
–0.5 to VDD +0.5  
±50  
CIN  
2.5  
pF  
V
VO  
Output Voltage(2)  
V
IIK  
Input Clamp Current  
VI < 0 or VI > VDD  
mA  
FUNCTIONTABLE(1)  
IOK  
IO  
Output Clamp Current  
VO < 0 or VO > VDD  
±50  
±50  
mA  
mA  
°C  
Inputs  
Outputs  
1G  
L
2G  
L
CLK  
X
1Y(0:4)  
2Y(0:4)  
Continuous Total Output Current  
VO < 0 to VDD  
L
H
L
L
L
H
L
L
H
TSTG  
Storage Temperature  
–65 to +150  
H
H
H
H
H
NOTES:  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause  
permanent damage to the device. This is a stress rating only and functional operation  
of the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
H
H
H
NOTE:  
1. H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Don’t Care  
2. Not to exceed 4.6V.  
2
IDT5V2310  
INDUSTRIALTEMPERATURERANGE  
2.5VTO3.3VHIGHPERFORMANCECLOCKBUFFER  
PINDESCRIPTION  
TERMINAL  
Symbol  
I/O  
Description  
1G  
I
Output Enable Control for 1Y(0:4) Outputs. This output enable is active HIGH. If this pin is Logic HIGH, the 1Y(0:4) clock outputs will follow the  
input clock (CLK). If this pin is logic LOW, the 1Y(0:4) outputs will drive low independent of the state of CLK.  
2G  
I
Output Enable Control for 2Y(0:4) Outputs. This output enable is active HIGH. If this pin is Logic HIGH, the 2Y(0:4) clock outputs will follow the  
input clock (CLK). If this pin is logic LOW, the 2Y(0:4) outputs will drive low independent of the state of CLK.  
1Y(0:4)  
2Y(0:4)  
CLK  
GND  
VDD  
O
O
I
BufferedOutputClocks  
BufferedOutputClocks  
InputReferenceFrequency  
Ground  
PWR  
DC Power Supply, 2.3V to 3.6V  
RECOMMENDEDOPERATINGRANGE  
Symbol  
Description  
Min.  
Typ.  
2.5  
Max.  
Unit  
VDD  
InternalPowerSupplyVoltage  
2.3  
V
3.3  
3.6  
0.8  
0.7  
VIL  
VIH  
InputVoltageLOW  
Input Voltage HIGH  
VDD = 3V to 3.6V  
VDD = 2.3V to 2.7V  
VDD = 3V to 3.6V  
VDD = 2.3V to 2.7V  
V
V
2
1.7  
0
VI  
InputVoltage  
VDD  
-12  
-6  
V
IOH  
Output Current HIGH  
VDD = 3V to 3.6V  
VDD = 2.3V to 2.7V  
VDD = 3V to 3.6V  
VDD = 2.3V to 2.7V  
mA  
IOL  
TA  
OutputCurrentLOW  
12  
mA  
°C  
6
AmbientOperatingTemperature  
-40  
+85  
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE  
Symbol  
VIK  
Parameter  
Test Conditions  
VDD = 3V, IIN = -18mA  
Min.  
Typ.  
Max  
- 1.2  
±5  
Unit  
V
InputVoltage  
InputCurrent  
IIN  
VI = 0V or VDD  
µA  
µA  
IDD  
StaticDeviceCurrent(1)  
CLK = 0V or VDD, IO = 0mA, VDD = 3.3V  
25  
NOTE:  
1. For IDD over frequency, see TEST CIRCUIT AND WAVEFORMS.  
DC ELECTRICAL CHARACTERISTICS - VDD = 3.3V ± 0.3V  
Symbol  
Parameter  
Test Conditions  
VDD = Min. to Max.  
Min.  
VDD - 0.2  
2.1  
Typ.(1)  
Max  
Unit  
IOH = -100µA  
IOH = -12mA  
IOH = -6mA  
IOH = 100µA  
IOH = 12mA  
IOH = 6mA  
VO = 1V  
VOH  
HIGH level Output Voltage  
VDD = 3V  
V
2.4  
VDD = Min. to Max.  
VDD = 3V  
0.2  
0.8  
VOL  
IOH  
IOL  
LOWlevelOutputVoltage  
HIGH level Output Current  
LOWlevelOutputCurrent  
V
0.55  
VDD = 3V  
-28  
28  
VDD = 3.3V  
VDD = 3.6V  
VDD = 3V  
VO = 1.65V  
VO = 3.135V  
VO = 1.95V  
VO = 1.65V  
VO = 0.4V  
-36  
36  
mA  
mA  
-14  
14  
VDD = 3.3V  
VDD = 3.6V  
NOTE:  
1. All typical values are at respective nominal VDD.  
3
IDT5V2310  
2.5VTO3.3VHIGHPERFORMANCECLOCKBUFFER  
INDUSTRIALTEMPERATURERANGE  
DC ELECTRICAL CHARACTERISTICS - VDD = 2.5V ± 0.2V  
Symbol  
Parameter  
Test Conditions  
Min.  
VDD - 0.2  
1.8  
Typ.(1)  
Max  
Unit  
VOH  
HIGH level Output Voltage  
VDD = Min. to Max.  
IOH = -100µA  
IOH = -6mA  
IOH = 100µA  
IOH = 6mA  
VO = 1V  
V
VDD = 2.3V  
VDD = Min. to Max.  
VDD = 2.3V  
VDD = 2.3V  
VDD = 2.5V  
VDD = 2.7V  
VDD = 2.3V  
VDD = 2.5V  
VDD = 2.7V  
VOL  
IOH  
IOL  
LOWlevelOutputVoltage  
HIGH level Output Current  
LOWlevelOutputCurrent  
0.2  
V
0.55  
-17  
17  
VO = 1.25V  
VO = 2.375V  
VO = 1.2V  
VO = 1.25V  
VO = 0.3V  
-25  
25  
mA  
mA  
-10  
10  
NOTE:  
1. All typical values are at respective nominal VDD.  
TIMINGREQUIREMENTSOVERRECOMMENDEDRANGE  
Symbol  
Parameter  
Clock Frequency  
Test Conditions  
VDD = 3V to 3.6V  
VDD = 2.3V to 2.7V  
Min.  
Typ.  
Max  
200  
170  
Unit  
fCLK  
0
0
MHz  
4
IDT5V2310  
INDUSTRIALTEMPERATURERANGE  
2.5VTO3.3VHIGHPERFORMANCECLOCKBUFFER  
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE-  
VDD = 3.3V ± 0.3V(1)  
Symbol  
tPLH  
Parameter  
Test Conditions  
f = 0MHz to 200MHz  
Min.  
Typ.(1)  
Max  
Unit  
CLK to Yx  
1.3  
2.8  
ns  
tPHL  
tSK(O)(2)  
tSK(P)  
tSK(PP)  
tR  
Output Skew, Yx to Yx  
Pulse Skew  
100  
250  
500  
2
ps  
ps  
Part-to-PartSkew  
RiseTime  
ps  
VO = 0.4V to 2V  
0.7  
0.7  
0.1  
0.4  
V/ns  
V/ns  
ns  
tF  
FallTime  
VO = 2V to 0.4V  
2
tSU  
G before CLK↓  
G after CLK↓  
V(THRESHOLD) = VDD/2  
tH  
NOTES:  
1. All typical values are at respective nominal VDD.  
2. This specification is only valid for equal loading of all outputs.  
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE-  
VDD = 2.5V ± 0.2V(1)  
Symbol  
tPLH  
Parameter  
Test Conditions  
f = 0MHz to 170MHz  
Min.  
Typ.(1)  
Max  
Unit  
CLK to Yx  
1.5  
3.5  
ns  
tPHL  
tSK(O)(2)  
tSK(P)  
tSK(PP)  
tR  
Output Skew, Yx to Yx  
Pulse Skew  
100  
400  
600  
1.4  
1.4  
ps  
ps  
Part-to-PartSkew  
RiseTime  
ps  
VO = 0.4V to 1.7V  
VO = 1.7V to 0.4V  
V(THRESHOLD) = VDD/2  
0.5  
0.5  
0.1  
0.4  
V/ns  
V/ns  
ns  
tF  
FallTime  
tSU  
G before CLK↓  
G after CLK↓  
tH  
NOTES:  
1. All typical values are at respective nominal VDD.  
2. This specification is only valid for equal loading of all outputs.  
5
IDT5V2310  
2.5VTO3.3VHIGHPERFORMANCECLOCKBUFFER  
INDUSTRIALTEMPERATURERANGE  
OUTPUTENABLEGLITCHSUPPRESSIONCIRCUIT  
Thepurposeoftheglitchsuppressioncircuitryistoensuretheoutputenablesequenceissynchronizedwiththeclockinputsuchthattheoutputbufferwillbe  
enabledonthenextfullperiodoftheinputclock(negativeedgetriggeredbytheinputclock). TheGinputmustbestableonetEN -timepriortothefallingedge  
oftheCLKforpredictableoperation.  
CLK  
Gx  
tEN  
tDIS  
Yx  
G (tEN, tDIS) Relative to CLK  
6
IDT5V2310  
INDUSTRIALTEMPERATURERANGE  
2.5VTO3.3VHIGHPERFORMANCECLOCKBUFFER  
TESTCIRCUITSANDWAVEFORMS  
FROM OUTPUT  
UNDER TEST  
500  
CL  
NOTES:  
1. CL includes probe and jig capacitance.  
2. All input pulses are supplied by generators having the following characteristics:  
PRR 200MHz; ZO = 50; tR < 1.2ns; tF < 1.2ns.  
Test Load Circuit  
VDD  
50% VDD  
CLK  
0V  
tPLH  
tPHL  
VOH  
1.7V or 2V  
50% VDD  
VOL  
Yx  
0.4V  
tR  
0.4V  
tF  
Voltage Waveforms Propagation Delay Times  
VDD  
CLK  
0V  
VOH  
Any Y  
Any Y  
50% VDD  
VOL  
VOH  
50% VDD  
VOL  
tSK(O)  
tSK(O)  
Output Skew  
VDD  
CLK  
Yx  
50% VDD  
0V  
tPLH  
tPHL  
VOH  
50% VDD  
VOL  
tSK(P) =  
tPLH tPHL  
Pulse Skew  
7
IDT5V2310  
2.5VTO3.3VHIGHPERFORMANCECLOCKBUFFER  
INDUSTRIALTEMPERATURERANGE  
ORDERINGINFORMATION  
X
XXXXX  
XX  
IDT  
Package Package  
Device Type  
I
-40°C to +85°C (Industrial)  
Thin Shrink Small Outline Package  
Thermally Enhanced Plastic Very Fine  
Pitch Quad Flat No Lead Package  
PG  
NR  
5V2310 2.5V to 3.3V High Performance Clock Buffer  
CORPORATE HEADQUARTERS  
2975StenderWay  
Santa Clara, CA 95054  
for SALES:  
for Tech Support:  
logichelp@idt.com  
(408) 654-6459  
800-345-7015 or 408-727-6116  
fax: 408-492-8674  
www.idt.com  
8

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