IDT6168LA85LB [IDT]
Standard SRAM, 4KX4, 85ns, CMOS, CQCC20, 0.300 INCH, LCC-20;
| 型号： | IDT6168LA85LB |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Standard SRAM, 4KX4, 85ns, CMOS, CQCC20, 0.300 INCH, LCC-20 静态存储器 内存集成电路 |
| 文件： | 总8页 (文件大小：75K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT6168SA
IDT6168LA
CMOS STATIC RAM
16K (4K x 4-BIT)
Integrated Device Technology, Inc.
provides a cost-effective approach for high-speed memory
applications.
FEATURES:
• High-speed (equal access and cycle time)
— Military: 15/20/25/35/45/55/70/85/100ns (max.)
— Commercial: 15/20/25/35ns (max.)
• Low power consumption
• Battery backup operation—2V data retention voltage
(IDT6168LA only)
• Available in high-density 20-pin ceramic or plastic DIP, 20-
pinSOlC,20-pinCERPACKand20-pinleadlesschipcarrier
• Produced with advanced CMOS high-performance
technology
• CMOS process virtually eliminates alpha particle soft-error
rates
Access times as fast 15ns are available. The circuit also
offers a reduced power standby mode. When CSgoes HIGH,
the circuit will automatically go to, and remain in, a standby
mode as long as CS remains HIGH. This capability provides
significant system-level power and cooling savings. The low-
power (LA) version also offers a battery backup data retention
capability where the circuit typically consumes only 1µW
operating off a 2V battery. All inputs and outputs of the
IDT6168 are TTL-compatible and operate from a single 5V
supply.
The IDT6168 is packaged in either a space saving 20-pin,
300-mil ceramic or plastic DIP, 20-pin CERPACK, 20-pin
SOIC, or 20-pin leadless chip carrier, providing high board-
level packing densities.
• Bidirectional data input and output
• Military product compliant to MIL-STD-883, Class B
Military grade product is manufactured in compliance with
the latest revision of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
DESCRIPTION:
The IDT6168 is a 16,384-bit high-speed static RAM orga-
nized as 4K x 4. It is fabricated using lDT’s high-performance,
high-reliability CMOS technology. This state-of-the-art tech-
nology, combined with innovative circuit design techniques,
FUNCTIONAL BLOCK DIAGRAM
A0
VCC
GND
ADDRESS
DECODER
16,384-BIT
MEMORY ARRAY
A11
I/O0
I/O CONTROL
I/O1
INPUT
DATA
CONTROL
I/O2
I/O3
CS
3090 drw 01
WE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGE
MAY 1994
1994 Integrated Device Technology, Inc.
DSC-1121/1
5.2
1
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TRUTH TABLE(1)
PIN CONFIGURATIONS
Mode
Standby
Read
Output
High-Z
DOUT
DIN
Power
Standby
Active
CS
H
WE
X
1
20
19
18
17
16
15
14
13
12
11
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
V
A
A
A
A
CC
11
10
9
2
L
H
3
P20-1,
D20-1,
SO20-2,
& E20-1
Write
NOTE:
1. H = VIH, L = VIL, X = Don't Care
L
L
Active
4
3090 tbl 03
5
8
6
I/O
I/O
I/O
I/O
3
2
1
0
7
8
9
CS
ABSOLUTE MAXIMUM RATINGS(1)
10
GND
WE
Symbol
Rating
Com’l.
Mil.
Unit
3090 drw 02
VTERM
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0
V
with Respect
to GND
DIP/SOIC/SOJ/CERPACK
TOP VIEW
TA
Operating
Temperature
0 to +70
–55 to +125 °C
INDEX
TBIAS
TSTG
Temperature
Under Bias
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
20 19
2
1
A2
A3
A4
A5
A6
A7
18
A10
3
Storage
Temperature
A9
A8
17
16
15
14
13
4
5
PT
Power Dissipation
1.0
50
1.0
50
W
L20-1
I/O3
I/O2
I/O1
6
7
8
IOUT
DC Output
Current
mA
NOTE:
3090 tbl 04
9
10 11 12
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
3090 drw 03
LCC
TOP VIEW
PIN DESCRIPTIONS
RECOMMENDED DC OPERATING
CONDITIONS
Name
A0–A11
CS
Description
Address Inputs
Symbol
VCC
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Min. Typ. Max. Unit
Chip Select
Write Enable
Data Input/Output
Power
4.5
0
5.0
0
5.5
0
V
WE
GND
VIH
V
V
I/O0-3
VCC
2.2
–0.5(1)
—
—
6.0
0.8
VIL
V
GND
Ground
NOTE:
3090 tbl 05
3090 tbl 01
1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle.
CAPACITANCE (TA = +25°C, F = 1.0MHZ)
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Symbol Parameter(1)
Conditions Max. Unit
CIN
Input Capacitance
I/O Capacitance
VIN = 0V
7
7
pF
Grade
Military
Temperature
–55°C to +125°C
0°C to +70°C
GND
0V
VCC
CI/O
VOUT = 0V
pF
5V ± 10%
NOTE:
3090 tbl 02
1. This parameter is determined by device characterization, but is not
production tested.
Commercial
0V
5V ± 10%
3090 tbl 06
5.2
2
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V)
6168SA15
6168SA20
6168LA20
Symbol
Parameter
Power Com’l. Mil.
Com’l. Mil.
Unit
ICC1
Operating Power Supply Current
CS ≤ VIL, Outputs Open,
VCC = Max., f = 0(3)
SA
110
120
90
100
mA
LA
SA
—
—
70
80
ICC2
ISB
Dynamic Operating Current
145
165
120
120
mA
mA
CS ≤ VIL, Outputs Open,
(3)
VCC = Max., f = fMAX
LA
SA
—
—
100
45
110
45
Standby Power Supply Current
(TTL Level)
55
60
CS ≥ VIH, VCC = Max.,
Outputs Open, f = fMAX
LA
—
—
30
35
(3)
ISB1
Full Standby Power Supply Current
(CMOS Level)
SA
LA
20
—
20
—
20
20
5
mA
CS ≥ VHC, VCC = Max.,
0.5
VIN ≥ VHC or VIN ≤ VLC, f = 0(3)
3090 tbl 07
DC ELECTRICAL CHARACTERISTICS (CONTINUED)(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V)
6168SA25
6168LA25
6168SA35
6168LA35
6168SA45/55 6168SA70(2)
6168LA45/55
6168LA70(2)
Symbol
Parameter
Power Com’l.
Mil. Com’l.
Mil. Com’l. Mil. Com’l. Mil.
Unit
ICC1
Operating Power Supply Current
CS ≤ VIL, Outputs Open,
VCC = Max., f = 0(3)
SA
90
100
90
100
—
100
—
100
mA
LA
SA
70
80
70
80
—
—
80
—
—
80
ICC2
ISB
Dynamic Operating Current
110
120
100
110
110
110
mA
mA
CS ≤ VIL, Outputs Open,
(3)
VCC = Max., f = fMAX
LA
SA
90
35
100
45
80
30
90
35
—
—
80
35
—
—
80
35
Standby Power Supply Current
(TTL Level)
CS ≥ VIH, VCC = Max.,
Outputs Open, f = fMAX
LA
25
30
20
25
—
25/20
—
20
(3)
ISB1
Full Standby Power Supply Current
(CMOS Level)
SA
LA
3
10
3
10
—
—
10
—
—
10
mA
CS ≥ VHC, VCC = Max.,
0.5
0.3
0.5
0.3
0.3
0.3
VIN ≥ VHC or VIN ≤ VLC, f = 0(3)
NOTES:
3090 tbl 08
1. All values are maximum guaranteed values.
2. Also available 85 and 100ns military devices.
3. fMAX = 1/tRC, only address inputs are cycling at fMAX. f = 0 means no address inputs are changing.
DC ELECTRICAL CHARACTERISTICS VCC = 5.0V ± 10%
IDT6168SA
Min. Max.
IDT6168LA
Min. Max.
Symbol
Parameter
Test Condition
VCC = Max.,
VIN = GND to VCC
Unit
|ILI|
Input Leakage Current
MIL
COM’L
—
—
10
2
—
—
5
2
µA
|ILO|
VOL
Output Leakage Current VCC = Max., CS = VIH,
VOUT = GND to VCC
MIL
COM’L
—
—
10
2
—
—
5
2
µA
Output LOW Voltage
IOL = 10mA, VCC = Min.
IOL = 8mA, VCC = Min.
IOH = –4mA, VCC = Min.
—
—
0.5
0.4
—
—
—
0.5
0.4
—
V
VOH
Output HIGH Voltage
2.4
2.4
V
3090 tbl 09
5.2
3
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA RETENTION CHARACTERISTICS (LA Version Only)
VLC = 0.2V, VHC = VCC – 0.2V
IDT6168LA
Symbol
VDR
Parameter
Test Condition
Min.
Typ.(1)
Max.
Unit
V
VCC for Data Retention
Data Retention Current
2.0
—
—
ICCDR
MIL.
—
—
—
—
0.5(2)
1.0(3)
0.5(2)
1.0(3)
100(2)
150(3)
20(2)
µA
CS ≥ VHC
VIN ≥ VHC
or ≤ VLC
COM’L.
µA
30(3)
(5)
tCDR
Chip Deselect to Data
Retention Time
0
—
—
—
ns
(5)
(2)
tR
Operation Recovery Time
tRC
—
ns
NOTES:
3090 tbl 10
1. TA = +25°C.
2. at VCC = 2V
3. at VCC = 3V
4. tRC = Read Cycle Time.
5. This parameter is guaranteed by device characterization, but is not production tested.
LOW VCC DATA RETENTION WAVEFORM
DATA
RETENTION
MODE
V
CC
4.5V
4.5V
V
DR ≥ 2V
tCDR
tR
VIH
VIH
CS
VDR
3090 drw 04
AC TEST CONDITIONS
Input Pulse Levels
GND to 3.0V
5ns
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
1.5V
1.5V
See Figures 1 and 2
3090 tbl 11
5V
5V
480Ω
480Ω
DATAOUT
DATAOUT
255Ω
30pF*
255Ω
5pF*
3090 drw 05
3090 drw 06
Figure 1. AC Test Load
Figure 2. AC Test Load
(for tCHZ, tCLZ, tWHZ and tOW)
*Includes scope and jig capacitances
5.2
4
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA15 6168SA20/25
6168LA20/25
Min. Max. Min. Max. Unit
Symbol
Read Cycle
tRC
Parameter
Read Cycle Time
15
—
—
3
—
15
15
—
8
20/25
—
—
5
—
20/25
20/25
—
ns
ns
tAA
Address Access Time
tACS
Chip Select Access Time
ns
(2)
tCLZ
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
Output Hold from Address Change
Chip Select to Power-Up Time
Chip Deselect to Power-Down Time
ns
(2)
tCHZ
—
3
—
3
10
ns
tOH
—
—
15
—
ns
(2)
tPU
0
0
—
ns
(2)
tPD
—
—
20/25
ns
3090 drw 12
AC ELECTRICAL CHARACTERISTICS (CONTINUED) (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA35
6168LA35
6168SA45(1)
6168LA45(1)
6168SA55(1)
6168LA55(1)
6168SA70(1)
6168LA70(1)
Symbol
Read Cycle
Parameter
Read Cycle Time
Min. Max.
Min. Max. Min. Max. Min. Max. Unit
tRC
tAA
35
—
—
5
—
35
35
—
15
—
—
35
45
—
—
5
—
45
45
—
25
—
—
40
55
—
—
5
—
55
55
—
25
—
—
50
70
—
—
5
—
70
70
—
30
—
—
60
ns
ns
Address Access Time
tACS
Chip Select Access Time
ns
(2)
tCLZ
tCHZ
tOH
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
Output Hold from Address Change
Chip Select to Power-Up Time
Chip Deselect to Power-Down Time
ns
(2)
—
3
—
3
—
3
—
3
ns
ns
(2)
tPU
tPD
0
0
0
0
ns
(2)
—
—
—
—
ns
NOTES:
1. –55°C to +125°C temperature range only. Also available 85ns and 100ns devices.
3090 tbl 13
2. This parameter is guaranteed with AC Test load (Figure 2) by device characterization, but is not production tested.
TIMING WAVEFORM OF READ CYCLE NO. 1(1, 2)
tRC
ADDRESS
tAA
tOH
DATAOUT
PREVIOUS DATA VALID
DATA VALID
3090 drw 07
5.2
5
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 2(1, 3)
tRC
CS
(3)
tCHZ
tACS
(4)
tCLZ
HIGH IMPEDANCE
DATAOUT
DATAOUT VALID
HIGH IMPEDANCE
tPU
tPD
ICC
VCC
SUPPLY
CURRENT
ISB
3090 drw 08
NOTES:
1. WE is HIGH for Read cycle.
2. CS is LOW for Read cycle.
3. Device is continuously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. Transition is measured ±200mV from steady state.
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA20/25
6168SA15 6168LA20/25
Symbol
Parameter
Min. Max. Min. Max. Unit
Write Cycle
tWC
Write Cycle Time
15
15
15
0
—
—
—
—
—
—
—
—
6
20
20
20
0
—
—
—
—
—
—
—
—
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCW
Chip Select to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
tAW
tAS
tWP
Write Pulse Width
15
0
20
0
tWR
Write Recovery Time
tDW
Data Valid to End-of-Write
Data Hold Time
9
10
0
tDH
0
(3)
tWHZ
Write Enable to Output in High-Z
Output Active from End-of-Write
—
0
—
0
(3)
tOW
—
—
ns
3090 tbl 14
5.2
6
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (CONTINUED) (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA35
6168LA35
6168SA45(2) 6168SA55(2) 6168SA70(2)
6168LA45(2) 6168LA55(2) 6168LA70(2)
Symbol
Parameter
Min. Max. Min.
Max. Min.
Max. Min. Max. Unit
Write Cycle
tWC
tCW
tAW
tAS
Write Cycle Time
30
30
30
0
—
—
—
—
—
—
—
—
13
—
40
40
40
0
—
—
—
—
—
—
—
—
20
—
50
50
50
0
—
—
—
—
—
—
—
—
25
—
60
60
60
0
—
—
—
—
—
—
—
—
30
—
ns
ns
Chip Select to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
ns
ns
tWP
tWR
tDW
tDH
Write Pulse Width
30
0
40
0
50
0
60
0
ns
Write Recovery Time
ns
DataValid to End-of-Write
Data Hold Time
15
0
20
3
20
3
25
3
ns
ns
(3)
tWHZ
Write Enable to Output in High-Z
Output Active from End-of-Write
—
0
—
0
—
0
—
0
ns
(3)
tOW
NOTES:
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only. Also available 85ns and 100ns devices.
3. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
ns
3090 tbl 15
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (
CONTROLLED TIMING)(1, 2, 5)
WE
tWC
ADDRESS
CS
tAW
(3)
tWP
tWR
t AS
WE
(6)
tCHZ
(6)
tWHZ
(6)
tOW
DATA
PREVIOUS DATA VALID(4)
DATAOUT
DATAIN
VALID (4)
tDW
t DH
DATA VALID
3090 drw 09
5.2
7
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
CONTROLLED TIMING)(1, 2, 5)
CS
tWC
ADDRESS
tAW
CS
(3)
tWR
tAS
tCW
WE
tDW
t DH
DATAIN
DATA VALID
3090 drw 10
NOTES:
1. WE or CS must be HIGH during all address transitions.
2. A write occurs during the overlap of a LOW CS and a LOW WE.
3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle.
4. During this period, the I/O pins are in the output state and input signals should not be applied.
5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high impedance state.
6. Transition is measured ±200mV from steady state.
ORDERING INFORMATION
IDT 6168
XX
XXX
XX
X
Device
Type
Power
Speed
Package
Process/
Temperature
Range
Blank Commercial (0°C to +70°C)
B
Military (–55°C to +125°C)
Compliant to MIL-STD-883, Class B
P
300mil Plastic DIP (P20-1)
D
300mil Ceramic DIP (D20-1)
Leadless Chip Carrier (L20-1)
300mil Small Outline IC, Gull Wing (SO20-2)
300mil CERPACK (E20-1)
L
SO
E
15
20
25
35
45
55
70
85
100
Military Only
Military Only
Military Only
Military Only
Military Only
Speed in nanoseconds
SA
LA
Standard Power
Low Power
3090 drw 11
5.2
8
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