IDT71V016SA15YG28 [IDT]
Standard SRAM, 64KX16, 15ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-44;
| 型号： | IDT71V016SA15YG28 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Standard SRAM, 64KX16, 15ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-44 静态存储器 光电二极管 |
| 文件： | 总9页 (文件大小：482K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3.3V CMOS Static RAM
for Automotive Applications
1 Meg (64K x 16-Bit)
IDT71V016SA
Features
Description
◆
64K x 16 advanced high-speed CMOS Static RAM
TheIDT71V016isa1,048,576-bithigh-speedStaticRAMorganized
as64Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-
speedmemoryneedsandautomotiveapplications.
◆
Equal access and cycle times
— Automotive:12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
◆
◆
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
The IDT71V016 has an output enable pin which operates as fast
as 5ns, with address access times as fast as 10ns. All bidirectional
inputsandoutputsoftheIDT71V016areLVTTL-compatibleandoperation
isfromasingle3.3Vsupply.Fullystaticasynchronouscircuitryisused,
requiringnoclocks orrefreshforoperation.
◆
◆
◆
◆
Available in 44-pin Plastic SOJ, 44-pin TSOP, and
48-Ball Plastic FBGA packages
Functional Block Diagram
Output
The IDT71V016 is packaged in a JEDEC standard 44-pin Plastic
SOJ, a 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
OE
Enable
Buffer
Address
Buffers
Row / Column
Decoders
A0 – A15
I/O15
High
Byte
I/O
8
8
Chip
Enable
CS
Buffer
Buffer
I/O8
Sense
Amps
and
Write
Drivers
16
64K x 16
Memory
Array
Write
Enable
Buffer
WE
I/O
7
0
Low
Byte
I/O
8
8
Buffer
I/O
BHE
BLE
Byte
Enable
Buffers
6818 drw 01
DECEMBER 2004
1
©2004 IntegratedDeviceTechnology,Inc.
DSC-6818/00
IDT71V016SA, 3.3V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
Pin Configurations
1
2
3
4
5
6
A
B
C
D
E
A
0
A
1
A
2
NC
BLE
OE
A
A
A
4
3
2
1
A
A
A
5
6
7
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
2
3
I/O8
A3
A4
I/O0
BHE
I/O10
I/O11
I/O12
I/O13
NC
CS
A
1
4
OE
A
0
5
BHE
BLE
I/O15
I/O14
I/O13
I/O12
I/O9
A5
A6
I/O
1
I/O2
C
6
S 0
I/O
7
VSS
NC
NC
A7
I/O
3
VDD
I/O
1
8
I/O
I/O
2
3
9
VDD
NC
I/O
4
VSS
10
11
12
13
14
15
16
17
18
19
20
21
22
SO44-1
SO44-2
V
DD
SS
V
V
SS
DD
F
I/O14
I/O15
NC
A14
A15
I/O
5
I/O6
V
I/O
I/O
I/O
I/O
4
5
6
7
I/O11
I/O10
G
H
A12
A13
I/O7
WE
I/O
9
8
I/O
A8
A9
A10
A11
NC
WE
NC
A15
A14
A13
A12
A
A
A
A
8
6818 tbl 02a
FBGA (BF48-1)
Top View
9
10
11
Pin Description
NC
NC
6818 drw 02
SOJ/TSOP
Top View
Truth Table(1)
I/O
0
-I/O
7
I/O
8
-I/O15
Function
Deselected – Standby
Low Byte Read
High Byte Read
Word Read
CS
H
L
OE
X
L
WE
X
H
H
H
L
BLE
BHE
X
H
L
X
L
High-Z
DATAOUT
High-Z
High-Z
High-Z
L
L
H
L
DATAOUT
DATAOUT
DATAIN
High-Z
L
L
L
DATAOUT
DATAIN
DATAIN
High-Z
L
X
X
X
H
X
L
L
Word Write
L
L
L
H
L
Low Byte Write
L
L
H
X
H
DATAIN
High-Z
High Byte Write
Outputs Disabled
Outputs Disabled
L
H
X
X
H
High-Z
L
High-Z
High-Z
6818 tbl 02
NOTE:
1. H = VIH, L = VIL, X = Don't care.
6.422
IDT71V016SA, 3.3V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
Absolute Maximum Ratings(1)
Recommended Operating
Symbol
Rating
Value
Unit
Temperature and Supply Voltage
VDD
Supply Voltage Relative to
–0.5 to +4.6
V
Grade
Temperature
-40°C to +125°C
-40°C to +105°C
-40°C to +85°C
0°C to +70°C
V
SS
VDD
VSS
Automotive Grade 1
Automotive Grade 2
Automotive Grade 3
Automotive Grade 4
0V
0V
0V
0V
See Below
See Below
See Below
Terminal Voltage Relative
to VSS
–0.5 to VDD+0.5
V
VIN, VOUT
T
BIAS
Temperature Under Bias
Junction Temperature Page
Storage Temperature
Power Dissipation
–55 to +125
–40 to +150
–65 to +150
1.25
oC
oC
oC
W
TJ
See Below
6818 tbl 04
TSTG
P
T
Recommended DC Operating
Conditions
IOUT
DC Output Current
50
mA
Symbol
Parameter
Supply Voltage
Min.
3.0
0
Typ.
Max.
3.6
0
Unit
V
6818 tbl 03
NOTE:
1. StressesgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycause
permanentdamagetothedevice.Thisisastressratingonlyandfunctionaloperation
ofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperational
sections of this specification is not implied. Exposure to absolute maximum rating
conditionsforextendedperiodsmayaffectreliability.
VDD
3.3
Vss
Ground
0
V
____
V
IH
Input High Voltage
Input Low Voltage
2.0
V
DD+0.3(1)
V
(1)
____
VIL
–0.3
0.8
V
Capacitance
6818 tbl 05
NOTE:
(TA = +25°C, f = 1.0MHz, SOJ/TSOP package)
1. Refer to maximum overshoot/undershoot diagram below. The measured
voltage at device pin should not exceed half sinusoidal wave with 2V peak and
half period of 2ns.
Symbol
Parameter(1)
Input Capacitance
I/O Capacitance
Conditions
IN = 3dV
OUT = 3dV
Max. Unit
CIN
V
6
7
pF
CI/O
V
pF
MaximumOvershoot/Undershoot
6818 tbl 06
NOTE:
+2V
1. Thisparameterisguaranteedbydevicecharacterization,butnotproductiontested.
V
IH
2ns
2ns
VIL
-2V
6818 drw 12
DC Electrical Characteristics
(VDD = Min. to Max., Automotive Temperature Ranges)
Automotive
Temperature
Grade
IDT71V016SA
Symbol
Parameter
Input Leakage Current
Test Conditions
DD = Max., VIN =
Min.
Max.
Unit
___
___
___
___
___
1 and 2
3 and 4
1 and 2
3 and 4
5
1
5
1
|ILI|
V
VSS to VDD
µA
|ILO|
Output Leakage Current
VDD = Max., CS = VIH, VOUT = VSS to VDD
µA
V
VOL
Output Low Voltage
Output High Voltage
I
OL = 8mA, VDD = Min.
0.4
___
VOH
I
OH = -4mA, VDD = Min.
2.4
V
6818 tbl 07
6.42
3
IDT71V016SA, 3.3V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
DC Electrical Characteristics(1,2)
(VDD = Min. to Max., VLC = 0.2V, VHC = VDD – 0.2V, Automotive Temperature Ranges)
71V016SA12
71V016SA15
71V016SA20
Parameter
Automotive Grade
Automotive Grade
Automotive Grade
Unit
Symbol
1
2
100
75
3 and 4
1
80
70
2
80
70
3 and 4
1
80
70
2
80
70
3 and 4
Max.
110
75
90
75
80
70
80
70
Dynamic Operating Current
ICC
mA
mA
(3)
CS < VLC, Outputs Open, VDD = Max., f = fMAX
Typ.(4)
Dynamic Standby Power Supply Current
CS > VHC, Outputs Open, VDD = Max., f = fMAX
ISB
45
5
45
5
35
2
35
5
35
5
30
2
30
5
30
5
30
2
(3)
Full Standby Power Supply Current (static)
CS > VHC, Outputs Open, VDD = Max., f = 0(3)
I
SB
1
mA
6818 tbl 8
NOTES:
1. All values are maximum guaranteed values.
2. All inputs switch between 0.2V (Low) and VDD – 0.2V (High).
3. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing .
4. Typical values are measured at 3.3V, 25°C and with equal read and write cycles. These parameter is guaranteed by device characterization but is not production
tested.
AC Test Conditions
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
1.5ns
1.5V
1.5V
See Figure 1, 2 and 3
6818 tbl 09
3.3V
320
AC Test Loads
W
OUT
DATA
+1.5V
350
W
5pF*
50
W
Z0 =
50W
I/O
6818 drw 04
*Including jig and scope capacitance.
30pF
6818 drw 03
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
Figure 1. AC Test Load
Figure 3. Output Capacitive Derating
6.442
IDT71V016SA, 3.3V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics (VDD = Min. to Max., Automotive Temperature Ranges)
71V016SA20
71V016SA12
71V016SA15
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
READ CYCLE
____
____
____
t
RC
AA
ACS
Read Cycle Time
12
15
20
ns
ns
ns
____
____
____
t
Address Access Time
12
15
20
____
____
____
t
Chip Select Access Time
Chip Select Low to Output in Low-Z
12
15
20
____
____
____
(1,2)
CLZ
4
5
5
ns
t
____
____
____
(1,2)
Chip Select High to Output in High-Z
Output Enable Low to Output Valid
Output Enable Low to Output in Low-Z
6
6
8
ns
ns
ns
t
CHZ
____
____
____
tOE
6
6
8
____
____
____
(1,2)
(1,2)
1
1
1
t
OLZ
____
____
____
Output Enable High to Output in High-Z
Output Hold from Address Change
Byte Enable Low to Output Valid
Byte Enable Low to Output in Low-Z
6
6
8
ns
ns
ns
ns
t
OHZ
OH
BE
t
4
—
4
—
4
—
____
t
—
6
—
6
8
(1,2)
____
____
____
1
1
1
t
BLZ
____
____
____
(1,2)
Byte Enable High to Output in High-Z
Chip Select Low toPower Up
6
6
8
ns
ns
ns
t
BHZ
____
____
____
(3)
PU
0
0
0
t
(3)
PD
____
____
____
Chip Select High toPower Down
12
15
20
t
WRITE CYCLE
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
t
WC
AW
CW
BW
AS
WR
WP
DW
DH
Write Cycle Time
12
8
8
9
0
0
8
6
0
15
10
10
10
0
20
12
12
12
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
Address Valid to End of Write
Chip Select Low to End of Write
Byte Enable Low to End of Write
Address Set-up Time
t
t
t
t
Address Hold from End of Write
Write Pulse Width
0
0
t
10
8
12
9
t
Data Valid to End of Write
Data Hold Time
t
0
0
____
____
____
(1,2)
OW
Write Enable High to Output in Low-Z
Write Enable Low to Output in High-Z
3
3
3
ns
t
(1,2)
WHZ
____
____
____
6
6
8
ns
t
6818 tbl 10
NOTES:
1. At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ, and tWHZ is less than tOW for any given device.
2. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
3. This parameter is guaranteed by design and not production tested.
Timing Waveform of Read Cycle No. 1(1,2,3)
t
RC
ADDRESS
tAA
t
OH
t
OH
DATAOUT VALID
DATAOUT
PREVIOUS DATAOUT VALID
NOTES:
1. WE is HIGH for Read Cycle.
6818 drw 06
2. Deviceiscontinuouslyselected,CSisLOW.
3. OE, BHE, and BLE are LOW.
6.42
5
IDT71V016SA, 3.3V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
Timing Waveform of Read Cycle No. 2(1)
t
RC
ADDRESS
OE
t
AA
t
OH
(3)
tOHZ
tOE
(3)
tOLZ
CS
(2)
t
ACS
(3)
(3)
(3)
t
CHZ
t
CLZ
BLE
BHE,
(2)
t
BE
(3)
t
BHZ
tBLZ
DATAOUT
DATAOUT VALID
tPD
t
PU
I
CC
VDD
Supply
Current
ISB
6818 drw 07
NOTES:
1. WE is HIGH for Read Cycle.
2. AddressmustbevalidpriortoorcoincidentwiththelaterofCS,BHE,or BLE transitionLOW;otherwisetAA isthelimitingparameter.
3. Transitionismeasured±200mVfromsteadystate.
Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,4)
t
WC
ADDRESS
t
AW
C
S
(2)
(5)
(5)
tCW
t
CHZ
t
BW
BHE
,
BLE
WE
tWR
t
BHZ
t
WP
tAS
(5)
t
WHZ
(5)
tOW
PREVIOUS DATA VALID (3)
DATA VALID
DATAOUT
DATAIN
t
DH
t
DW
DATAIN VALID
6818 drw 08
NOTES:
1. A write occurs during the overlap of a LOW CS, LOW BHE or BLE, and a LOW WE.
2. OE is continuouslyHIGH. Ifduringa WE controlledwrite cycle OE is LOW, tWP mustbe greaterthanorequaltotWHZ+tDW toallowthe I/Odrivers toturnoffanddata tobe placed
onthe bus forthe requiredtDW. IfOE is HIGHduringaWE controlledwrite cycle, this requirementdoes notapplyandthe minimumwrite pulse is as shortas the specifiedtWP.
3. Duringthis period,I/Opins areintheoutputstate,andinputsignals mustnotbeapplied.
4. Ifthe CSLOWorBHE andBLELOWtransitionoccurssimultaneouslywithoraftertheWELOWtransition,theoutputsremaininahigh-impedancestate.
5. Transitionismeasured±200mVfromsteadystate.
6.462
IDT71V016SA, 3.3V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,4)
t
WC
ADDRESS
t
AW
C
S
(2)
tAS
t
CW
t
BW
BHE, BLE
WE
tWP
tWR
DATAOUT
DATAIN
t
DH
t
DW
DATAIN VALID
6818 drw 09
Timing Waveform of Write Cycle No. 3 (BHE, BLE Controlled Timing)(1,4)
t
WC
ADDRESS
t
AW
C
S
(2)
t
CW
tAS
tBW
BHE, BLE
tWP
tWR
WE
DATAOUT
DATAIN
t
DH
t
DW
DATAIN VALID
6818 drw 10
NOTES:
1. A write occurs during the overlap of a LOW CS, LOW BHE or BLE, and a LOW WE.
2. OE is continuouslyHIGH. Ifduringa WE controlledwrite cycle OE is LOW, tWP mustbe greaterthanorequaltotWHZ+tDW toallowthe I/Odrivers toturnoffanddata tobe placed
onthe bus forthe requiredtDW. IfOE is HIGHduringaWE controlledwrite cycle, this requirementdoes notapplyandthe minimumwrite pulse is as shortas the specifiedtWP.
3. Duringthis period,I/Opins areintheoutputstate,andinputsignals mustnotbeapplied.
4. Ifthe CSLOWorBHE andBLELOWtransitionoccurssimultaneouslywithoraftertheWELOWtransition,theoutputsremaininahigh-impedancestate.
5. Transitionismeasured±200mVfromsteadystate.
6.42
7
IDT71V016SA, 3.3V CMOS Static RAM
for Automotive Applications 1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
Ordering Information
X
IDT 71V016
SA
XX
XXX
X
X
Process/
Tape & Reel
Device
Type
Power Speed Package
Temperature
Range
8
Automotive Grade 1 (-40°C to +125°C)
Automotive Grade 2 (-40°C to +105°C)
Automotive Grade 3 (-40°C to +85°C)
Automotive Grade 4 (0°C to +70°C)
1
2
3
4
Restricted hazardous substance device
G
Y
400-mil SOJ (SO44-1)
PH
BF
400-mil TSOP Type II (SO44-2)
7.0 x 7.0 mm FBGA (BF48-1)
12
15
20
Speed in nanoseconds
6818 drw 11
6.482
IDT71V016SA, 3.3V CMOS Static RAM
1 Meg (64K x 16-bit)
Commercial and Industrial Temperature Ranges
Datasheet Document History
Rev
Date
Page
Description
ReleasedAutomotivedatasheet
0
12/17/04
p. 1-8
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
for Tech Support:
ipchelp@idt.com
800-345-7015
800-345-7015 or
408-284-8200
fax: 408-284-2775
www.idt.com
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
9
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