IDT74ALVCH16646PV8 [IDT]
Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, SSOP-56;
| 型号： | IDT74ALVCH16646PV8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, SSOP-56 光电二极管 逻辑集成电路 |
| 文件： | 总8页 (文件大小：110K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS
TRANSCEIVER AND
REGISTER WITH 3-STATE
OUTPUTS AND BUS-HOLD
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. The ALVCH16646 can be used as two 8-bit transceivers or one
16-bit transceiver. Data on the A or B bus is clocked into the registers on the
low-to-hightransitionoftheappropriateclock(CLKABorCLKBA)input.
Output-enable (OE ) and direction-control (DIR) inputs are provided to
controlthetransceiverfunctions.Inthetransceivermode,datapresentatthe
high-impedanceportmaybestoredineitherregisterorboth.Theselectcontrol
(SABandSBA)inputscanmultiplexstoredandreal-time(transparentmode)
data.Thecircuitryusedforselectcontroleliminatesthetypicaldecodingglitch
thatoccursinamultiplexerduringthetransitionbetweenstoredandreal-time
data.DIRdetermineswhichbusreceivesdatawhenOEislow.Intheisolation
mode (OE high), A data may be stored in one register and/or B data may be
storedintheotherregister.Whenanoutputfunctionisdisabled,theinputfunction
isstillenabledandmaybeusedtostoreandtransmitdata.Onlyoneofthetwo
buses, A or B, can be driven at a time.
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP and TSSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for heavy loads
APPLICATIONS:
The ALVCH16646 has been designed with a ±24mA output driver. This
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
The ALVCH16646 has “bus-hold” which retains the inputs’ last state
whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs
andeliminatestheneedforpull-up/downresistors.
FUNCTIONALBLOCKDIAGRAM
56
29
1OE
2OE
1
28
1DIR
2DIR
55
30
1CLKBA
2CLKBA
54
31
1SBA
2SBA
2
27
26
1CLKAB
2CLKAB
2SAB
3
1SAB
One of 8 Channels
One of 8 Channels
1D
1D
C1
C1
5
15
1A1
2A1
52
42
1B1
2B1
1D
C1
1D
C1
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
JANUARY 2004
1
© 2004 Integrated Device Technology, Inc.
DSC-4221/2
IDT74ALVCH16646
3.3VCMOS16-BITBUSTRANSCEIVERANDREGISTER
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +4.6
1
1DIR
1CLKAB
1SAB
1OE
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
2
1CLKBA
1SBA
TSTG
IOUT
IIK
Storage Temperature
DC Output Current
–65 to +150
–50 to +50
±50
°C
mA
mA
3
4
GND
GND
1B1
Continuous Clamp Current,
VI < 0 or VI > VCC
1A1
5
IOK
Continuous Clamp Current, VO < 0
–50
mA
mA
6
1A2
VCC
1A3
1A4
1A5
GND
1A6
1A7
1B2
ICC
ISS
Continuous Current through each
VCC or GND
±100
7
VCC
1B3
1B4
8
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCC
2B7
2B8
2. VCC terminals.
3. All terminals except VCC.
1A8
2A1
2A2
2A3
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Parameter(1)
Conditions
VIN = 0V
VOUT = 0V
VIN = 0V
Typ.
Max. Unit
GND
2A4
Symbol
CIN
Input Capacitance
Output Capacitance
I/O Port Capacitance
5
7
7
7
9
9
pF
pF
pF
COUT
CI/O
2A5
2A6
VCC
2A7
NOTE:
1. As applicable to the device type.
2A8
GND
25
32
31
30
29
GND
2SAB
26
27
28
2SBA
2CLKBA
2CLKAB
2DIR
PINDESCRIPTION
2OE
Pin Names
Description
xAx
Data Register A Inputs(1)
Data Register B Outputs
Data Register B Inputs(1)
Data Register A Outputs
SSOP/ TSSOP
TOP VIEW
xBx
xCLKAB, xCLKBA Clock Pulse Inputs
xSAB, xSBA
xOE
Output Data Source Select Inputs
Output Enable Inputs
xDIR
Direction Control Inputs
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
2
IDT74ALVCH16646
3.3VCMOS16-BITBUSTRANSCEIVERANDREGISTER
INDUSTRIALTEMPERATURERANGE
FUNCTIONTABLE(1)
Inputs
Data I/O
xOE
X
xDIR
X
xCLKAB
xCLKBA
xSAB
xSBA
xAx
Input
Unspecified(2)
xBx
Unspecified(2)
Operation or Function
Store A, B Unspecified(2)
Store B, A Unspecified(2)
Store A and B Data
↑
X
X
X
X
X
X
X
L
X
X
X
X
L
X
X
X
↑
↑
↑
Input
H
H
L
X
Input
Input
X
H or L
X
H or L
X
InputDisabled
Output
InputDisabled
Input
Isolation,HoldStorage
L
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
L
L
X
H or L
X
H
X
X
Output
Input
L
H
X
Input
Output
L
H
H or L
X
H
Input
Output
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
↑ = LOW-to-HIGH Transition
2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e. data at the bus pins will be
stored on every LOW-to-HIGH transition on the clock inputs.
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Operating Condition: TA = –40°C to +85°C
Symbol
Parameter
Test Conditions
Min.
1.7
2
Typ.(1)
—
Max.
—
Unit
VIH
Input HIGH Voltage Level
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
V
—
—
VIL
Input LOW Voltage Level
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
—
—
—
—
0.7
0.8
V
IIH
IIL
Input HIGH Current
VCC = 3.6V
VCC = 3.6V
VCC = 3.6V
VI = VCC
—
—
—
—
—
—
—
±5
±5
µA
µA
µA
Input LOW Current
VI = GND
VO = VCC
VO = GND
IOZH
IOZL
VIK
VH
High Impedance Output Current
(3-State Output pins)
—
±10
±10
–1.2
—
Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
VCC = 3.3V
–0.7
V
Input Hysteresis
—
—
100
0.1
—
40
mV
µA
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = 3.6V
VIN = GND or VCC
∆ICC
Quiescent Power Supply Current
Variation
One input at VCC - 0.6V, other inputs at VCC or GND
—
—
750
µA
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
3
IDT74ALVCH16646
3.3VCMOS16-BITBUSTRANSCEIVERANDREGISTER
INDUSTRIALTEMPERATURERANGE
BUSMANAGEMENTFUNCTIONS
BUS
A
BUS
B
BUS
A
BUS
B
CLKBA
X
SAB
X
OE
L
CLKAB
X
SBA
L
CLKBA
X
SAB
L
DIR
L
OE
L
DIR
H
CLKAB
X
SBA
X
Real-Time Transfer Bus B to Bus A
Real-Time Transfer Bus A to Bus B
BUS
A
BUS
A
BUS
B
BUS
B
CLKBA
SAB
X
X
CLKAB
CLKBA
H or L
X
SAB
X
H
OE
SBA
DIR
X
X
OE
L
L
DIR
L
H
CLKAB
X
H or L
SBA
H
X
X
↑
↑
X
X
H
X
X
X
↑
X
↑
X
X
Storage from A, B, or A and B
Transfer Stored Data to A and/or B
4
IDT74ALVCH16646
3.3VCMOS16-BITBUSTRANSCEIVERANDREGISTER
INDUSTRIALTEMPERATURERANGE
BUS-HOLDCHARACTERISTICS
Symbol
IBHH
Parameter(1)
Test Conditions
VI = 2V
Min.
–75
75
Typ.(2)
—
Max.
—
Unit
Bus-HoldInputSustainCurrent
VCC = 3V
µA
IBHL
VI = 0.8V
—
—
IBHH
Bus-HoldInputSustainCurrent
Bus-Hold Input Overdrive Current
VCC = 2.3V
VCC = 3.6V
VI = 1.7V
–45
45
—
—
µA
µA
IBHL
VI = 0.7V
—
—
IBHHO
VI = 0 to 3.6V
—
—
±500
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
TestConditions(1)
Min.
Max.
—
Unit
VOH
Output HIGH Voltage
VCC = 2.3V to 3.6V
VCC = 2.3V
IOH = – 0.1mA
IOH = – 6mA
IOH = – 12mA
VCC – 0.2
V
2
1.7
2.2
2.4
2
—
VCC = 2.3V
—
VCC = 2.7V
—
VCC = 3V
—
VCC = 3V
IOH = – 24mA
IOL = 0.1mA
IOL = 6mA
—
VOL
OutputLOWVoltage
VCC = 2.3V to 3.6V
VCC = 2.3V
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
V
IOL = 12mA
IOL = 12mA
IOL = 24mA
VCC = 2.7V
VCC = 3V
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, TA = 25°C
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Symbol
CPD
Parameter
Test Conditions
Typical
39
Typical
43
Unit
PowerDissipationCapacitanceOutputsenabled
PowerDissipationCapacitanceOutputsdisabled
CL = 0pF, f = 10Mhz
pF
CPD
10
12
5
IDT74ALVCH16646
3.3VCMOS16-BITBUSTRANSCEIVERANDREGISTER
INDUSTRIALTEMPERATURERANGE
SWITCHINGCHARACTERISTICS(1)
VCC = 2.5V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
Symbol
fMAX
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPZH
tPZL
tPHZ
tPLZ
tPHZ
tPLZ
tSU
Parameter
Min.
150
1
Max.
—
Min.
150
—
Max.
—
Min.
150
1
Max.
—
Unit
MHz
ns
PropagationDelay
4.8
4.5
3.9
xAx to xBx or xBx to xAx
PropagationDelay
1
1
5.6
6.8
6.5
7.8
5.7
6.5
—
—
—
—
—
—
5.2
6.4
6.2
6.2
5
1
1
4.5
5.3
5.1
5.1
4.7
5.3
ns
ns
ns
ns
ns
ns
xCLKAB to xBx or xCLKBA to xAx
PropagationDelay
xSBA or xAx or xSAB to xBx
OutputEnableTime
1
1
xOE to xAx or xBx
OutputEnableTime
1
1
xDIR to xAx or xBx
OutputDisableTime
1.6
1.5
1.4
1.1
xOE to xAx or xBx
OutputDisableTime
6
xDIR to xAx or xBx
Set-up Time, xAx before xCLKAB↑ or xBx before xCLKBA↑
Hold Time, xAx after xCLKAB↑ or xBx after xCLKBA↑
Pulse Width, xCLKAB or xCLKBA HIGH or LOW
OutputSkew(2)
1.6
0.6
3.3
—
—
—
—
—
1.7
0.4
3.3
—
—
—
—
—
1.4
0.7
3.3
—
—
—
ns
ns
ns
ps
tH
tW
—
tSK(o)
500
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2
Skew between any two outputs of the same package and switching in the same direction.
6
IDT74ALVCH16646
3.3VCMOS16-BITBUSTRANSCEIVERANDREGISTER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
VIH
VT
0V
SAME PHASE
INPUT TRANSITION
TESTCONDITIONS
tPHL
tPHL
tPLH
tPLH
Symbol VCC(1)=3.3V±0.3V VCC(1)=2.7V VCC(2)=2.5V±0.2V
Unit
V
VOH
VT
VOL
OUTPUT
VLOAD
VIH
6
6
2 x Vcc
Vcc
2.7
1.5
300
300
50
2.7
1.5
300
300
50
V
VIH
VT
0V
VT
Vcc / 2
150
V
OPPOSITE PHASE
INPUT TRANSITION
VLZ
VHZ
CL
mV
mV
pF
150
ALVC Link
30
Propagation Delay
VLOAD
Open
GND
DISABLE
VCC
ENABLE
VIH
VT
CONTROL
INPUT
500Ω
0V
tPZL
tPLZ
VIN
VOUT
(1, 2)
Pulse
VLOAD/2
D.U.T.
VLOAD/2
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
Generator
VT
VLZ
VOL
500Ω
tPHZ
tPZH
RT
CL
OUTPUT
NORMALLY
HIGH
VOH
VHZ
SWITCH
OPEN
VT
0V
ALVC Link
0V
Test Circuit for All Outputs
ALVC Link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Enable and Disable Times
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
NOTES:
VIH
1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
DATA
INPUT
VT
0V
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.
tSU
tH
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
TIMING
INPUT
SWITCHPOSITION
Test
Switch
VLOAD
GND
tREM
ASYNCHRONOUS
CONTROL
Open Drain
Disable Low
Enable Low
SYNCHRONOUS
CONTROL
Disable High
Enable High
tSU
tH
ALVC Link
All Other Tests
Open
VIH
Set-up, Hold, and Release Times
VT
INPUT
0V
tPLH1
tPHL1
VOH
VT
VOL
LOW-HIGH-LOW
VT
PULSE
OUTPUT 1
OUTPUT 2
tSK (x)
tSK (x)
tW
VOH
VT
VOL
HIGH-LOW-HIGH
PULSE
VT
ALVC Link
tPLH2
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
tPHL2
Pulse Width
ALVC Link
Output Skew - tSK(X)
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
7
IDT74ALVCH16646
3.3VCMOS16-BITBUSTRANSCEIVERANDREGISTER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
ALVC
X
XX
XX
IDT
XXX
XX
Bus-Hold
Family Device Type Package
Temp. Range
Shrink Small Outline Package
Thin Shrink Small Outline Package
PV
PA
16-Bit Bus Transceiver and Register with 3-State Outputs
646
16
Double-Density, ±24mA
Bus-Hold
H
74
–40°C to +85°C
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8
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