IDT74FCT138CTQ8 [IDT]
Decoder/Driver, FCT Series, Inverted Output, CMOS, PDSO16, QSOP-16;
| 型号： | IDT74FCT138CTQ8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Decoder/Driver, FCT Series, Inverted Output, CMOS, PDSO16, QSOP-16 光电二极管 |
| 文件： | 总6页 (文件大小：80K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS
1-OF-8 DECODER
WITH ENABLE
IDT74FCT138AT/CT
DESCRIPTION:
FEATURES:
The IDT74FCT138Tis a 1-of-8decoderbuiltusinganadvanceddual
• A and C grades
metal CMOS technology. The IDT54/74FCT138T accepts three binary
weightedinputs (A0, A1, A2)and, whenenabled, provides eightmutually
exclusive active low outputs (O0 - O7). The IDT54/74FCT138T features
three enable inputs, two active low (E1, E2) and one active high (E3). All
outputs willbe highunless E1 andE2 are lowandE3 is high. This multiple
enable functionallows easyparallelexpansionofthe device toa 1-of-32
(5lines to32lines)decoderwithjustfourIDT54/74FCT138Tdevices and
one inverter.
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Power off disable outputs permit "live insertion"
• Available in SOIC and QSOP packages
FUNCTIONALBLOCKDIAGRAM
E1
E2
A1
A0
E3
A2
O0
O6
O3
O2
O1
O7
O5
O4
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
FEBRUARY 2006
1
© 2006 Integrated Device Technology, Inc.
DSC-2570/11
IDT74FCT138AT/CT
FASTCMOS1-OF-8DECODERWITHENABLE
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
° C
mA
1
2
3
A0
16
15
14
13
VCC
O0
O1
O2
O3
O4
O5
O6
A1
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by =0.5V unless otherwise noted.
A2
E1
4
5
6
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
E2
E3
O7
12
11
10
9
7
8
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
GND
CIN
VIN = 0V
6
10
12
pF
pF
COUT
VOUT = 0V
8
NOTE:
SOIC/ QSOP
TOP VIEW
1. This parameter is measured at characterization but not tested.
PINDESCRIPTION
Pin Names
A0 - A2
E1, E2
E3
Description
Address Inputs
Enable Inputs (Active LOW)
Enable Input (Active HIGH)
Outputs (Active LOW)
O0 - O7
2
IDT74FCT138AT/CT
FASTCMOS1-OF-8DECODERWITHENABLE
INDUSTRIALTEMPERATURERANGE
FUNCTIONTABLE(1)
Inputs
Outputs
E1
H
X
X
L
L
L
L
L
L
L
L
E2
X
H
X
L
L
L
L
L
L
L
L
E3
X
X
L
A0
X
X
X
L
A1
X
X
X
L
A2
X
X
X
L
O0
H
H
H
L
O1
H
H
H
H
L
O2
H
H
H
H
H
L
O3
H
H
H
H
H
H
L
O4
O5
H
H
H
H
H
H
H
H
L
O6
H
H
H
H
H
H
H
H
H
L
O7
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
L
H
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
Symbol
VIH
VIL
IIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
0.8
1
Unit
V
V
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
–60
2.4
2
—
Input HIGH Current(4)
Input LOW Current(4)
Input HIGH Current(4)
Clamp Diode Voltage
Short Circuit Current
OutputHIGHVoltage
VI = 2.7V
VI = 0.5V
—
µA
IIL
VCC = Max.
—
1
II
VCC = Max., VI = VCC (Max.)
VCC = Min., IIN = –18mA
—
1
µA
V
VIK
IOS
–0.7
–120
3.3
3
–1.2
–225
—
—
0.5
(3)
VCC = Max., VO = GND
mA
V
VOH
VCC = Min
IOH = –8mA
IOH = –15mA
IOL = –48mA
VIN = VIH or VIL
VOL
Output LOWVoltage
VCC = Min
—
0.3
V
VIN = VIH or VIL
VH
ICC
Input Hysteresis
—
—
—
200
—
1
mV
mA
Quiescent Power Supply Current
VCC = Max.
0.01
VIN = GND or VCC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
3
IDT74FCT138AT/CT
FASTCMOS1-OF-8DECODERWITHENABLE
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
ΔICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V
—
0.5
2
mA
(3)
ICCD
IC
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
One Input Toggling
50% Duty Cycle
VIN = VCC
VIN = GND
—
0.15
0.3
mA/
MHz
Total Power Supply Current(5)
VCC = Max.
Outputs Open
Toggle E1, E2, or E3
50% Duty Cycle
fo = 10MHz
VIN = VCC
VIN = GND
—
—
1.5
1.8
4
5
mA
VIN = 3.4V
VIN = GND
One Input and
One Output Toggling
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fONO)
ICC = Quiescent Current
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fO = Output Frequency
NO = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
74FCT138AT
74FCT138CT
Symbol
tPLH
Parameter
PropagationDelay
Ax to Ox
PropagationDelay
E1 or E2 to Ox
PropagationDelay
E3 to Ox
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Unit
1.5
5.8
1.5
5.1
ns
ns
ns
tPHL
tPLH
1.5
1.5
5.9
5.9
1.5
1.5
5.2
5.2
tPHL
tPLH
tPHL
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
4
IDT74FCT138AT/CT
FASTCMOS1-OF-8DECODERWITHENABLE
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCHPOSITION
Test
Switch
Closed
Open
Open Drain
Disable Low
Enable Low
VCC
7.0V
500W
All Other Tests
VOUT
VIN
Pulse
Generator
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
D.U.T
.
50pF
500W
T
R
L
C
Octal Link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Octal Link
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
5
IDT74FCT138AT/CT
FASTCMOS1-OF-8DECODERWITHENABLE
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
XX
FCT
XXXX
XX
X
Temp. Range
Package
Process
Device Type
Blank
Industrial
SO
Q
Small Outline IC
Quarter-size Small Outline Package
1-of-8 Decoder
– 40°C to +85°C
138AT
138CT
74
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6
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