IDT74FCT139TQ8 [IDT]

Decoder/Driver, FCT Series, Inverted Output, CMOS, PDSO16, QSOP-16;
IDT74FCT139TQ8
型号: IDT74FCT139TQ8
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

Decoder/Driver, FCT Series, Inverted Output, CMOS, PDSO16, QSOP-16

光电二极管
文件: 总6页 (文件大小:86K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
FAST CMOS  
1-OF-4 DECODER  
WITH ENABLE  
IDT54/74FCT139T/AT/CT  
DESCRIPTION:  
FEATURES:  
TheIDT54/74FCT139Tisadual1-of-4decoderbuiltusinganadvanced  
dual metal CMOS technology. These devices have two independent  
decoders, each of which accept two binary weighted inputs (A0-A1) and  
provide fourmutuallyexclusive active lowoutputs (O0-O3).Eachdecoder  
has anactive lowenable (E). WhenE is high, alloutputs are forcedhigh.  
• Std., A, and C grades  
Low input and output leakage 1µA (max.)  
• CMOS power levels  
True TTL input and output compatibility:  
VOH = 3.3V (typ.)  
VOL = 0.3V (typ.)  
High Drive outputs (-15mA IOH, 48mA IOL)  
Meets or exceeds JEDEC standard 18 specifications  
Military product compliant to MIL-STD-883, Class B and DESC  
listed (dual marked)  
• Power off disable outputs permit "live insertion"  
Available in the following packages:  
Industrial: SOIC, QSOP  
Military: CERDIP, LCC  
FUNCTIONALBLOCKDIAGRAM  
Ea  
Eb  
A0a  
A1a  
A0b  
A1b  
O0a  
O1a  
O2a  
O3a  
O0b  
O1b  
O2b  
O3b  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
MILITARY AND INDUSTRIAL TEMPERATURE RANGES  
JUNE 2002  
1
© 2002 Integrated Device Technology, Inc.  
DSC-2566/9  
IDT54/74FCT139T/AT/CT  
FASTCMOS1-OF-4DECODERWITHENABLE  
MILITARYANDINDUSTRIALTEMPERATURERANGES  
PINCONFIGURATION  
INDEX  
1
2
3
Ea  
A0a  
A1a  
16  
15  
14  
13  
VCC  
Eb  
3
2
20 19  
1
4
5
6
7
8
18  
17  
16  
15  
14  
A1a  
A0b  
A1b  
NC  
O0b  
O1b  
A0b  
A1b  
O0b  
O1b  
O2b  
O3b  
O0a  
4
5
6
O0a  
O1a  
NC  
O1a  
O2a  
12  
11  
10  
9
O2a  
9
10 11 12 13  
7
8
O3a  
GND  
LCC  
TOP VIEW  
CERDIP/ SOIC/ QSOP  
TOP VIEW  
ABSOLUTEMAXIMUMRATINGS(1)  
PINDESCRIPTION  
Symbol  
Description  
Max  
Unit  
V
Pin Names  
Description  
(2)  
VTERM  
Terminal Voltage with Respect to GND  
–0.5 to +7  
A0, A1  
E
Address Inputs  
(3)  
VTERM  
Terminal Voltage with Respect to GND –0.5 to VCC+0.5  
V
Enable Inputs (Active LOW)  
Outputs (Active LOW)  
TSTG  
IOUT  
Storage Temperature  
DC Output Current  
–65 to +150  
–60 to +120  
° C  
mA  
O0 - O3  
NOTES:  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause  
permanent damage to the device. This is a stress rating only and functional operation  
of the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability. No terminal voltage may exceed  
Vcc by =0.5V unless otherwise noted.  
FUNCTIONTABLE(1)  
Inputs  
Outputs  
2. Inputs and Vcc terminals only.  
3. Output and I/O terminals only.  
E1  
H
L
A0  
X
L
A1  
X
L
O0  
H
L
O1  
H
H
L
O2  
H
H
H
L
O3  
H
H
H
H
L
L
H
L
L
H
H
H
CAPACITANCE (TA = +25°C, F = 1.0MHz)  
L
H
H
H
H
L
H
H
Symbol  
Parameter(1)  
Input Capacitance  
Output Capacitance  
Conditions  
Typ.  
Max. Unit  
NOTE:  
1. H = HIGH Voltage Level  
X = Don’t Care  
CIN  
VIN = 0V  
6
10  
12  
pF  
pF  
COUT  
VOUT = 0V  
8
L = LOW Voltage Level  
NOTE:  
1. This parameter is measured at characterization but not tested.  
2
IDT54/74FCT139T/AT/CT  
FASTCMOS1-OF-4DECODERWITHENABLE  
MILITARYANDINDUSTRIALTEMPERATURERANGES  
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE  
FollowingConditionsApplyUnlessOtherwiseSpecified:  
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%  
Symbol  
VIH  
VIL  
Parameter  
Input HIGH Level  
Test Conditions(1)  
Guaranteed Logic HIGH Level  
Min.  
2
Typ.(2)  
Max.  
0.8  
1
Unit  
V
Input LOW Level  
Guaranteed Logic LOW Level  
VCC = Max.  
–60  
2.4  
V
IIH  
Input HIGH Current(4)  
Input LOW Current(4)  
Input HIGH Current(4)  
Clamp Diode Voltage  
Short Circuit Current  
OutputHIGHVoltage  
VI = 2.7V  
VI = 0.5V  
µA  
IIL  
VCC = Max.  
1
II  
VCC = Max., VI = VCC (Max.)  
VCC = Min., IIN = –18mA  
1
µA  
V
VIK  
IOS  
–0.7  
–120  
3.3  
–1.2  
–225  
(3)  
VCC = Max., VO = GND  
mA  
VOH  
VCC = Min  
IOH = –6mA MIL  
IOH = –8mA IND  
IOH = –12mA MIL  
IOH = –15mA IND  
IOL = 32mA MIL  
IOL = 48mA IND  
VIN = VIH or VIL  
V
V
2
3
VOL  
Output LOWVoltage  
VCC = Min  
0.3  
0.5  
VIN = VIH or VIL  
VH  
ICC  
Input Hysteresis  
200  
1
mV  
mA  
Quiescent Power Supply Current  
VCC = Max.  
0.01  
VIN = GND or VCC  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.  
4. The test limit for this parameter is ±5µA at TA = –55°C.  
3
IDT54/74FCT139T/AT/CT  
FASTCMOS1-OF-4DECODERWITHENABLE  
MILITARYANDINDUSTRIALTEMPERATURERANGES  
POWERSUPPLYCHARACTERISTICS  
Symbol  
Parameter  
Test Conditions(1)  
Min.  
Typ.(2)  
Max.  
Unit  
ΔICC  
Quiescent Power Supply Current  
TTL Inputs HIGH  
VCC = Max.  
VIN = 3.4V  
0.5  
2
mA  
(3)  
ICCD  
IC  
Dynamic Power Supply  
Current(4)  
VCC = Max.  
Outputs Open  
One Input Toggling  
50% Duty Cycle  
VIN = VCC  
VIN = GND  
0.15  
0.3  
mA/  
MHz  
Total Power Supply Current(6)  
VCC = Max.  
Outputs Open  
fo = 10MHz  
VIN = VCC  
VIN = GND  
1.5  
1.8  
3
4
5
mA  
mA  
50% Duty Cycle  
One Input and  
One Output Toggling  
VIN = 3.4V  
VIN = GND  
(5)  
VCC = Max.  
Outputs Open  
fo = 10MHz  
VIN = VCC  
VIN = GND  
7
(5)  
50% Duty Cycle  
One Input Toggling  
on each decoder  
VIN = 3.4V  
VIN = GND  
3.5  
9
Two Outputs Toggling  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.  
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.  
5. Values for these conditions are examples of ΔICC formula. These limits are guaranteed but not tested.  
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC  
IC = ICC + ΔICC DHNT + ICCD (fONO)  
ICC = Quiescent Current  
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)  
DH = Duty Cycle for TTL Inputs High  
NT = Number of TTL Inputs at DH  
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)  
fO = Output Frequency  
NO = Number of Outputs at fO  
All currents are in milliamps and all frequencies are in megahertz.  
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE  
54FCT139T  
54/74FCT139AT  
Ind. Mil.  
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit  
54/74FCT139CT  
Mil.  
Ind. Mil.  
Symbol  
tPLH  
Parameter  
PropagationDelay  
A0 or A1 to Ox  
PropagationDelay  
E to Ox  
Condition(1)  
CL = 50pF  
RL = 500Ω  
Min.(2)  
Max.  
1.5  
12  
1.5  
5.9  
1.5  
7.8  
1.5  
5
1.5  
6.2  
ns  
tPHL  
tPLH  
1.5  
9
1.5  
5.5  
1.5  
7.2  
1.5  
4.8  
1.5  
5.8  
ns  
tPHL  
NOTES:  
1. See test circuit and waveforms.  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
4
IDT54/74FCT139T/AT/CT  
FASTCMOS1-OF-4DECODERWITHENABLE  
MILITARYANDINDUSTRIALTEMPERATURERANGES  
TESTCIRCUITSANDWAVEFORMS  
VCC  
SWITCHPOSITION  
7.0V  
Test  
Switch  
Closed  
Open  
500W  
Open Drain  
Disable Low  
Enable Low  
VOUT  
VIN  
Pulse  
Generator  
D.U.T  
.
All Other Tests  
50pF  
500W  
T
R
DEFINITIONS:  
CL = Load capacitance: includes jig and probe capacitance.  
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.  
Octal Link  
Test Circuits for All Outputs  
3V  
DATA  
1.5V  
0V  
INPUT  
LOW-HIGH-LOW  
tH  
tSU  
1.5V  
PULSE  
3V  
1.5V  
0V  
TIMING  
INPUT  
tW  
ASYNCHRONOUS CONTROL  
tREM  
PRESET  
3V  
1.5V  
0V  
CLEAR  
HIGH-LOW-HIGH  
PULSE  
1.5V  
ETC.  
SYNCHRONOUS CONTROL  
PRESET  
3V  
1.5V  
0V  
CLEAR  
tSU  
tH  
CLOCK ENABLE  
ETC.  
Pulse Width  
Octal Link  
Octal Link  
Set-Up, Hold, and Release Times  
ENABLE  
DISABLE  
3V  
1.5V  
0V  
3V  
SAME PHASE  
CONTROL  
INPUT  
1.5V  
0V  
INPUT TRANSITION  
tPLH  
tPLH  
tPHL  
tPHL  
tPZL  
tPLZ  
VOH  
1.5V  
VOL  
OUTPUT  
3.5V  
1.5V  
3.5V  
VOL  
VOH  
OUTPUT  
NORMALLY  
LOW  
SWITCH  
CLOSED  
0.3V  
0.3V  
3V  
1.5V  
0V  
tPZH  
tPHZ  
OPPOSITE PHASE  
INPUT TRANSITION  
OUTPUT  
NORMALLY  
HIGH  
SWITCH  
OPEN  
1.5V  
0V  
0V  
Octal Link  
Octal Link  
Propagation Delay  
Enable and Disable Times  
NOTES:  
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.  
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.  
5
IDT54/74FCT139T/AT/CT  
FASTCMOS1-OF-4DECODERWITHENABLE  
MILITARYANDINDUSTRIALTEMPERATURERANGES  
ORDERINGINFORMATION  
IDT  
XX  
FCT  
XXXX  
XX  
X
Temp. Range  
Package  
Process  
Device Type  
Blank  
Industrial  
B
MIL-STD-883, Class B  
Industrial Options  
SO  
Q
Small Outline IC (300 mil)  
Quarter-size Small Outline Package  
Military Options  
CERDIP  
Leadless Chip Carrier  
D
L
Dual 1-of-4 Decoder with Enable  
139T  
139AT  
139CT  
54  
74  
– 55°C to +125°C  
– 40°C to +85°C  
CORPORATE HEADQUARTERS  
6024 Silver Creek Valley Road  
San Jose, CA 95138  
for SALES:  
800-345-7015 or 408-284-8200  
fax: 408-284-2775  
for Tech Support:  
logichelp@idt.com  
www.idt.com  
6

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