IDT74FCT162344ETPA8 [IDT]

Bus Driver, FCT Series, 4-Func, 2-Bit, True Output, CMOS, PDSO56, TSSOP-56;
IDT74FCT162344ETPA8
型号: IDT74FCT162344ETPA8
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

Bus Driver, FCT Series, 4-Func, 2-Bit, True Output, CMOS, PDSO56, TSSOP-56

光电二极管
文件: 总6页 (文件大小:78K)
中文:  中文翻译
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FAST CMOS  
ADDRESS/CLOCK  
DRIVER  
IDT74FCT162344AT/CT/ET  
DESCRIPTION:  
FEATURES:  
The FCT162344T is a 1:4 address/clock driver built using advanced dual  
metal CMOS technology. This high-speed, low power device provides the  
ability to fanout to memory arrays. Eight banks, each with a fanout of 4, and  
3-statecontrolprovideefficientaddressdistribution. Oneormorebanksmay  
beusedforclockdistribution.  
• 0.5 MICRON CMOS Technology  
• Ideal for address line driving and clock distribution  
• 8 banks with 1:4 fanout and 3-state  
• Typical tSK(o) (Output Skew) < 500ps  
• Balanced Output Drivers (±24mA)  
• Reduced system switching noise  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 5V ± 10%  
• Low input and output leakage 1µA (max.)  
• Available in SSOP and TSSOP packages  
TheFCT162344Thasbalancedoutputdrivewithcurrentlimitingresistors.  
Thisofferslowgroundbounce,minimalundershootandcontrolledoutputfall  
timesreducingtheneedforexternalseriesterminatingresistors.  
AlargenumberofpowerandgroundpinsandTTLoutputswingsalsoensure  
reducednoiselevels. Allinputsaredesignedwithhysteresisforimprovednoise  
margins.  
FUNCTIONALBLOCKDIAGRAM  
29  
1
OE1  
OE3  
34  
2
B11  
B51  
36  
8
A1  
A5  
30  
6
B14  
B54  
41  
9
B21  
B61  
42  
14  
A2  
A6  
37  
13  
B24  
B64  
56  
28  
OE2  
OE4  
48  
16  
B31  
B71  
43  
15  
A3  
A7  
44  
20  
B34  
B74  
55  
23  
B41  
B81  
49  
21  
A4  
A8  
51  
27  
B44  
B84  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
MAY 2002  
INDUSTRIALTEMPERATURERANGE  
1
© 2002 Integrated Device Technology, Inc.  
DSC-3069/6  
IDT74FCT162344AT/CT/ET  
FASTCMOSADDRESS/CLOCKDRIVER  
INDUSTRIALTEMPERATURERANGE  
ABSOLUTE MAXIMUM RATINGS(1)  
PINCONFIGURATION  
Symbol  
Description  
Max  
Unit  
V
(2)  
OE4  
OE1  
B11  
B12  
GND  
B13  
B14  
VCC  
A1  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
VTERM  
Terminal Voltage with Respect to GND  
–0.5 to +7  
(3)  
VTERM  
Terminal Voltage with Respect to GND –0.5 to VCC+0.5  
V
2
B81  
B82  
GND  
B83  
B84  
VCC  
A8  
TSTG  
IOUT  
Storage Temperature  
DC Output Current  
–65 to +150  
–60 to +120  
°C  
mA  
3
4
NOTES:  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause  
permanent damage to the device. This is a stress rating only and functional operation  
of the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
5
6
7
2. All device terminals except FCT162XXX Output and I/O terminals.  
3. Output and I/O terminals terminals for FCT162XXX.  
8
B21  
B22  
GND  
B23  
B24  
A2  
9
B71  
B72  
GND  
B73  
B74  
A7  
CAPACITANCE (TA = +25°C, F = 1.0MHz)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
Symbol  
Parameter(1)  
Input Capacitance  
Output Capacitance  
Conditions  
Typ.  
Max. Unit  
CIN  
VIN = 0V  
3.5  
6
8
pF  
pF  
COUT  
VOUT = 0V  
3.5  
NOTE:  
1. This parameter is measured at characterization but not tested.  
A3  
A6  
PINDESCRIPTION  
B31  
B32  
GND  
B33  
B34  
A4  
B61  
B62  
GND  
B63  
B64  
A5  
Pin Names  
Description  
3-State Output Enable Inputs (Active LOW)  
Inputs  
OEx  
A x  
Bxx  
3-State Outputs  
FUNCTIONTABLE(1)  
VCC  
B41  
B42  
VCC  
B51  
B52  
GND  
B53  
B54  
OE3  
Inputs  
Outputs  
OEx  
L
Ax  
L
Bxx  
L
GND  
B43  
L
H
X
H
H
Z
27  
28  
B44  
NOTE:  
1. H = HIGH Voltage Level  
X = Don’t Care  
OE2  
L = LOW Voltage Level  
Z = High-Impedance  
SSOP/ TSSOP  
TOP VIEW  
2
IDT74FCT162344AT/CT/ET  
FASTCMOSADDRESS/CLOCKDRIVER  
INDUSTRIALTEMPERATURERANGE  
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE  
FollowingConditionsApplyUnlessOtherwiseSpecified:  
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%  
Symbol  
VIH  
Parameter  
Input HIGH Level  
Test Conditions(1)  
Min.  
2
Typ.(2)  
Max.  
Unit  
V
Guaranteed Logic HIGH Level  
VIL  
Input LOW Level  
Guaranteed Logic LOW Level  
VCC = Max.  
0.8  
±1  
V
IIH  
Input HIGH Current (Input pins)(4)  
Input HIGH Current (I/O pins)(4)  
Input LOW Current (Input pins)(4)  
Input LOW Current (I/O pins)(4)  
High Impedance Output Current  
(3-State Output pins)(4)  
VI = VCC  
µA  
±1  
IIL  
VI = GND  
±1  
µA  
µA  
±1  
IOZH  
IOZL  
VIK  
VCC = Max.  
VO = 2.7V  
VO = 0.5V  
±1  
±1  
Clamp Diode Voltage  
VCC = Min., IIN = –18mA  
VCC = Max., VO = GND(3)  
–0.7  
–140  
–1.2  
–250  
V
IOS  
VH  
Short Circuit Current  
–80  
mA  
Input Hysteresis  
100  
5
mV  
µA  
ICCL  
ICCH  
ICCZ  
Quiescent Power Supply Current  
VCC = Max.  
VIN = GND or VCC  
500  
OUTPUTDRIVECHARACTERISTICS  
Symbol  
Parameter  
Test Conditions(1)  
Min.  
60  
Typ.(2)  
Max.  
200  
Unit  
mA  
mA  
V
IODL  
OutputLOWCurrent  
VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3)  
VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3)  
115  
–115  
3.3  
IODH  
Output HIGH Current  
Output HIGH Voltage  
–60  
2.4  
–200  
VOH  
VCC = Min  
IOH = –24mA  
VIN = VIH or VIL  
VCC = Min  
VOL  
OutputLOWVoltage  
IOH = 24mA  
0.3  
0.55  
V
VIN = VIH or VIL  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.  
4. This test limit for this parameter is ±5µA at TA = –55°C.  
3
IDT74FCT162344AT/CT/ET  
FASTCMOSADDRESS/CLOCKDRIVER  
INDUSTRIALTEMPERATURERANGE  
POWERSUPPLYCHARACTERISTICS  
Symbol  
Parameter  
Test Conditions(1)  
Min.  
Typ.(2)  
Max.  
Unit  
ICC  
Quiescent Power Supply Current  
TTL Inputs HIGH  
VCC = Max.  
VIN = 3.4V(3)  
0.5  
1.5  
mA  
ICCD  
Dynamic Power Supply  
Current(4)  
VCC = Max.  
Outputs Open  
VIN = VCC  
VIN = GND  
170  
220  
µA/  
MHz  
OEx = GND  
One Input Bit Toggling  
Four Output Bits Toggling  
50% Duty Cycle  
IC  
Total Power Supply Current(6)  
VCC = Max.  
Outputs Open  
fi = 10MHz  
VIN = VCC  
VIN = GND  
1.7  
2
2.7  
3.5  
mA  
50% Duty Cycle  
OEx = GND  
VIN = 3.4V  
VIN = GND  
One Input Bit Toggling  
Four Output Bits Toggling  
VCC = Max.  
Outputs Open  
fi = 2.5MHz  
VIN = VCC  
VIN = GND  
3.4  
5.4  
4.9(5)  
50% Duty Cycle  
OEx = GND  
VIN = 3.4V  
VIN = GND  
10.9(5)  
Eight Input Bits Toggling  
Thirty-Two Output Bits Toggling  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.  
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.  
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.  
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC  
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi)  
ICC = Quiescent Current (ICCL, ICCH and ICCZ)  
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)  
DH = Duty Cycle for TTL Inputs High  
NT = Number of TTL Inputs at DH  
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)  
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)  
NCP = Number of Clock Inputs at fCP  
fi = Input Frequency  
Ni = Number of Inputs at fi  
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE  
FCT1622344AT  
FCT162344CT  
FCT162344ET  
Symbol  
tPLH  
Parameter  
PropagationDelay  
AX to BXX  
Condition(1)  
CL = 50pF  
RL = 500Ω  
Min.(2)  
Max.  
Min.(2)  
Max.  
Min.(2)  
Max.  
Unit  
1.5  
4.8  
1.5  
4.3  
5.8  
5.2  
1.5  
3.8  
ns  
tPHL  
tPZH  
OutputEnableTime  
OEX to BX  
OutputDisableTime  
1.5  
1.5  
6.2  
5.6  
1.5  
1.5  
1.5  
1.5  
5
ns  
ns  
tPZL  
tPHZ  
4.6  
tPLZ  
OEX to BX  
tSK1(o)  
Skewbetweenoutputsofsamebank  
andsamepackage(sametransition)(3)  
0.5  
0.5  
0.35  
0.5  
0.25  
0.5  
ns  
ns  
tSK2(o)  
Skewbetweenoutputsofallbanks  
ofsamepackage(A1thruA8tiedtogether)(3)  
NOTES:  
1. See test circuit and waveforms.  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
3. This parameter is guaranteed but not production tested.  
4
IDT74FCT162344AT/CT/ET  
FASTCMOSADDRESS/CLOCKDRIVER  
INDUSTRIALTEMPERATURERANGE  
TESTCIRCUITSANDWAVEFORMS  
SWITCHPOSITION  
Test  
Switch  
Closed  
Open  
VCC  
Open Drain  
Disable Low  
Enable Low  
7.0V  
500  
All Other Tests  
VOU  
T
IN  
V
Pulse  
Generator  
D.U.T  
.
DEFINITIONS:  
CL = Load capacitance: includes jig and probe capacitance.  
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.  
50pF  
500  
R T  
L
C
Test Circuits for All Outputs  
3V  
DATA  
1.5V  
INPUT  
0V  
LOW-HIGH-LOW  
tH  
tSU  
1.5V  
PULSE  
3V  
1.5V  
0V  
TIMING  
INPUT  
ASYNCHRONOUS CONTROL  
tW  
tREM  
PRESET  
CLEAR  
ETC.  
3V  
1.5V  
0V  
HIGH-LOW-HIGH  
PULSE  
1.5V  
SYNCHRONOUS CONTROL  
PRESET  
3V  
1.5V  
0V  
CLEAR  
tSU  
tH  
CLOCK ENABLE  
ETC.  
Pulse Width  
Set-up, Hold, and Release Times  
ENABLE  
DISABLE  
3V  
1.5V  
0V  
3V  
SAME PHASE  
CONTROL  
INPUT  
1.5V  
0V  
INPUT TRANSITION  
tPLH  
tPLH  
tPHL  
tPHL  
tPZ  
L
tPL  
Z
VOH  
1.5V  
OUTPU  
T
3.5V  
1.5V  
3.5V  
OUTPUT  
NORMALLY  
LOW  
SWITCH  
CLOSED  
VO  
0.3V  
0.3V  
L
VO  
L
3V  
1.5V  
0V  
tPZH  
tPHZ  
OPPOSITE PHASE  
INPUT TRANSITION  
VOH  
OUTPUT  
NORMALLY  
HIGH  
SWITCH  
OPEN  
1.5V  
0V  
0V  
Propagation Delay  
Enable and Disable Times  
3V  
1.5V  
0V  
INPUT  
tPLH1  
tPHL1  
VOH  
NOTES:  
1.5V  
VO  
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.  
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.  
OUTPUT 1  
OUTPUT 2  
L
tSK1(o  
)
tSK1(o  
)
VOH  
1.5V  
VO  
L
tPLH2  
tPHL2  
tSKn(o) = |tPLH2 - tPLH1| or |tPHL2 -  
tPLH1|  
Output Skew – tSKn(o)  
NOTES:  
1. For tSK1(o) OUTPUT1 and OUTPUT2 are in the same bank.  
2. For tSK2(o) OUTPUT1 and OUTPUT2 are in different banks on the same part.  
5
IDT74FCT162344AT/CT/ET  
FASTCMOSADDRESS/CLOCKDRIVER  
INDUSTRIALTEMPERATURERANGE  
ORDERINGINFORMATION  
IDT  
XX  
FCT  
XXXX  
XXX  
XX  
Temp. Range  
Family  
Package  
Device Type  
PV  
PA  
Shrink Small Outline Package  
Thin Shrink Small Outline Package  
Address/Clock Driver  
344AT  
344CT  
344ET  
162  
74  
Double-Density, 5 Volt, Balanced Drive  
40°C to +85°C  
DATASHEETDOCUMENTHISTORY  
1/21/2002  
5/21/2002  
RemovedMilitarytempgrade  
RemovedTVSOPpackage  
CORPORATE HEADQUARTERS  
2975StenderWay  
Santa Clara, CA 95054  
for SALES:  
800-345-7015 or 408-727-6116  
fax: 408-492-8674  
for Tech Support:  
logichelp@idt.com  
(408) 654-6459  
www.idt.com  
6

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